公开(公告)号：US20120164817A1

公开(公告)日：2012-06-28

申请号：US13411864

申请日：2012-03-05

申请人： Takeshi SHICHI ,  Junichi KOEZUKA ,  Hideto OHNUMA ,  Shunpei YAMAZAKI

发明人： Takeshi SHICHI ,  Junichi KOEZUKA ,  Hideto OHNUMA ,  Shunpei YAMAZAKI

IPC分类号： H01L21/46

CPC分类号： H01L27/1266 ,  H01L21/76254 ,  H01L27/1214 ,  H01L29/66772

摘要： The present invention provides a method for manufacturing an SOI substrate, to improve planarity of a surface of a single crystal semiconductor layer after separation by favorably separating a single crystal semiconductor substrate even in the case where a non-mass-separation type ion irradiation method is used, and to improve planarity of a surface of a single crystal semiconductor layer after separation as well as to improve throughput. The method includes the steps of irradiating a single crystal semiconductor substrate with accelerated ions by an ion doping method while the single crystal semiconductor substrate is cooled to form an embrittled region in the single crystal semiconductor substrate; bonding the single crystal semiconductor substrate and a base substrate with an insulating layer interposed therebetween; and separating the single crystal semiconductor substrate along the embrittled region to form a single crystal semiconductor layer over the base substrate with the insulating layer interposed therebetween.

摘要翻译： 本发明提供一种制造SOI衬底的方法，即使在非质量分离型离子照射方法为非质子分离型离子照射方法的情况下，通过有利地分离单晶半导体衬底来提高分离后的单晶半导体层的表面的平面性 并且在分离之后提高单晶半导体层的表面的平面性以及提高生产量。 该方法包括以下步骤：当单晶半导体衬底被冷却以在单晶半导体衬底中形成脆化区域时，通过离子掺杂方法照射具有加速离子的单晶半导体衬底; 将单晶半导体衬底和基底衬底之间插入绝缘层; 并且沿着脆化区域分离单晶半导体衬底，以在基底衬底上形成绝缘层，形成单晶半导体层。

公开(公告)号：US20120153395A1

公开(公告)日：2012-06-21

申请号：US13315322

申请日：2011-12-09

申请人： Junichi KOEZUKA ,  Satoshi SHINOHARA ,  Miki SUZUKI ,  Hideto OHNUMA

发明人： Junichi KOEZUKA ,  Satoshi SHINOHARA ,  Miki SUZUKI ,  Hideto OHNUMA

IPC分类号： H01L29/772 ,  H01L21/336

CPC分类号： H01L29/66772 ,  H01L27/1288 ,  H01L29/66492 ,  H01L29/78624

摘要： A semiconductor device is provided, which includes a single crystal semiconductor layer formed over an insulating surface and having a source region, a drain region, and a channel formation region, a gate insulating film covering the single crystal semiconductor layer and a gate electrode overlapping with the channel formation region with the gate insulating film interposed therebetween. In the semiconductor device, at least the drain region of the source and drain regions includes a first impurity region adjacent to the channel formation region and a second impurity region adjacent to the first impurity region. A maximum of an impurity concentration distribution in the first impurity region in a depth direction is closer to the insulating surface than a maximum of an impurity concentration distribution in the second impurity region in a depth direction.

摘要翻译： 提供了一种半导体器件，其包括形成在绝缘表面上并具有源极区，漏极区和沟道形成区的单晶半导体层，覆盖单晶半导体层的栅极绝缘膜和与 沟道形成区域之间插入栅极绝缘膜。 在半导体器件中，源极和漏极区域的至少漏极区域包括与沟道形成区域相邻的第一杂质区域和与第一杂质区域相邻的第二杂质区域。 与深度方向上的第二杂质区域的杂质浓度分布的最大值相比，深度方向上的第一杂质区域的杂质浓度分布的最大值比绝缘面更接近。

公开(公告)号：US20110183494A1

公开(公告)日：2011-07-28

申请号：US13011136

申请日：2011-01-21

申请人： Junichi KOEZUKA ,  Hideto OHNUMA

发明人： Junichi KOEZUKA ,  Hideto OHNUMA

IPC分类号： H01L21/762

CPC分类号： H01L21/76254 ,  H01L21/84

摘要： Manufacturing cost of an SOI substrate is reduced. Yield of an SOI substrate is improved. A method for manufacturing an SOI substrate includes the steps of irradiating a single crystal semiconductor substrate with ions to form an embrittled region in the single crystal semiconductor substrate, bonding the single crystal semiconductor substrate to a base substrate with an insulating film therebetween, and separating the single crystal semiconductor substrate and the base substrate at the embrittled region to form a semiconductor layer over the base substrate with the insulating film therebetween. In the step of forming the embrittled region, ion species which are not mass-separated are used as the ions and a temperature of the single crystal semiconductor substrate is set to 250° C. or higher at the time of irradiation with the ions.

摘要翻译： SOI衬底的制造成本降低。 改善了SOI衬底的产量。 一种SOI衬底的制造方法包括以下步骤：在单晶半导体衬底中照射单晶半导体衬底以形成脆化区域，将单晶半导体衬底与绝缘膜之间的绝缘膜接合， 单晶半导体衬底和基底衬底处于脆化区，以在基底衬底上形成半导体层，其间具有绝缘膜。 在形成脆化区域的步骤中，使用未质量分离的离子种类作为离子，并且在照射离子时将单晶半导体基板的温度设定为250℃以上。

公开(公告)号：US20130069055A1

公开(公告)日：2013-03-21

申请号：US13608044

申请日：2012-09-10

申请人： Shunpei YAMAZAKI ,  Atsuo ISOBE ,  Hiromachi GODO ,  Takehisa HATANO ,  Sachiaki TEZUKA ,  Suguru HONDO ,  Naoto YAMADE ,  Junichi KOEZUKA

发明人： Shunpei YAMAZAKI ,  Atsuo ISOBE ,  Hiromachi GODO ,  Takehisa HATANO ,  Sachiaki TEZUKA ,  Suguru HONDO ,  Naoto YAMADE ,  Junichi KOEZUKA

IPC分类号： H01L29/78

CPC分类号： H01L29/41733 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693

摘要： Provided is a semiconductor device in which an oxide semiconductor layer is provided; a pair of wiring layers which are provided with the gate electrode layer interposed therebetween are electrically connected to the low-resistance regions; and electrode layers are provided to be in contact with the low-resistance regions, below regions where the wiring layers are formed.

摘要翻译： 提供一种半导体器件，其中提供氧化物半导体层; 设置有栅极电极层的一对布线层电连接到低电阻区域; 并且电极层设置成与低电阻区域接触，在形成布线层的区域之下。

公开(公告)号：US20110212569A1

公开(公告)日：2011-09-01

申请号：US13029148

申请日：2011-02-17

申请人： Shunpei YAMAZAKI ,  Junichi KOEZUKA

发明人： Shunpei YAMAZAKI ,  Junichi KOEZUKA

IPC分类号： H01L21/16

CPC分类号： H01L21/385 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/1368 ,  G02F2201/123 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/4908 ,  H01L29/4958 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

摘要： In a transistor including an oxide semiconductor layer, an oxide insulating layer is formed so as to be in contact with the oxide semiconductor layer. Then, oxygen is introduced (added) to the oxide semiconductor layer through the oxide insulating layer, and heat treatment is performed. Through these steps of oxygen introduction and heat treatment, impurities such as hydrogen, moisture, a hydroxyl group, or hydride are intentionally removed from the oxide semiconductor layer, so that the oxide semiconductor layer is highly purified.

摘要翻译： 在包括氧化物半导体层的晶体管中，形成与氧化物半导体层接触的氧化物绝缘层。 然后，通过氧化物绝缘层将氧引入（添加）到氧化物半导体层，并进行热处理。 通过氧气引入和热处理的这些步骤，有意地从氧化物半导体层除去诸如氢，水分，羟基或氢化物的杂质，使得氧化物半导体层被高度纯化。

公开(公告)号：US20140139775A1

公开(公告)日：2014-05-22

申请号：US14077390

申请日：2013-11-12

申请人： Hiroyuki MIYAKE ,  Shunpei YAMAZAKI ,  Yoshifumi TANADA ,  Manabu SATO ,  Toshinari SASAKI ,  Kenichi OKAZAKI ,  Junichi KOEZUKA ,  Takuya MATSUO ,  Hiroshi MATSUKIZONO ,  Yosuke KANZAKI ,  Shigeyasu MORI

发明人： Hiroyuki MIYAKE ,  Shunpei YAMAZAKI ,  Yoshifumi TANADA ,  Manabu SATO ,  Toshinari SASAKI ,  Kenichi OKAZAKI ,  Junichi KOEZUKA ,  Takuya MATSUO ,  Hiroshi MATSUKIZONO ,  Yosuke KANZAKI ,  Shigeyasu MORI

IPC分类号： G02F1/1368 ,  H01L27/12

CPC分类号： H01L27/1225 ,  H01L27/124 ,  H01L29/78648

摘要： A semiconductor device includes: a transistor including a gate electrode, a gate insulating film over the gate electrode, a semiconductor layer over the gate insulating film, and a source electrode and a drain electrode over the semiconductor layer; a first insulating film comprising an inorganic material over the transistor; a second insulating film comprising an organic material over the first insulating film; a first conductive film over the second insulating film and in a region overlapping with the semiconductor layer; a third insulating film comprising an inorganic material over the first conductive film; and a second conductive film over the third insulating film and in a region overlapping with the first conductive film. The absolute value of a first potential applied to the first conductive film is greater than the absolute value of a second potential applied to the second conductive film.

摘要翻译： 半导体器件包括：晶体管，包括栅极电极，栅极上的栅极绝缘膜，栅极绝缘膜上的半导体层，以及半导体层上的源极和漏极; 包括晶体管上的无机材料的第一绝缘膜; 包括在所述第一绝缘膜上的有机材料的第二绝缘膜; 在所述第二绝缘膜上并且在与所述半导体层重叠的区域中的第一导电膜; 在所述第一导电膜上包括无机材料的第三绝缘膜; 以及在所述第三绝缘膜上并且在与所述第一导电膜重叠的区域中的第二导电膜。 施加到第一导电膜的第一电位的绝对值大于施加到第二导电膜的第二电位的绝对值。

公开(公告)号：US20100117073A1

公开(公告)日：2010-05-13

申请号：US12612021

申请日：2009-11-04

申请人： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Tetsunori MARUYAMA ,  Yuki IMOTO ,  Yuji ASANO ,  Junichi KOEZUKA

发明人： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Tetsunori MARUYAMA ,  Yuki IMOTO ,  Yuji ASANO ,  Junichi KOEZUKA

IPC分类号： H01L29/786 ,  H01L21/34

CPC分类号： H01L29/66742 ,  C04B35/58 ,  C04B2235/3284 ,  C04B2235/3286 ,  H01L27/1225 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869

摘要： In a thin film transistor which uses an oxide semiconductor, buffer layers containing indium, gallium, zinc, oxygen, and nitrogen are provided between the oxide semiconductor layer and the source and drain electrode layers.

摘要翻译： 在使用氧化物半导体的薄膜晶体管中，在氧化物半导体层和源极和漏极电极层之间设置包含铟，镓，锌，氧和氮的缓冲层。

公开(公告)号：US20130023087A1

公开(公告)日：2013-01-24

申请号：US13547451

申请日：2012-07-12

申请人： Shunpei YAMAZAKI ,  Shinji OHNO ,  Yuichi SATO ,  Junichi KOEZUKA ,  Sachiaki TEZUKA

发明人： Shunpei YAMAZAKI ,  Shinji OHNO ,  Yuichi SATO ,  Junichi KOEZUKA ,  Sachiaki TEZUKA

IPC分类号： H01L21/385 ,  H01L21/36

CPC分类号： H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02664 ,  H01L27/1225

摘要： To provide an oxide semiconductor film including a low-resistance region, which can be applied to a transistor. To provide a transistor including the oxide semiconductor film, which can perform at high speed. To provide a high-performance semiconductor device including the transistor including the oxide semiconductor film, which can perform at high speed, with high yield. A film having a reducing property is formed over the oxide semiconductor film. Next, part of oxygen atoms are transferred from the oxide semiconductor film to the film having a reducing property. Next, an impurity is added to the oxide semiconductor film through the film having a reducing property and then, the film having a reducing property is removed, so that a low-resistance region is formed in the oxide semiconductor film.

摘要翻译： 提供一种可以应用于晶体管的包含低电阻区域的氧化物半导体膜。 提供可以高速执行的包括氧化物半导体膜的晶体管。 提供一种高性能半导体器件，其包括能够以高产率高速执行的包括氧化物半导体膜的晶体管。 在氧化物半导体膜上形成具有还原性的膜。 接下来，氧原子的一部分从氧化物半导体膜转移到具有还原性的膜。 接下来，通过具有还原性的膜向氧化物半导体膜添加杂质，然后去除具有还原性的膜，从而在氧化物半导体膜中形成低电阻区域。

公开(公告)号：US20130020569A1

公开(公告)日：2013-01-24

申请号：US13547119

申请日：2012-07-12

申请人： Shunpei YAMAZAKI ,  Naoto YAMADE ,  Junichi KOEZUKA

发明人： Shunpei YAMAZAKI ,  Naoto YAMADE ,  Junichi KOEZUKA

IPC分类号： H01L29/12

CPC分类号： H01L27/1225

摘要： A semiconductor device which can operate at high speed and consumes a smaller amount of power is provided. In a semiconductor device including transistors each including an oxide semiconductor, the oxygen concentration of the oxide semiconductor film of the transistor having small current at negative gate voltage is different from that of the oxide semiconductor film of the transistor having high field-effect mobility and large on-state current. Typically, the oxygen concentration of the oxide semiconductor film of the transistor having high field-effect mobility and large on-state current is lower than that of the oxide semiconductor film of the transistor having small current at negative gate voltage.

摘要翻译： 提供了可以高速运行并消耗更少功率的半导体器件。 在包括各自包含氧化物半导体的晶体管的半导体器件中，在负栅极电压下具有小电流的晶体管的氧化物半导体膜的氧浓度与具有高场效应迁移率的晶体管的氧化物半导体膜的氧浓度不同 通态电流。 通常，具有高场电迁移率和大导通状态电流的晶体管的氧化物半导体膜的氧浓度低于在负栅极电压下具有小电流的晶体管的氧化物半导体膜的氧浓度。

公开(公告)号：US20120231580A1

公开(公告)日：2012-09-13

申请号：US13413684

申请日：2012-03-07

申请人： Shunpei YAMAZAKI ,  Yuhei SATO ,  Keiji SATO ,  Tetsunori MARUYAMA ,  Junichi KOEZUKA

发明人： Shunpei YAMAZAKI ,  Yuhei SATO ,  Keiji SATO ,  Tetsunori MARUYAMA ,  Junichi KOEZUKA

IPC分类号： H01L21/42

CPC分类号： H01L21/40 ,  H01L21/02175 ,  H01L21/02252 ,  H01L21/02565 ,  H01L21/02636 ,  H01L21/02664 ,  H01L21/324 ,  H01L21/383 ,  H01L21/477 ,  H01L27/1225 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/7869

摘要： In a manufacturing process of a transistor including an oxide semiconductor film, oxygen doping treatment is performed on the oxide semiconductor film, and then heat treatment is performed on the oxide semiconductor film and an aluminum oxide film provided over the oxide semiconductor film. Consequently, an oxide semiconductor film which includes a region containing more oxygen than a stoichiometric composition is formed. The transistor formed using the oxide semiconductor film can have high reliability because the amount of change in the threshold voltage of the transistor by a bias-temperature stress test (BT test) is reduced.

摘要翻译： 在包括氧化物半导体膜的晶体管的制造过程中，对氧化物半导体膜进行氧掺杂处理，然后对氧化物半导体膜和设置在氧化物半导体膜上的氧化铝膜进行热处理。 因此，形成包含比化学计量组成物多的氧的区域的氧化物半导体膜。 使用氧化物半导体膜形成的晶体管可以具有高的可靠性，因为通过偏压 - 温度应力测试（BT测试）的晶体管的阈值电压的变化量减小。