公开(公告)号：US20140139775A1

公开(公告)日：2014-05-22

申请号：US14077390

申请日：2013-11-12

申请人： Hiroyuki MIYAKE ,  Shunpei YAMAZAKI ,  Yoshifumi TANADA ,  Manabu SATO ,  Toshinari SASAKI ,  Kenichi OKAZAKI ,  Junichi KOEZUKA ,  Takuya MATSUO ,  Hiroshi MATSUKIZONO ,  Yosuke KANZAKI ,  Shigeyasu MORI

发明人： Hiroyuki MIYAKE ,  Shunpei YAMAZAKI ,  Yoshifumi TANADA ,  Manabu SATO ,  Toshinari SASAKI ,  Kenichi OKAZAKI ,  Junichi KOEZUKA ,  Takuya MATSUO ,  Hiroshi MATSUKIZONO ,  Yosuke KANZAKI ,  Shigeyasu MORI

IPC分类号： G02F1/1368 ,  H01L27/12

CPC分类号： H01L27/1225 ,  H01L27/124 ,  H01L29/78648

摘要： A semiconductor device includes: a transistor including a gate electrode, a gate insulating film over the gate electrode, a semiconductor layer over the gate insulating film, and a source electrode and a drain electrode over the semiconductor layer; a first insulating film comprising an inorganic material over the transistor; a second insulating film comprising an organic material over the first insulating film; a first conductive film over the second insulating film and in a region overlapping with the semiconductor layer; a third insulating film comprising an inorganic material over the first conductive film; and a second conductive film over the third insulating film and in a region overlapping with the first conductive film. The absolute value of a first potential applied to the first conductive film is greater than the absolute value of a second potential applied to the second conductive film.

摘要翻译： 半导体器件包括：晶体管，包括栅极电极，栅极上的栅极绝缘膜，栅极绝缘膜上的半导体层，以及半导体层上的源极和漏极; 包括晶体管上的无机材料的第一绝缘膜; 包括在所述第一绝缘膜上的有机材料的第二绝缘膜; 在所述第二绝缘膜上并且在与所述半导体层重叠的区域中的第一导电膜; 在所述第一导电膜上包括无机材料的第三绝缘膜; 以及在所述第三绝缘膜上并且在与所述第一导电膜重叠的区域中的第二导电膜。 施加到第一导电膜的第一电位的绝对值大于施加到第二导电膜的第二电位的绝对值。

公开(公告)号：US20140306220A1

公开(公告)日：2014-10-16

申请号：US14246493

申请日：2014-04-07

申请人： Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Masahiro TAKAHASHI ,  Takuya MATSUO ,  Shigeyasu MORI ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO

发明人： Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Masahiro TAKAHASHI ,  Takuya MATSUO ,  Shigeyasu MORI ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO

IPC分类号： H01L29/786 ,  H01L29/66

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/045 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78696

摘要： To provide a novel semiconductor device in which a reduction in channel length is controlled. The semiconductor device includes an oxide semiconductor layer having a crystal part, and a source electrode layer and a drain electrode layer which are in contact with the oxide semiconductor layer. The oxide semiconductor layer includes a channel formation region and an n-type region in contact with the source electrode layer or the drain electrode layer. The crystal orientation of the crystal part is different between the channel formation region and the n-type region.

摘要翻译： 提供控制通道长度减小的新型半导体器件。 半导体器件包括具有晶体部分的氧化物半导体层以及与氧化物半导体层接触的源电极层和漏电极层。 氧化物半导体层包括与源极电极层或漏极电极层接触的沟道形成区域和n型区域。 晶体部分的晶体取向在沟道形成区域和n型区域之间是不同的。

公开(公告)号：US20140306218A1

公开(公告)日：2014-10-16

申请号：US14244419

申请日：2014-04-03

申请人： Junichi KOEZUKA ,  Masahiro KATAYAMA ,  Yukinori SHIMA ,  Kenichi OKAZAKI ,  Takuya MATSUO ,  Shigeyasu MORI ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO

发明人： Junichi KOEZUKA ,  Masahiro KATAYAMA ,  Yukinori SHIMA ,  Kenichi OKAZAKI ,  Takuya MATSUO ,  Shigeyasu MORI ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO

IPC分类号： H01L27/12 ,  H01L23/00

CPC分类号： H01L27/1225 ,  H01L23/3121 ,  H01L23/564 ,  H01L27/1248 ,  H01L2924/0002 ,  H01L2924/0001 ,  H01L2924/00

摘要： Variation in the electrical characteristics of transistors is minimized and reliability of the transistors is improved. A display device includes a pixel portion 104 and a driver circuit portion 106 outside the pixel portion. The pixel portion includes a pixel transistor, a first insulating layer 122 which covers the pixel transistor and includes an inorganic material, a second insulating layer 124 which is over the first insulating layer and includes an organic material, and a third insulating layer 128 which is over the second insulating layer and includes an inorganic material. The driver circuit portion includes a driving transistor for supplying a signal to the pixel transistor, and the first insulating layer covering the driving transistor. The second insulating layer is not formed in the driver circuit portion.

摘要翻译： 晶体管的电特性的变化最小化，晶体管的可靠性提高。 显示装置包括像素部分104和在像素部分外的驱动器电路部分106。 像素部分包括像素晶体管，覆盖像素晶体管并包括无机材料的第一绝缘层122，在第一绝缘层之上并包括有机材料的第二绝缘层124和第三绝缘层128 并且包括无机材料。 驱动器电路部分包括用于向像素晶体管提供信号的驱动晶体管，以及覆盖驱动晶体管的第一绝缘层。 第二绝缘层不形成在驱动电路部分中。

公开(公告)号：US20140117350A1

公开(公告)日：2014-05-01

申请号：US14062085

申请日：2013-10-24

申请人： Junichi KOEZUKA ,  Yukinori SHIMA ,  Yasuharu HOSAKA ,  Kenichi OKAZAKI ,  Takuya MATSUO ,  Shigeyasu MORI ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO

发明人： Junichi KOEZUKA ,  Yukinori SHIMA ,  Yasuharu HOSAKA ,  Kenichi OKAZAKI ,  Takuya MATSUO ,  Shigeyasu MORI ,  Yosuke KANZAKI ,  Hiroshi MATSUKIZONO

IPC分类号： H01L27/12

CPC分类号： H01L27/1225 ,  H01L27/3262

摘要： To improve the reliability of a transistor as well as to inhibit fluctuation in electric characteristics. A display device includes a pixel portion and a driver circuit portion outside the pixel portion; the pixel portion includes a pixel transistor, a first insulating film covering the pixel transistor and including an inorganic material, a second insulating film including an organic material over the first insulating film, and a third insulating film including an inorganic material over the second insulating film; and the driver circuit portion includes a driving transistor to supply a signal to the pixel transistor, the first insulating film covering the driving transistor, and the second insulating film over the first insulating film, and further includes a region in which the third insulating film is not formed over the second insulating film or a region in which the second insulating film is not covered with the third insulating film.

摘要翻译： 提高晶体管的可靠性以及抑制电特性的波动。 显示装置包括像素部分和像素部分外部的驱动器电路部分; 像素部分包括像素晶体管，覆盖像素晶体管并且包括无机材料的第一绝缘膜，在第一绝缘膜上的包括有机材料的第二绝缘膜，以及在第二绝缘膜上的包括无机材料的第三绝缘膜 ; 并且所述驱动电路部分包括驱动晶体管，以向所述像素晶体管提供信号，所述第一绝缘膜覆盖所述驱动晶体管，并且所述第二绝缘膜在所述第一绝缘膜上方，并且还包括所述第三绝缘膜为 不形成在第二绝缘膜上或第二绝缘膜未被第三绝缘膜覆盖的区域。

公开(公告)号：US20120286270A1

公开(公告)日：2012-11-15

申请号：US13463092

申请日：2012-05-03

申请人： Atsuo ISOBE ,  Toshinari SASAKI ,  Junichi KOEZUKA ,  Shunpei YAMAZAKI

发明人： Atsuo ISOBE ,  Toshinari SASAKI ,  Junichi KOEZUKA ,  Shunpei YAMAZAKI

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/4238 ,  H01L21/02565 ,  H01L21/265 ,  H01L21/425 ,  H01L21/84 ,  H01L27/1085 ,  H01L27/10876 ,  H01L27/1156 ,  H01L27/1203 ,  H01L27/1225 ,  H01L28/40 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/66477 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/7869 ,  H01L29/78693

摘要： It is an object to provide a semiconductor device in which a short-channel effect is suppressed and miniaturization is achieved, and a manufacturing method thereof. A trench is formed in an insulating layer and impurities are added to an oxide semiconductor film in contact with an upper end corner portion of the trench, whereby a source region and a drain region are formed. With the above structure, miniaturization can be achieved. Further, with the trench, a short-channel effect can be suppressed setting the depth of the trench as appropriate even when a distance between a source electrode layer and a drain electrode layer is shortened.

摘要翻译： 本发明的目的是提供一种抑制短路效应并实现小型化的半导体器件及其制造方法。 在绝缘层中形成沟槽，并且将杂质添加到与沟槽的上端角部接触的氧化物半导体膜，由此形成源极区域和漏极区域。 利用上述结构，可以实现小型化。 此外，利用沟槽，即使当源电极层和漏电极层之间的距离缩短时，也可以适当地抑制沟槽的深度适当地设定短沟道效应。

公开(公告)号：US20130069055A1

公开(公告)日：2013-03-21

申请号：US13608044

申请日：2012-09-10

申请人： Shunpei YAMAZAKI ,  Atsuo ISOBE ,  Hiromachi GODO ,  Takehisa HATANO ,  Sachiaki TEZUKA ,  Suguru HONDO ,  Naoto YAMADE ,  Junichi KOEZUKA

发明人： Shunpei YAMAZAKI ,  Atsuo ISOBE ,  Hiromachi GODO ,  Takehisa HATANO ,  Sachiaki TEZUKA ,  Suguru HONDO ,  Naoto YAMADE ,  Junichi KOEZUKA

IPC分类号： H01L29/78

CPC分类号： H01L29/41733 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693

摘要： Provided is a semiconductor device in which an oxide semiconductor layer is provided; a pair of wiring layers which are provided with the gate electrode layer interposed therebetween are electrically connected to the low-resistance regions; and electrode layers are provided to be in contact with the low-resistance regions, below regions where the wiring layers are formed.

摘要翻译： 提供一种半导体器件，其中提供氧化物半导体层; 设置有栅极电极层的一对布线层电连接到低电阻区域; 并且电极层设置成与低电阻区域接触，在形成布线层的区域之下。

公开(公告)号：US20110212569A1

公开(公告)日：2011-09-01

申请号：US13029148

申请日：2011-02-17

申请人： Shunpei YAMAZAKI ,  Junichi KOEZUKA

发明人： Shunpei YAMAZAKI ,  Junichi KOEZUKA

IPC分类号： H01L21/16

CPC分类号： H01L21/385 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/1368 ,  G02F2201/123 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/4908 ,  H01L29/4958 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

摘要： In a transistor including an oxide semiconductor layer, an oxide insulating layer is formed so as to be in contact with the oxide semiconductor layer. Then, oxygen is introduced (added) to the oxide semiconductor layer through the oxide insulating layer, and heat treatment is performed. Through these steps of oxygen introduction and heat treatment, impurities such as hydrogen, moisture, a hydroxyl group, or hydride are intentionally removed from the oxide semiconductor layer, so that the oxide semiconductor layer is highly purified.

摘要翻译： 在包括氧化物半导体层的晶体管中，形成与氧化物半导体层接触的氧化物绝缘层。 然后，通过氧化物绝缘层将氧引入（添加）到氧化物半导体层，并进行热处理。 通过氧气引入和热处理的这些步骤，有意地从氧化物半导体层除去诸如氢，水分，羟基或氢化物的杂质，使得氧化物半导体层被高度纯化。

公开(公告)号：US20120164817A1

公开(公告)日：2012-06-28

申请号：US13411864

申请日：2012-03-05

申请人： Takeshi SHICHI ,  Junichi KOEZUKA ,  Hideto OHNUMA ,  Shunpei YAMAZAKI

发明人： Takeshi SHICHI ,  Junichi KOEZUKA ,  Hideto OHNUMA ,  Shunpei YAMAZAKI

IPC分类号： H01L21/46

CPC分类号： H01L27/1266 ,  H01L21/76254 ,  H01L27/1214 ,  H01L29/66772

摘要： The present invention provides a method for manufacturing an SOI substrate, to improve planarity of a surface of a single crystal semiconductor layer after separation by favorably separating a single crystal semiconductor substrate even in the case where a non-mass-separation type ion irradiation method is used, and to improve planarity of a surface of a single crystal semiconductor layer after separation as well as to improve throughput. The method includes the steps of irradiating a single crystal semiconductor substrate with accelerated ions by an ion doping method while the single crystal semiconductor substrate is cooled to form an embrittled region in the single crystal semiconductor substrate; bonding the single crystal semiconductor substrate and a base substrate with an insulating layer interposed therebetween; and separating the single crystal semiconductor substrate along the embrittled region to form a single crystal semiconductor layer over the base substrate with the insulating layer interposed therebetween.

摘要翻译： 本发明提供一种制造SOI衬底的方法，即使在非质量分离型离子照射方法为非质子分离型离子照射方法的情况下，通过有利地分离单晶半导体衬底来提高分离后的单晶半导体层的表面的平面性 并且在分离之后提高单晶半导体层的表面的平面性以及提高生产量。 该方法包括以下步骤：当单晶半导体衬底被冷却以在单晶半导体衬底中形成脆化区域时，通过离子掺杂方法照射具有加速离子的单晶半导体衬底; 将单晶半导体衬底和基底衬底之间插入绝缘层; 并且沿着脆化区域分离单晶半导体衬底，以在基底衬底上形成绝缘层，形成单晶半导体层。

公开(公告)号：US20100117073A1

公开(公告)日：2010-05-13

申请号：US12612021

申请日：2009-11-04

申请人： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Tetsunori MARUYAMA ,  Yuki IMOTO ,  Yuji ASANO ,  Junichi KOEZUKA

发明人： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Tetsunori MARUYAMA ,  Yuki IMOTO ,  Yuji ASANO ,  Junichi KOEZUKA

IPC分类号： H01L29/786 ,  H01L21/34

CPC分类号： H01L29/66742 ,  C04B35/58 ,  C04B2235/3284 ,  C04B2235/3286 ,  H01L27/1225 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869

摘要： In a thin film transistor which uses an oxide semiconductor, buffer layers containing indium, gallium, zinc, oxygen, and nitrogen are provided between the oxide semiconductor layer and the source and drain electrode layers.

摘要翻译： 在使用氧化物半导体的薄膜晶体管中，在氧化物半导体层和源极和漏极电极层之间设置包含铟，镓，锌，氧和氮的缓冲层。

公开(公告)号：US20130023087A1

公开(公告)日：2013-01-24

申请号：US13547451

申请日：2012-07-12

申请人： Shunpei YAMAZAKI ,  Shinji OHNO ,  Yuichi SATO ,  Junichi KOEZUKA ,  Sachiaki TEZUKA

发明人： Shunpei YAMAZAKI ,  Shinji OHNO ,  Yuichi SATO ,  Junichi KOEZUKA ,  Sachiaki TEZUKA

IPC分类号： H01L21/385 ,  H01L21/36

CPC分类号： H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02664 ,  H01L27/1225

摘要： To provide an oxide semiconductor film including a low-resistance region, which can be applied to a transistor. To provide a transistor including the oxide semiconductor film, which can perform at high speed. To provide a high-performance semiconductor device including the transistor including the oxide semiconductor film, which can perform at high speed, with high yield. A film having a reducing property is formed over the oxide semiconductor film. Next, part of oxygen atoms are transferred from the oxide semiconductor film to the film having a reducing property. Next, an impurity is added to the oxide semiconductor film through the film having a reducing property and then, the film having a reducing property is removed, so that a low-resistance region is formed in the oxide semiconductor film.

摘要翻译： 提供一种可以应用于晶体管的包含低电阻区域的氧化物半导体膜。 提供可以高速执行的包括氧化物半导体膜的晶体管。 提供一种高性能半导体器件，其包括能够以高产率高速执行的包括氧化物半导体膜的晶体管。 在氧化物半导体膜上形成具有还原性的膜。 接下来，氧原子的一部分从氧化物半导体膜转移到具有还原性的膜。 接下来，通过具有还原性的膜向氧化物半导体膜添加杂质，然后去除具有还原性的膜，从而在氧化物半导体膜中形成低电阻区域。