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    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    1.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20120061663A1

    公开(公告)日：2012-03-15

    申请号：US13226713

    申请日：2011-09-07

    申请人： Shunpei YAMAZAKI ,  Yusuke NONAKA ,  Takayuki INOUE ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Akiharu MIYANAGA

    发明人： Shunpei YAMAZAKI ,  Yusuke NONAKA ,  Takayuki INOUE ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Akiharu MIYANAGA

    IPC分类号： H01L29/12 ,  H01L21/34

    CPC分类号： H01L29/7869 ,  H01L21/02488 ,  H01L21/02554 ,  H01L21/02565 ,  H01L29/04 ,  H01L29/24 ,  H01L29/78603

    摘要： An object is to provide a semiconductor device including an oxide semiconductor film, which has stable electrical characteristics and high reliability. A stack of first and second material films is formed by forming the first material film (a film having a hexagonal crystal structure) having a thickness of 1 nm to 10 nm over an insulating surface and forming the second material film having a hexagonal crystal structure (a crystalline oxide semiconductor film) using the first material film as a nucleus. As the first material film, a material film having a wurtzite crystal structure (e.g., gallium nitride or aluminum nitride) or a material film having a corundum crystal structure (α-Al2O3, α-Ga2O3, In2O3, Ti2O3, V2O3, Cr2O3, or α-Fe2O3) is used.

    摘要翻译： 本发明的目的是提供一种具有稳定的电气特性和高可靠性的氧化物半导体膜的半导体装置。 通过在绝缘表面上形成厚度为1nm至10nm的第一材料膜（具有六方晶体结构的膜）形成第一和第二材料膜的叠层，并形成具有六方晶系结构的第二材料膜（ 使用第一材料膜作为核的结晶氧化物半导体膜）。 作为第一材料膜，具有纤锌矿晶体结构的材料膜（例如氮化镓或氮化铝）或具有刚玉晶体结构的材料膜（α-Al 2 O 3，α-Ga 2 O 3，In 2 O 3，Ti 2 O 3，V 2 O 3，Cr 2 O 3，或 α-Fe 2 O 3）。

    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    2.
    发明申请
    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号：US20120064664A1

    公开(公告)日：2012-03-15

    申请号：US13222513

    申请日：2011-08-31

    申请人： Shunpei YAMAZAKI ,  Yusuke NONAKA ,  Takayuki INOUE ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Akiharu MIYANAGA

    发明人： Shunpei YAMAZAKI ,  Yusuke NONAKA ,  Takayuki INOUE ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Akiharu MIYANAGA

    IPC分类号： H01L21/44

    CPC分类号： H01L29/78606 ,  H01L23/552 ,  H01L23/564 ,  H01L29/04 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An object is to manufacture a semiconductor device including an oxide semiconductor film, which has stable electric characteristics and high reliability. A crystalline oxide semiconductor film is formed, without performing a plurality of steps, as follows: by utilizing a difference in atomic weight of plural kinds of atoms included in an oxide semiconductor target, zinc with low atomic weight is preferentially deposited on an oxide insulating film to form a seed crystal including zinc; and tin, indium, or the like with high atomic weight is deposited on the seed crystal while causing crystal growth. Further, a crystalline oxide semiconductor film is formed by causing crystal growth using a seed crystal with a hexagonal crystal structure including zinc as a nucleus, whereby a single crystal oxide semiconductor film or a substantially single crystal oxide semiconductor film is formed.

    摘要翻译： 本发明的目的是制造具有稳定的电特性和高可靠性的氧化物半导体膜的半导体装置。 通过利用包含在氧化物半导体靶中的多种原子的原子量的差异，形成结晶氧化物半导体膜，而不进行多个步骤，优选将低原子量的锌沉积在氧化物绝缘膜上 形成包含锌的晶种; 并且具有高原子量的锡，铟等沉积在晶种上同时引起晶体生长。 此外，通过使用具有包含锌作为核的六方晶系结构的晶种进行晶体生长来形成结晶氧化物半导体膜，从而形成单晶氧化物半导体膜或大致单晶氧化物半导体膜。

    TRANSISTOR AND DISPLAY DEVICE
    5.
    发明申请
    TRANSISTOR AND DISPLAY DEVICE 审中-公开
    晶体管和显示器件

    公开(公告)号：US20110062436A1

    公开(公告)日：2011-03-17

    申请号：US12880343

    申请日：2010-09-13

    申请人： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Ryosuke WATANABE ,  Junichiro SAKATA ,  Kengo AKIMOTO ,  Akiharu MIYANAGA ,  Takuya HIROHASHI ,  Hideyuki KISHIDA

    发明人： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Ryosuke WATANABE ,  Junichiro SAKATA ,  Kengo AKIMOTO ,  Akiharu MIYANAGA ,  Takuya HIROHASHI ,  Hideyuki KISHIDA

    IPC分类号： H01L29/12

    CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/045 ,  H01L29/78618 ,  H01L29/78693 ,  H01L29/78696

    摘要： To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.

    摘要翻译： 提供具有良好的电特性和高可靠性的晶体管以及包括该晶体管的显示装置。 晶体管是使用用于沟道区的氧化物半导体形成的底栅晶体管。 使用通过热处理进行脱水或脱氢的氧化物半导体层作为活性层。 有源层包括微结晶的浅表部分的第一区域和其余部分的第二区域。 通过使用具有这种结构的氧化物半导体层，可以抑制归因于表层部分的水分进入或从表面部分的氧的消除导致的n型变化，以及寄生通道的产生。 此外，可以减小氧化物半导体层与源极和漏极之间的接触电阻。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    6.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20100032667A1

    公开(公告)日：2010-02-11

    申请号：US12535714

    申请日：2009-08-05

    申请人： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Akiharu MIYANAGA ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

    发明人： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Akiharu MIYANAGA ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L29/7869 ,  H01L29/78618

    摘要： One of the objects of the present invention is to provide a thin film transistor using an oxide semiconductor film containing indium (In), gallium (Ga), and zinc (Zn), in which the contact resistance between the oxide semiconductor layer and a source and drain electrodes is reduced, and to provide a method for manufacturing the thin film transistor. An ohmic contact is formed by intentionally providing a buffer layer having a higher carrier concentration than the IGZO semiconductor layer between the IGZO semiconductor layer and the source and drain electrode layers.

    摘要翻译： 本发明的目的之一是提供一种使用含有铟（In），镓（Ga）和锌（Zn））的氧化物半导体膜的薄膜晶体管，其中氧化物半导体层和源极之间的接触电阻 并且减少了漏电极，并且提供了制造薄膜晶体管的方法。 通过有意地提供具有比IGZO半导体层和源极和漏极电极层之间的IGZO半导体层更高的载流子浓度的缓冲层来形成欧姆接触。

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    7.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
    半导体器件及其制造方法

    公开(公告)号：US20100025676A1

    公开(公告)日：2010-02-04

    申请号：US12511252

    申请日：2009-07-29

    申请人： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Akiharu MIYANAGA ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

    发明人： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Akiharu MIYANAGA ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78618

    摘要： To offer a semiconductor device including a thin film transistor having excellent characteristics and high reliability and a method for manufacturing the semiconductor device without variation. The summary is to include an inverted-staggered (bottom-gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used for a semiconductor layer and a buffer layer is provided between the semiconductor layer and source and drain electrode layers. An ohmic contact is formed by intentionally providing a buffer layer containing In, Ga, and Zn and having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrode layers.

    摘要翻译： 提供一种包括具有优异特性和高可靠性的薄膜晶体管的半导体器件以及不改变半导体器件的制造方法。 总结在于包括反向交错（底栅结构）薄膜晶体管，其中包含In，Ga和Zn的氧化物半导体膜用于半导体层，并且在半导体层和源之间提供缓冲层， 漏电极层。 通过有意地提供包含In，Ga和Zn的缓冲层并且具有比半导体层和源极和漏极电极层之间的半导体层更高的载流子浓度来形成欧姆接触。

    TRANSISTOR AND DISPLAY DEVICE
    9.
    发明申请
    TRANSISTOR AND DISPLAY DEVICE 审中-公开
    晶体管和显示器件

    公开(公告)号：US20120256179A1

    公开(公告)日：2012-10-11

    申请号：US13528009

    申请日：2012-06-20

    申请人： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Ryosuke WATANABE ,  Junichiro SAKATA ,  Kengo AKIMOTO ,  Akiharu MIYANAGA ,  Takuya HIROHASHI ,  Hideyuki KISHIDA

    发明人： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Ryosuke WATANABE ,  Junichiro SAKATA ,  Kengo AKIMOTO ,  Akiharu MIYANAGA ,  Takuya HIROHASHI ,  Hideyuki KISHIDA

    IPC分类号： H01L29/786

    CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/045 ,  H01L29/78618 ,  H01L29/78693 ,  H01L29/78696

    摘要： To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.

    摘要翻译： 提供具有良好的电特性和高可靠性的晶体管以及包括该晶体管的显示装置。 晶体管是使用用于沟道区的氧化物半导体形成的底栅晶体管。 使用通过热处理进行脱水或脱氢的氧化物半导体层作为活性层。 有源层包括微结晶的浅表部分的第一区域和其余部分的第二区域。 通过使用具有这种结构的氧化物半导体层，可以抑制归因于表层部分的水分进入或从表面部分的氧的消除导致的n型变化，以及寄生通道的产生。 此外，可以减小氧化物半导体层与源极和漏极之间的接触电阻。