Zero power chip standby mode
    1.
    发明授权

    公开(公告)号:US06845054B2

    公开(公告)日:2005-01-18

    申请号:US10230046

    申请日:2002-08-28

    IPC分类号: G11C5/14 G11C7/00 G11C5/06

    CPC分类号: G11C5/141

    摘要: A zero power standby mode in a memory device used in a system, such as a battery powered hand held device. By disconnecting the internal power supply bus on the memory device from the external power supply during standby mode, the junction leakage and gate induced drain leakage can be eliminated to achieve a true zero-power standby mode. A p-channel field effect transistor (FET) may be used to gate the external power supply such that the internal power supply bus on the memory device may be disconnected from the external power supply.

    Zero power chip standby mode
    2.
    发明授权

    公开(公告)号:US06879538B2

    公开(公告)日:2005-04-12

    申请号:US10228932

    申请日:2002-08-28

    IPC分类号: G11C5/14 G11C7/00

    CPC分类号: G11C5/141

    摘要: A zero power standby mode in a memory device used in a system, such as a battery powered hand held device. By disconnecting the internal power supply bus on the memory device from the external power supply during standby mode, the junction leakage and gate induced drain leakage can be eliminated to achieve a true zero-power standby mode. A p-channel field effect transistor (FET) may be used to gate the external power supply such that the internal power supply bus on the memory device may be disconnected from the external power supply.

    Zero power chip standby mode
    3.
    发明授权
    Zero power chip standby mode 失效
    零功率芯片待机模式

    公开(公告)号:US06909659B2

    公开(公告)日:2005-06-21

    申请号:US09942898

    申请日:2001-08-30

    IPC分类号: G11C5/14 H11C7/00 H11C5/06

    CPC分类号: G11C5/141

    摘要: A zero power standby mode in a memory device used in a system, such as a battery powered hand held device. By disconnecting the internal power supply bus on the memory device from the external power supply during standby mode, the junction leakage and gate induced drain leakage can be eliminated to achieve a true zero-power standby mode. A p-channel field effect transistor (FET) may be used to gate the external power supply such that the internal power supply bus on the memory device may be disconnected from the external power supply.

    摘要翻译: 在系统中使用的存储设备中的零功率待机模式,例如电池供电的手持设备。 通过在待机模式下断开存储器件内部电源总线与外部电源的连接,可以消除结漏电和漏极泄漏漏电,从而达到真正的零功率待机模式。 可以使用p沟道场效应晶体管(FET)来栅极外部电源,使得存储器件上的内部电源总线可以与外部电源断开。

    Zero power chip standby mode
    4.
    发明授权

    公开(公告)号:US06925024B2

    公开(公告)日:2005-08-02

    申请号:US10232935

    申请日:2002-08-28

    IPC分类号: G11C5/14 G11C7/00 G11C5/06

    CPC分类号: G11C5/141

    摘要: A zero power standby mode in a memory device used in a system, such as a battery powered hand held device. By disconnecting the internal power supply bus on the memory device from the external power supply during standby mode, the junction leakage and gate induced drain leakage can be eliminated to achieve a true zero-power standby mode. A p-channel field effect transistor (FET) may be used to gate the external power supply such that the internal power supply bus on the memory device may be disconnected from the external power supply.

    METHOD FOR MEASURING A TEMPERATURE IN AN ELECTRONIC DEVICE HAVING A BATTERY AND A MEMORY DEVICE
    6.
    发明申请
    METHOD FOR MEASURING A TEMPERATURE IN AN ELECTRONIC DEVICE HAVING A BATTERY AND A MEMORY DEVICE 有权
    用于在具有电池和存储器件的电子设备中测量温度的方法

    公开(公告)号:US20120166862A1

    公开(公告)日:2012-06-28

    申请号:US13412205

    申请日:2012-03-05

    申请人: Simon J. Lovett

    发明人: Simon J. Lovett

    IPC分类号: G06F1/14 G06F1/24

    摘要: A temperature sensing device can be embedded in a memory module or system in order to sense the temperature of the memory module or system. One oscillator generates a temperature variable signal that increases frequency as the temperature of the oscillator increases and decreases frequency when the temperature of the oscillator decreases. A temperature invariant oscillator generates a fixed width signal that is controlled by an oscillator read logic and indicates a temperature sense cycle. An n-bit counter is clocked by the temperature variable signal while the fixed width signal enables/inhibits the counter. The faster the counter counts, the larger the count value at the end of the sense cycle indicated by the fixed width signal. A larger count value indicates a warmer temperature. A smaller count value indicates a colder temperature.

    摘要翻译: 温度感测装置可嵌入存储器模块或系统中,以便感测存储器模块或系统的温度。 当振荡器的温度降低时,一个振荡器产生温度可变信号,随着振荡器的温度升高而频率增加,并降低频率。 温度不变振荡器产生由振荡器读取逻辑控制并指示温度感测周期的固定宽度信号。 n位计数器由温度可变信号计时,而固定宽度信号启用/禁止计数器。 计数器计数越快,固定宽度信号指示的感测周期结束时的计数值越大。 较大的计数值表示较暖的温度。 较小的计数值表示较冷的温度。

    Method for measuring a temperature in an electronic device having a battery and a memory device
    7.
    发明授权
    Method for measuring a temperature in an electronic device having a battery and a memory device 有权
    用于测量具有电池和存储器件的电子设备中的温度的方法

    公开(公告)号:US08129956B2

    公开(公告)日:2012-03-06

    申请号:US12910287

    申请日:2010-10-22

    申请人: Simon J. Lovett

    发明人: Simon J. Lovett

    IPC分类号: H01M10/44

    摘要: A temperature sensing device can be embedded in a memory circuit in order to sense the temperature of the memory circuit. One oscillator generates a temperature variable signal that increases frequency as the temperature of the oscillator increases and decreases frequency when the temperature of the oscillator decreases. A temperature invariant oscillator generates a fixed width signal that is controlled by an oscillator read logic and indicates a temperature sense cycle. An n-bit counter is clocked by the temperature variable signal while the fixed width signal enables/inhibits the counter. The faster the counter counts, the larger the count value at the end of the sense cycle indicated by the fixed width signal. A larger count value indicates a warmer temperature. A smaller count value indicates a colder temperature.

    摘要翻译: 温度感测装置可嵌入存储器电路中以便感测存储器电路的温度。 当振荡器的温度降低时,一个振荡器产生温度可变信号,随着振荡器的温度升高而频率增加,并降低频率。 温度不变振荡器产生由振荡器读取逻辑控制并指示温度感测周期的固定宽度信号。 n位计数器由温度可变信号计时,而固定宽度信号启用/禁止计数器。 计数器计数越快,固定宽度信号指示的感测周期结束时的计数值越大。 较大的计数值表示较暖的温度。 较小的计数值表示较冷的温度。

    Detection circuit for mixed asynchronous and synchronous memory operation
    8.
    发明授权
    Detection circuit for mixed asynchronous and synchronous memory operation 有权
    用于混合异步和同步存储器操作的检测电路

    公开(公告)号:US07640413B2

    公开(公告)日:2009-12-29

    申请号:US11726094

    申请日:2007-03-20

    申请人: Simon J. Lovett

    发明人: Simon J. Lovett

    IPC分类号: G06F12/00

    摘要: A memory access mode detection circuit and method for detecting and initiating memory access modes for a memory device The memory access mode detection circuit receives the memory address signals, the control signals, and the clock signal and generates a first mode detection signal in response to receipt of the memory address signals or a first combination of control signals. An first mode initiation signal is generated a time delay subsequent to the detection signal to initiate the first mode memory access operation. In response to receipt of a second combination of control signals and an active clock signal, the memory access mode detection circuit further generates a second mode detection signal to initiate a second mode memory access operation and to suppress generation of the first mode detection signal, thereby canceling the first mode memory access operation.

    摘要翻译: 一种存储器访问模式检测电路和方法,用于检测和启动存储器件的存储器访问模式存储器访问模式检测电路接收存储器地址信号,控制信号和时钟信号,并响应于接收产生第一模式检测信号 的存储器地址信号或控制信号的第一组合。 在检测信号之后产生第一模式启动信号,以启动第一模式存储器访问操作。 响应于接收到控制信号和活动时钟信号的第二组合,存储器访问模式检测电路还产生第二模式检测信号以启动第二模式存储器访问操作并且抑制第一模式检测信号的产生,从而 取消第一模式存储器存取操作。

    TEMPERATURE SENSING DEVICE IN AN INTEGRATED CIRCUIT
    9.
    发明申请
    TEMPERATURE SENSING DEVICE IN AN INTEGRATED CIRCUIT 有权
    集成电路中的温度感测器件

    公开(公告)号:US20090072795A1

    公开(公告)日:2009-03-19

    申请号:US12273626

    申请日:2008-11-19

    申请人: Simon J. Lovett

    发明人: Simon J. Lovett

    IPC分类号: H02J7/00

    摘要: A temperature sensing device can be embedded in a memory circuit in order to sense the temperature of the memory circuit. One oscillator generates a temperature variable signal that increases frequency as the temperature of the oscillator increases and decreases frequency when the temperature of the oscillator decreases. A temperature invariant oscillator generates a fixed width signal that is controlled by an oscillator read logic and indicates a temperature sense cycle. An n-bit counter is clocked by the temperature variable signal while the fixed width signal enables/inhibits the counter. The faster the counter counts, the larger the count value at the end of the sense cycle indicated by the fixed width signal. A larger count value indicates a warmer temperature. A smaller count value indicates a colder temperature.

    摘要翻译: 温度感测装置可嵌入存储器电路中以便感测存储器电路的温度。 当振荡器的温度降低时,一个振荡器产生温度可变信号,随着振荡器的温度升高而频率增加,并降低频率。 温度不变振荡器产生由振荡器读取逻辑控制并指示温度感测周期的固定宽度信号。 n位计数器由温度可变信号计时,而固定宽度信号启用/禁止计数器。 计数器计数越快,固定宽度信号指示的感测周期结束时的计数值越大。 较大的计数值表示较暖的温度。 较小的计数值表示较冷的温度。

    BLOCK ERASE FOR VOLATILE MEMORY
    10.
    发明申请
    BLOCK ERASE FOR VOLATILE MEMORY 有权
    挥发性存储器的封存

    公开(公告)号:US20080285369A1

    公开(公告)日:2008-11-20

    申请号:US12183646

    申请日:2008-07-31

    申请人: Simon J. Lovett

    发明人: Simon J. Lovett

    IPC分类号: G11C7/00

    摘要: A system and method for erasing a block of data in a plurality of memory cells includes clamping one of a digit line and an I/O line in a sensing circuit of a memory device to a fixed logic level. The memory cells of the block of memory cells are selected and refreshed to the fixed logic level. A sense amplifier includes a clamping circuit adapted to connect one of a digit line and an I/O line to a fixed logic level in response to an erase signal during a refresh of the selected block of memory cells.

    摘要翻译: 用于擦除多个存储器单元中的数据块的系统和方法包括将存储器件的感测电路中的数字线和I / O线中的一个钳位到固定逻辑电平。 存储器单元块的存储单元被选择并刷新到固定逻辑电平。 读出放大器包括钳位电路,其适于在刷新所选择的存储单元块期间响应于擦除信号将数字线和I / O线之一连接到固定逻辑电平。