Closely-spaced VCSEL and photodetector for applications requiring their independent operation
    1.
    发明授权
    Closely-spaced VCSEL and photodetector for applications requiring their independent operation 失效
    紧密间隔的VCSEL和光电检测器,可用于需要独立操作的应用

    公开(公告)号:US06835992B1

    公开(公告)日:2004-12-28

    申请号:US09484348

    申请日:2000-01-18

    IPC分类号: H01L3106

    摘要: A monolthically integrated VCSEL and photodetector, and a method of manufacturing same, are disclosed for applications where the VCSEL and photodetector require separate operation such as duplex serial data communications applications. A first embodiment integrates a VCSEL with an MSM photodetector on a semi-insulating substrate. A second embodiment builds the layers of a p-i-n photodiode on top of layers forming a VCSEL using a standard VCSEL process. The p-i-n layers are etched away in areas where VCSELs are to be formed and left where the photodetectors are to be formed. The VCSELs underlying the photodetectors are inoperable, and serve to recirculate photons back into the photodetector not initially absorbed. The transmit and receive pairs are packaged in a single package for interface to multifiber ferrules. The distance between the devices is precisely defined photolithographically, thereby making alignment easier.

    摘要翻译: 公开了一种单分布式VCSEL和光电检测器及其制造方法,其中VCSEL和光电探测器需要单独的操作,例如双工串行数据通信应用。 第一实施例将VCSEL与半绝缘衬底上的MSM光电检测器集成。 第二实施例使用标准VCSEL工艺在形成VCSEL的层的顶部上构建p-i-n光电二极管的层。 在要形成VCSEL的区域中蚀刻掉p-i-n层,并留在要形成光电探测器的位置。 光电探测器下面的VCSEL是不可操作的,并且用于将光子再循环回到初始被吸收的光电探测器中。 发送和接收对被封装在单个封装中,用于与多光纤套圈的接口。 设备之间的距离是光刻的精确定义,从而使对准更容易。

    Method for making closely-spaced VCSEL and photodetector on a substrate
    3.
    发明授权
    Method for making closely-spaced VCSEL and photodetector on a substrate 失效
    在衬底上制造紧密间隔的VCSEL和光电检测器的方法

    公开(公告)号:US6001664A

    公开(公告)日:1999-12-14

    申请号:US803891

    申请日:1997-02-21

    IPC分类号: H01S5/026 H01S5/183 H01L21/00

    摘要: A monolthically integrated VCSEL and photodetector, and a method of manufacturing same, are disclosed for applications where the VCSEL and photodetector require separate operation such as duplex serial data communications applications. A first embodiment integrates a VCSEL with an MSM photodetector on a semi-insulating substrate. A second embodiment builds the layers of a p-i-n photodiode on top of layers forming a VCSEL using a standard VCSEL process. The p-i-n layers are etched away in areas where VCSELs are to be formed and left where the photodetectors are to be formed. The VCSELs underlying the photodetectors are inoperable, and serve to recirculate photons back into the photodetector not initially absorbed. The transmit and receive pairs are packaged in a single package for interface to multifiber ferrules. The distance between the devices is precisely defined photolithographically, thereby making alignment easier.

    摘要翻译: 公开了一种单分布式VCSEL和光电检测器及其制造方法,其中VCSEL和光电探测器需要单独的操作,例如双工串行数据通信应用。 第一实施例将VCSEL与半绝缘衬底上的MSM光电检测器集成。 第二实施例使用标准VCSEL工艺在形成VCSEL的层的顶部上构建p-i-n光电二极管的层。 在要形成VCSEL的区域中蚀刻掉p-i-n层,并留在要形成光电探测器的位置。 光电探测器下面的VCSEL是不可操作的,并且用于将光子再循环回到初始被吸收的光电探测器中。 发送和接收对被封装在单个封装中,用于与多光纤套圈的接口。 设备之间的距离是光刻的精确定义,从而使对准更容易。

    FET having a dielectrically isolated gate connect
    4.
    发明授权
    FET having a dielectrically isolated gate connect 失效
    具有介电隔离栅极的FET连接

    公开(公告)号:US5677554A

    公开(公告)日:1997-10-14

    申请号:US435119

    申请日:1995-05-05

    摘要: A HIGFET having a gate with a pad which is isolated from the FET heterostructure wafer by a dielectric layer to minimize leakage current between the gate and the wafer. The method of production of this device involves application of the gate metal only over the active area of the FET and a photo resist covering on the gate metal. The wafer, including the area covered by the photo resist, is covered with the dielectric layer. The photo resist layer is removed along with the dielectric layer from over the gate metal. Another layer of gate metal is formed on the preexisting gate metal including a gate pad on part of the remaining dielectric layer.

    摘要翻译: 具有栅极的HIGFET,其具有通过电介质层与FET异质结构晶片隔离的焊盘,以最小化栅极和晶片之间的漏电流。 该器件的制造方法包括仅在FET的有源区域上施加栅极金属,并在栅极金属上施加光刻胶。 包括由光致抗蚀剂覆盖的区域的晶片被电介质层覆盖。 与栅极金属上的电介质层一起除去光致抗蚀剂层。 在预先存在的栅极金属上形成另一层栅极金属,该栅极金属包括在剩余电介质层的一部分上的栅极焊盘。

    Control circuits for parallel optical interconnects
    5.
    发明授权
    Control circuits for parallel optical interconnects 失效
    用于并行光互连的控制电路

    公开(公告)号:US5625480A

    公开(公告)日:1997-04-29

    申请号:US653156

    申请日:1996-05-24

    CPC分类号: H04B10/803

    摘要: Simple and efficient electronic circuits and methods are disclosed for better use of parallel optical interconnect system transmitting a plurality of dc NRZ data and an independent clock signal. The present invention dynamically compensates for the effects of the substrate temperature and aging behavior of the light emitters at both the transmitter and the receiver. In addition, a special arrangement of light emitters is used to reduce or avoid skew problems.

    摘要翻译: 公开了简单且高效的电子电路和方法,以更好地利用传输多个直流NRZ数据和独立时钟信号的并行光互连系统。 本发明动态地补偿发射器和接收器两者的发光体的衬底温度和老化特性的影响。 另外,使用光发射器的特殊布置来减少或避免偏斜问题。

    Integration of laser with photodiode for feedback control
    6.
    发明授权
    Integration of laser with photodiode for feedback control 失效
    激光与光电二极管的集成用于反馈控制

    公开(公告)号:US5577064A

    公开(公告)日:1996-11-19

    申请号:US544926

    申请日:1995-10-18

    摘要: Photodiodes are integrally formed with vertical cavity surface emitting lasers (VCSELs) and superluminescent light emitting diodes (SLEDs) for monitoring optical radiation intensities. In different embodiments, the photodiode is epitaxially formed within a mirror of a VCSEL, non-epitaxially formed on top of a VCSEL, non-epitaxially formed on side of a VCSEL, or formed on the substrate on the side opposite the VCSEL. A lateral injection vertical cavity surface emitting laser is also disclosed for integration with a lateral PIN photodiode. A photodiode having the same epitaxial layers as a VCSEL is also integrally formed alongside of the VCSEL. Similar devices using SLEDs are also disclosed.

    摘要翻译: 光电二极管与用于监测光辐射强度的垂直腔表面发射激光器(VCSEL)和超发光发光二极管(SLED)一体形成。 在不同的实施例中,光电二极管被外延地形成在VCSEL的反射镜内,非VCSEL外镜形成在VCSEL的一侧上,或者形成在与VCSEL相对的一侧上的衬底上。 还公开了横向注入垂直腔表面发射激光器以与侧向PIN光电二极管集成。 具有与VCSEL相同的外延层的光电二极管也与VCSEL一起形成。 还公开了使用SLED的类似设备。

    Integration of laser with photodiode for feedback control
    7.
    发明授权
    Integration of laser with photodiode for feedback control 失效
    激光与光电二极管的集成用于反馈控制

    公开(公告)号:US5606572A

    公开(公告)日:1997-02-25

    申请号:US217531

    申请日:1994-03-24

    摘要: Photodiodes are integrally formed with vertical cavity surface emitting lasers (VCSELs) and superluminescent light emitting diodes (SLEDs) for monitoring optical radiation intensities. In different embodiments, the photodiode is epitaxially formed within a mirror of a VCSEL, non-epitaxially formed on top of a VCSEL, non-epitaxially formed on side of a VCSEL, or formed on the substrate on the side opposite the VCSEL. A lateral injection vertical cavity surface emitting laser is also disclosed for integration with a lateral PIN photodiode. A photodiode having the same epitaxial layers as a VCSEL is also integrally formed alongside of the VCSEL. Similar devices using SLEDs are also disclosed.

    摘要翻译: 光电二极管与用于监测光辐射强度的垂直腔表面发射激光器(VCSEL)和超发光发光二极管(SLED)一体形成。 在不同的实施例中,光电二极管被外延地形成在VCSEL的反射镜内,非VCSEL外镜形成在VCSEL的一侧上,或者形成在与VCSEL相对的一侧上的衬底上。 还公开了横向注入垂直腔表面发射激光器以与侧向PIN光电二极管集成。 具有与VCSEL相同的外延层的光电二极管也与VCSEL一起形成。 还公开了使用SLED的类似设备。

    Control circuits for parallel optical interconnects
    8.
    发明授权
    Control circuits for parallel optical interconnects 失效
    用于并行光互连的控制电路

    公开(公告)号:US5521736A

    公开(公告)日:1996-05-28

    申请号:US302313

    申请日:1994-09-29

    CPC分类号: H04B10/803

    摘要: Simple and efficient electronic circuits and methods are disclosed for better use of parallel optical interconnect system transmitting a plurality of dc NRZ data and an independent clock signal. The present invention dynamically compensates for the effects of the substrate temperature and aging behavior of the light emitters at both the transmitter and the receiver. In addition, a special arrangement of light emitters is used to reduce or avoid skew problems.

    摘要翻译: 公开了简单且高效的电子电路和方法,以更好地利用传输多个直流NRZ数据和独立时钟信号的并行光互连系统。 本发明动态地补偿发射器和接收器两者的发光体的衬底温度和老化特性的影响。 另外,使用光发射器的特殊布置来减少或避免偏斜问题。

    FET having minimized parasitic gate capacitance
    9.
    发明授权
    FET having minimized parasitic gate capacitance 失效
    FET具有最小的寄生栅极电容

    公开(公告)号:US5461244A

    公开(公告)日:1995-10-24

    申请号:US176599

    申请日:1994-01-03

    摘要: A HIGFET having a gate pad situated over a non conducting portion of the channel layer of the heterostructure wafer. The method of producing this device involves application of a very thin layer of gate metal on the wafer to protect the wafer surface during further processing. A photoresist coating is formed over the active area of the channel layer of the FET. An ion isolation implantation is applied to the wafer resulting in a non conducting portion of the channel layer that is not covered by the photoresist layer. The photoresist layer is removed and a thick layer of gate metal is applied on the thin layer of gate metal. The gate layers are fashioned into a pad over the non conducting portion of the channel layer and at least one finger over the conducting portion of the channel layer, resulting in the gate having minimized parasitic gate capacitance.

    摘要翻译: HIGFET具有位于异质结构晶片的沟道层的非导电部分之上的栅极焊盘。 制造该器件的方法包括在晶片上施加非常薄的栅极金属层,以在进一步处理期间保护晶片表面。 在FET的沟道层的有效区域上形成光致抗蚀剂涂层。 对晶片施加离子隔离注入,导致沟道层的不被光致抗蚀剂层覆盖的非导电部分。 去除光致抗蚀剂层,并且在栅极金属的薄层上施加厚的栅极金属层。 栅极层被形成沟道层的非导电部分上的焊盘,并且在沟道层的导电部分上方形成至少一个手指,导致栅极具有最小化的寄生栅极电容。