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公开(公告)号:US5854870A
公开(公告)日:1998-12-29
申请号:US027724
申请日:1993-03-04
申请人: Sten Helmfrid , Kenchi Ito , Kimio Tatsuno , Kazumi Kawamoto , Tetsuo Andou , Hiroshi Momiji , Osamu Komoda , Hisao Kurosawa , Masayoshi Sato , Fumio Nitanda , Kohei Ito
发明人: Sten Helmfrid , Kenchi Ito , Kimio Tatsuno , Kazumi Kawamoto , Tetsuo Andou , Hiroshi Momiji , Osamu Komoda , Hisao Kurosawa , Masayoshi Sato , Fumio Nitanda , Kohei Ito
CPC分类号: G02F1/3775 , G02F1/377 , G11B7/127 , G02F1/37 , G02F2001/3546 , H01S5/0092 , H01S5/02248 , H01S5/02288 , H01S5/141
摘要: There is disclosed a harmonic modulation device of waveguide type including a semiconductor laser, a waveguide for generating a nonlinear optical harmonic of the semiconductor laser by keeping phase matching, means for leading an optical beam of the semiconductor laser to the waveguide, electrodes disposed on the waveguide, and means for modulating a refractive index of the waveguide electro-optically to modulate a phase matching condition and thereby modulate an intensity of the harmonic.
摘要翻译: 公开了一种包括半导体激光器的波导型谐波调制装置,通过保持相位匹配产生半导体激光器的非线性光谐波的波导,将半导体激光器的光束引导到波导的装置, 波导,以及用于调制波导的光折射率以调制相位匹配条件并由此调制谐波强度的装置。
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公开(公告)号:US5274727A
公开(公告)日:1993-12-28
申请号:US879361
申请日:1992-05-07
申请人: Kenchi Ito , Kazumi Kawamoto , Hiroshi Momiji , Yasuo Hira , Hidemi Sato , Atsuko Fukushima
发明人: Kenchi Ito , Kazumi Kawamoto , Hiroshi Momiji , Yasuo Hira , Hidemi Sato , Atsuko Fukushima
CPC分类号: G02F1/3775
摘要: A second harmonic generator having a wide acceptance of bandwidth of temperature and/or a high conversion efficiency and a method of fabrication thereof are disclosed. An equidistant arrangement of pole-inverted grating having a rectangular sectional profile and the direction of spontaneous polarization opposite to that of a substrate within an optical waveguide has been known to produce a high conversion efficiency of the second harmonic generator A second harmonic generator having such a structure, which has so far been impossible to fabricate, is formed utilizing the liquid-phase epitaxial method and the ion-implanting method. Further, the substrate and the optical waveguide are formed of the same type of material. The temperature coefficient of the refractive index in the direction perpendicular to the substrate surface is rendered substantially equal to that of the optical waveguide, thereby improving the acceptance of bandwidth of temperature and making possible practical applications of the second harmonic generator.
摘要翻译: 公开了具有对温度带宽的广泛接受和/或高转换效率的二次谐波发生器及其制造方法。 已知具有矩形截面轮廓和与光波导内的衬底相反的自发极化方向的等反转光栅的等距布置产生二次谐波发生器A的高转换效率二次谐波发生器具有这样的 使用液相外延法和离子注入法形成迄今为止不可能制造的结构。 此外,基板和光波导由相同类型的材料形成。 使与基板表面垂直的方向的折射率的温度系数基本上等于光波导的温度系数,从而提高了温度带宽的接受性,并且可以实现二次谐波发生器的实际应用。
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公开(公告)号:US07074665B2
公开(公告)日:2006-07-11
申请号:US10701423
申请日:2003-11-06
申请人: Shinichi Fukada , Naotaka Hashimoto , Masanori Kojima , Hiroshi Momiji , Hiromi Abe , Masayuki Suzuki
发明人: Shinichi Fukada , Naotaka Hashimoto , Masanori Kojima , Hiroshi Momiji , Hiromi Abe , Masayuki Suzuki
IPC分类号: H01L21/8238
CPC分类号: H01L29/6659 , H01L21/2652 , H01L21/28518 , H01L21/823814 , H01L21/823835 , H01L21/823842 , H01L29/665 , H01L29/66545 , H01L29/7833
摘要: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
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公开(公告)号:US20090263943A1
公开(公告)日:2009-10-22
申请号:US12492276
申请日:2009-06-26
申请人: Shinji Nishihara , Shuji Ikeda , Naotaka Hashimoto , Hiroshi Momiji , Hiromi Abe , Shinichi Fukada , Masayuki Suzuki
发明人: Shinji Nishihara , Shuji Ikeda , Naotaka Hashimoto , Hiroshi Momiji , Hiromi Abe , Shinichi Fukada , Masayuki Suzuki
IPC分类号: H01L21/336 , H01L21/28 , H01L21/44
CPC分类号: H01L21/823814 , C23C14/16 , C23C14/3414 , H01L21/28518 , H01L21/2855 , H01L21/31608 , H01L21/76229 , H01L21/76828 , H01L21/823835 , H01L21/823842 , H01L21/823871 , H01L23/53223 , H01L29/456 , H01L29/4933 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/7833 , H01L2924/0002 , H01L2924/00
摘要: A Co silicide layer having a low resistance and a small junction leakage current is formed on the surface of the gate electrode, source and drain of MOSFETS by silicidizing a Co film deposited on a main plane of a wafer by sputtering using a high purity Co target having a Co purity of at least 99.99% and Fe and Ni contents of not greater than 10 ppm, preferably having a Co purity of 99.999%.
摘要翻译: 在MOSFET的栅电极,源极和漏极的表面上形成具有低电阻和小的漏电流的Co硅化物层,通过使用高纯度Co靶溅射沉积在晶片的主平面上的Co膜, Co纯度至少为99.99%,Fe和Ni含量不大于10ppm,Co的纯度优选为99.999%。
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公开(公告)号:US07094655B2
公开(公告)日:2006-08-22
申请号:US11169585
申请日:2005-06-30
申请人: Shinichi Fukada , Naotaka Hashimoto , Masanori Kojima , Hiroshi Momiji , Hiromi Abe , Masayuki Suzuki
发明人: Shinichi Fukada , Naotaka Hashimoto , Masanori Kojima , Hiroshi Momiji , Hiromi Abe , Masayuki Suzuki
IPC分类号: H01L21/336
CPC分类号: H01L29/6659 , H01L21/2652 , H01L21/28518 , H01L21/823814 , H01L21/823835 , H01L21/823842 , H01L29/665 , H01L29/66545 , H01L29/7833
摘要: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
摘要翻译: 用于形成源区和漏区(S和D)的掺杂剂离子的注入步骤被划分为用于与阱区(3)形成ap / n结的掺杂剂离子的一次注入,并且一次注入掺杂剂离子 不影响源极和漏极区域(S和D)之间的p / n结的位置以及具有浅的注入深度和大的注入量的阱区域。 在对掺杂剂进行激活热处理之后,将源极/漏极区域的表面制成硅化钴12,使得源极/漏极区域(S和D)可以具有低电阻,并且ap / n结泄漏可以 减少
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公开(公告)号:US06693001B2
公开(公告)日:2004-02-17
申请号:US09380735
申请日:2000-02-04
申请人: Shinji Nishihara , Shuji Ikeda , Naotaka Hashimoto , Hiroshi Momiji , Hiromi Abe , Shinichi Fukada , Masayuki Suzuki
发明人: Shinji Nishihara , Shuji Ikeda , Naotaka Hashimoto , Hiroshi Momiji , Hiromi Abe , Shinichi Fukada , Masayuki Suzuki
IPC分类号: H01L218238
CPC分类号: H01L21/28518 , H01L21/2855 , H01L23/53223 , H01L29/456 , H01L29/4933 , H01L2924/0002 , H01L2924/00
摘要: A Co silicide layer having a low resistance and a small junction leakage current is formed on the surface of the gate electrode, source and drain of MOSFETs by silicidizing a Co film deposited on a main plane of a wafer by sputtering using a high purity Co target having a Co purity of at least 99.99% and Fe and Ni contents of not greater than 10 ppm, preferably having a Co purity of 99.999%.
摘要翻译: 通过使用高纯度Co靶通过溅射将沉积在晶片的主平面上的Co膜进行硅化,在MOSFET的栅极,源极和漏极的表面上形成具有低电阻和小的结漏电流的Co硅化物层 Co纯度至少为99.99%,Fe和Ni含量不大于10ppm,Co的纯度优选为99.999%。
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公开(公告)号:US06670251B2
公开(公告)日:2003-12-30
申请号:US10005619
申请日:2001-12-07
申请人: Shinichi Fukada , Naotaka Hashimoto , Masanori Kojima , Hiroshi Momiji , Hiromi Abe , Masayuki Suzuki
发明人: Shinichi Fukada , Naotaka Hashimoto , Masanori Kojima , Hiroshi Momiji , Hiromi Abe , Masayuki Suzuki
IPC分类号: H01L21336
CPC分类号: H01L29/6659 , H01L21/2652 , H01L21/28518 , H01L21/823814 , H01L21/823835 , H01L21/823842 , H01L29/665 , H01L29/66545 , H01L29/7833
摘要: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
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公开(公告)号:US06545326B2
公开(公告)日:2003-04-08
申请号:US09910796
申请日:2001-07-24
申请人: Shinichi Fukada , Naotaka Hashimoto , Masanori Kojima , Hiroshi Momiji , Hiromi Abe , Masayuki Suzuki
发明人: Shinichi Fukada , Naotaka Hashimoto , Masanori Kojima , Hiroshi Momiji , Hiromi Abe , Masayuki Suzuki
IPC分类号: H01L31119
CPC分类号: H01L29/6659 , H01L21/823814 , H01L21/823842 , H01L29/1083
摘要: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
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公开(公告)号:US07553766B2
公开(公告)日:2009-06-30
申请号:US11950152
申请日:2007-12-04
申请人: Shinji Nishihara , Shuji Ikeda , Naotaka Hashimoto , Hiroshi Momiji , Hiromi Abe , Shinichi Fukada , Masayuki Suzuki
发明人: Shinji Nishihara , Shuji Ikeda , Naotaka Hashimoto , Hiroshi Momiji , Hiromi Abe , Shinichi Fukada , Masayuki Suzuki
IPC分类号: H01L21/44
CPC分类号: H01L21/823814 , C23C14/16 , C23C14/3414 , H01L21/28518 , H01L21/2855 , H01L21/31608 , H01L21/76229 , H01L21/76828 , H01L21/823835 , H01L21/823842 , H01L21/823871 , H01L23/53223 , H01L29/456 , H01L29/4933 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/7833 , H01L2924/0002 , H01L2924/00
摘要: A Co silicide layer having a low resistance and a small junction leakage current is formed on the surface of the gate electrode, source and drain of MOSFETS by silicidizing a Co film deposited on a main plane of a wafer by sputtering using a high purity Co target having a Co purity of at least 99.99% and Fe and Ni contents of not greater than 10 ppm, preferably having a Co purity of 99.999%.
摘要翻译: 在MOSFET的栅电极,源极和漏极的表面上形成具有低电阻和小的漏电流的Co硅化物层,通过使用高纯度Co靶溅射沉积在晶片的主平面上的Co膜, Co纯度至少为99.99%,Fe和Ni含量不大于10ppm,Co的纯度优选为99.999%。
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公开(公告)号:US07314805B2
公开(公告)日:2008-01-01
申请号:US11519907
申请日:2006-09-13
申请人: Shinichi Fukada , Naotaka Hashimoto , Masanori Kojima , Hiroshi Momiji , Hiromi Abe , Masayuki Suzuki
发明人: Shinichi Fukada , Naotaka Hashimoto , Masanori Kojima , Hiroshi Momiji , Hiromi Abe , Masayuki Suzuki
IPC分类号: H01L21/331
CPC分类号: H01L29/6659 , H01L21/2652 , H01L21/28518 , H01L21/823814 , H01L21/823835 , H01L21/823842 , H01L29/665 , H01L29/66545 , H01L29/7833
摘要: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
摘要翻译: 用于形成源区和漏区(S和D)的掺杂剂离子的注入步骤被划分为用于与阱区(3)形成ap / n结的掺杂剂离子的一次注入,并且一次注入掺杂剂离子 不影响源极和漏极区域(S和D)之间的p / n结的位置以及具有浅的注入深度和大的注入量的阱区域。 在对掺杂剂进行激活热处理之后,将源极/漏极区域的表面制成硅化钴12,使得源极/漏极区域(S和D)可以具有低电阻,并且ap / n结泄漏可以 减少
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