公开(公告)号：US20050223991A1

公开(公告)日：2005-10-13

申请号：US10817755

申请日：2004-04-02

申请人： Steven Walther ,  Rajesh Dorai ,  Harold Persing ,  Jay Scheuer ,  Bon-Woong Koo ,  Bjorn Pedersen ,  Chris Leavitt ,  Timothy Miller

发明人： Steven Walther ,  Rajesh Dorai ,  Harold Persing ,  Jay Scheuer ,  Bon-Woong Koo ,  Bjorn Pedersen ,  Chris Leavitt ,  Timothy Miller

IPC分类号： H01J37/244 ,  H01J37/32 ,  C23C14/48

CPC分类号： H01J37/32963 ,  H01J37/32935 ,  H01J37/3299 ,  H01J2237/24405

摘要： A Faraday dose and uniformity monitor can include a magnetically suppressed annular Faraday cup surrounding a target wafer. A narrow aperture can reduce discharges within Faraday cup opening. The annular Faraday cup can have a continuous cross section to eliminate discharges due to breaks. A plurality of annular Faraday cups at different radii can independently measure current density to monitor changes in plasma uniformity. The magnetic suppression field can be configured to have a very rapid decrease in field strength with distance to minimize plasma and implant perturbations and can include both radial and azimuthal components, or primarily azimuthal components. The azimuthal field component can be generated by multiple vertically oriented magnets of alternating polarity, or by the use of a magnetic field coil. In addition, dose electronics can provide integration of pulsed current at high voltage, and can convert the integrated charge to a series of light pulses coupled optically to a dose controller.

摘要翻译： 法拉第剂量和均匀性监测器可以包括围绕目标晶片的磁抑制环形法拉第杯。 狭窄的孔径可以减少法拉第杯开口内的排放。 环形法拉第杯可以具有连续的横截面，以消除由于断裂引起的排放。 多个不同半径的环形法拉第杯可以独立地测量电流密度以监测等离子体均匀性的变化。 磁场抑制场可以被配置为具有随着距离的场强非常快速的降低，以使等离子体和植入物扰动最小化，并且可以包括径向和方位角分量，或者主要包括方位角分量。 方位角分量可以由交替极性的多个垂直取向的磁体或通过使用磁场线圈来产生。 此外，剂量电子学可以提供高电压脉冲电流的集成，并且可以将积分电荷转换成光耦合到剂量控制器的一系列光脉冲。

公开(公告)号：US20050260354A1

公开(公告)日：2005-11-24

申请号：US10850222

申请日：2004-05-20

申请人： Vikram Singh ,  Atul Gupta ,  Harold Persing ,  Steven Walther ,  Anne Testoni

发明人： Vikram Singh ,  Atul Gupta ,  Harold Persing ,  Steven Walther ,  Anne Testoni

IPC分类号： H01J37/32 ,  C23C14/00 ,  C23C16/00

CPC分类号： H01J37/32495 ,  H01J37/32412

摘要： A method for plasma ion implantation of a substrate includes providing a plasma ion implantation system including a process chamber, a source for producing a plasma in the process chamber, a platen for holding the substrate in the process chamber, and a voltage source for accelerating ions from the plasma into the substrate, depositing on interior surfaces of the process chamber a fresh coating that is similar in composition to a deposited film that results from plasma ion implantation of the substrate, before depositing the fresh coating, cleaning interior surfaces of the process chamber by removing an old film using one or more activated cleaning precursors, plasma ion implantation of the substrate according to a plasma ion implantation process, and repeating the steps of cleaning interior surfaces of the process chamber and depositing a fresh coating following plasma ion implantation of one or more substrates.

摘要翻译： 用于等离子体离子注入衬底的方法包括提供等离子体离子注入系统，其包括处理室，用于在处理室中产生等离子体的源，用于将衬底保持在处理室中的压板和用于加速离子的电压源 从等离子体进入衬底，在沉积新鲜涂层之前，在沉积新鲜涂层之前，在处理室的内表面上沉积与组合物中与等离子体离子注入导致的沉积膜相似的新涂层，清洁处理室的内表面 通过使用一种或多种激活的清洁前体去除旧膜，根据等离子体离子注入工艺等离子体离子注入基板，并重复清洁处理室的内表面并在等离子体离子注入之后沉积新涂层的步骤 或更多的基材。

公开(公告)号：US20060043531A1

公开(公告)日：2006-03-02

申请号：US10928555

申请日：2004-08-27

申请人： Yuri Erokhin ,  Ukyo Jeong ,  Jay Scheuer ,  Steven Walther

发明人： Yuri Erokhin ,  Ukyo Jeong ,  Jay Scheuer ,  Steven Walther

IPC分类号： H01L29/788

CPC分类号： H01L21/2236 ,  H01L29/66575

摘要： A method for fabricating a semiconductor-based device includes providing a doped semiconductor substrate, introducing a second dopant into the substrate to define a pn junction, and introducing a neutralizing species into the substrate in the neighborhood of the pn junction to reduce a capacitance associated with the pn junction. A semiconductor-based device includes a semiconductor substrate having first and second dopants, and a neutralizing species. The first and second dopants define a pn junction, and the neutralizing species neutralizes a portion of the first dopant in the neighborhood of the pn junction to decrease a capacitance associated with the pn junction.

摘要翻译： 一种用于制造基于半导体的器件的方法包括提供掺杂的半导体衬底，将第二掺杂剂引入到衬底中以限定pn结，并将中和物质引入到pn结附近的衬底中，以减少与 pn结。 基于半导体的器件包括具有第一和第二掺杂剂的半导体衬底和中和物质。 第一和第二掺杂剂限定pn结，并且中和物质中和pn结附近的第一掺杂剂的一部分以减少与pn结相关联的电容。

公开(公告)号：US20060099830A1

公开(公告)日：2006-05-11

申请号：US10981831

申请日：2004-11-05

申请人： Steven Walther ,  Sandeep Mehta ,  Jay Scheuer

发明人： Steven Walther ,  Sandeep Mehta ,  Jay Scheuer

IPC分类号： C23C14/00 ,  C23C16/00 ,  H01L21/31

CPC分类号： H01L21/263 ,  H01J37/32412 ,  H01L21/26506

摘要： Methods and apparatus for plasma implantation of a workpiece, such as a semiconductor wafer, are provided. A method includes introducing into a plasma doping chamber a dopant gas selected from the group consisting of PF3, AsF3, AsF5 and mixtures thereof, forming in the plasma doping chamber a plasma containing ions of the dopant gas, the plasma having a plasma sheath at or near a surface of the workpiece, and accelerating the dopant gas ions across the plasma sheath toward the workpiece, wherein the dopant gas ions are implanted into the workpiece. The selected dopant gas limits deposition of neutral particles on the workpiece.

摘要翻译： 提供了诸如半导体晶片等工件的等离子体注入的方法和装置。 一种方法包括向等离子体掺杂室中引入选自由PF 3，AsF 3，AsF 5 5及其混合物组成的组的掺杂剂气体 在所述等离子体掺杂室中形成含有所述掺杂剂气体的离子的等离子体，所述等离子体在所述工件的表面处或附近具有等离子体鞘，并且使所述掺杂剂气体离子穿过所述等离子体鞘朝向所述工件加速，其中所述掺杂剂气体离子 植入工件。 所选择的掺杂气体限制了中性粒子在工件上的沉积。

公开(公告)号：US20090104761A1

公开(公告)日：2009-04-23

申请号：US11875062

申请日：2007-10-19

申请人： Yongbae Jeon ,  Vikram Singh ,  Timothy Miller ,  Ziwei Fang ,  Steven Walther ,  Atul Gupta

发明人： Yongbae Jeon ,  Vikram Singh ,  Timothy Miller ,  Ziwei Fang ,  Steven Walther ,  Atul Gupta

IPC分类号： H01L21/26 ,  C23C16/513

CPC分类号： H01J37/32642 ,  H01J37/32412 ,  H01J37/32935

摘要： A method of plasma doping includes generating a plasma comprising dopant ions proximate to a platen supporting a substrate in a plasma chamber. The platen is biased with a bias voltage waveform having a negative potential that attracts ions in the plasma to the substrate for plasma doping. At least one sensor measuring data related to charging conditions favorable for forming an electrical discharge is monitored. At least one plasma process parameter is modified in response to the measured data, thereby reducing a probability of forming an electrical discharge.

摘要翻译： 等离子体掺杂的方法包括产生等离子体，该等离子体包括邻近于在等离子体室中支撑衬底的压板的掺杂剂离子。 压板被具有负电位的偏压电压波形偏置，其将等离子体中的离子吸引到用于等离子体掺杂的衬底。 监测至少一个测量与有利于形成放电的充电条件有关的数据的传感器。 响应于测量数据修改至少一个等离子体处理参数，从而降低形成放电的可能性。

公开(公告)号：US20070123012A1

公开(公告)日：2007-05-31

申请号：US11288828

申请日：2005-11-29

申请人： Steven Walther ,  Ukyo Jeong ,  Sandeep Mehta ,  Naushad Variam

发明人： Steven Walther ,  Ukyo Jeong ,  Sandeep Mehta ,  Naushad Variam

IPC分类号： H01L21/04

CPC分类号： H01L21/3003 ,  H01L21/28185 ,  H01L21/2822 ,  H01L21/28238

摘要： A method for fabricating a semiconductor-based device includes providing a substrate including a semiconductor layer, forming a gate dielectric layer on the semiconductor layer, forming a plasma including deuterium, plasma implanting deuterium from the plasma into the substrate, and annealing the substrate to promote passivation of the interface between the dielectric layer and the semiconductor layer.

摘要翻译： 一种制造基于半导体的器件的方法，包括提供包括半导体层的衬底，在半导体层上形成栅介质层，形成包括氘的等离子体，将等离子体等离子体注入氘到衬底中，以及退火衬底以促进 钝化介电层和半导体层之间的界面。

公开(公告)号：US6084285A

公开(公告)日：2000-07-04

申请号：US954973

申请日：1997-10-20

申请人： Arvin R. Shahani ,  Thomas H. Lee ,  Hirad Samavati ,  Derek K. Shaeffer ,  Steven Walther

发明人： Arvin R. Shahani ,  Thomas H. Lee ,  Hirad Samavati ,  Derek K. Shaeffer ,  Steven Walther

IPC分类号： H01L27/08 ,  H01L29/41

CPC分类号： H01L27/0805 ,  H01L28/86

摘要： Linear integrated circuit capacitors having greater capacitance per unit area by using lateral flux. One embodiment comprises a two metal layer capacitor wherein each metal layer is comprised of two capacitor conductive components. The capacitor conductive components are cross-coupled so that the total capacitance is the sum of the vertical flux between the metal layers, and the lateral flux along the edges between the two capacitor conductive components in each of the metal layers. The lateral flux between the capacitor conductive components in a single metal layer increases the capacitance per unit area and decreases the bottom-plate parasitic capacitance. Increasing the length of the common edge formed by capacitor conductive components in a metal layer increases the capacitance per unit area. In one lateral flux capacitor, each metal layer is comprised of a plurality of rows, alternate rows are coupled together such that lateral flux is generated between each of the rows. The rows are also cross-coupled with rows in adjacent metal layers to provide vertical flux. Fractal shapes can be used to maximize the length of the perimeter of adjacent capacitor conductive components in a single metal layer. The Koch Islands and Minkowski Sausage families of fractals are particularly well suited for generating capacitor conductive component perimeter shapes. These fractals are generated by selecting an initiator shape and repeatedly applying a generator. The fractal shapes are generated by a computer program based upon user input parameters.

摘要翻译： 线性集成电路电容器通过使用横向通量具有更大的电容单位面积。 一个实施例包括两个金属层电容器，其中每个金属层由两个电容器导电部件组成。 电容器导电部件被交叉耦合，使得总电容是金属层之间的垂直通量和沿着每个金属层中的两个电容器导电部件之间的边缘的横向磁通的总和。 单个金属层中的电容器导电元件之间的横向通量增加了每单位面积的电容，并降低了底板寄生电容。 增加由金属层中的电容器导电部件形成的共同边缘的长度增加了每单位面积的电容。 在一个横向通量电容器中，每个金属层由多个行组成，交替的行耦合在一起，使得在每行之间产生横向通量。 这些行还与相邻金属层中的行交叉耦合以提供垂直通量。 可以使用分形来最大化单个金属层中相邻电容器导电组件的周长的长度。 科赫群岛和明科夫斯基香肠分形系列特别适用于生成电容器导电组件周边形状。 这些分形是通过选择引发器形状并重复应用发生器来生成的。 基于用户输入参数的计算机程序生成分形。

公开(公告)号：US6028990A

公开(公告)日：2000-02-22

申请号：US222259

申请日：1998-12-28

申请人： Arvin R. Shahani ,  Thomas H. Lee ,  Hirad Samavati ,  Derek K. Shaeffer ,  Steven Walther

发明人： Arvin R. Shahani ,  Thomas H. Lee ,  Hirad Samavati ,  Derek K. Shaeffer ,  Steven Walther

IPC分类号： H01L27/08 ,  G06F17/50 ,  H01L27/105

CPC分类号： H01L27/0805 ,  H01L28/86

摘要： Linear integrated circuit capacitors having greater capacitance per unit area by using lateral flux. One embodiment comprises a two metal layer capacitor wherein each metal layer is comprised of two capacitor conductive components. The capacitor conductive components are cross-coupled so that the total capacitance is the sum of the vertical flux between the metal layers, and the lateral flux along the edges between the two capacitor conductive components in each of the metal layers. The lateral flux between the capacitor conductive components in a single metal layer increases the capacitance per unit area and decreases the bottom-plate parasitic capacitance. Increasing the length of the common edge formed by capacitor conductive components in a metal layer increases the capacitance per unit area. In one lateral flux capacitor, each metal layer is comprised of a plurality of rows, alternate rows are coupled together such that lateral flux is generated between each of the rows. The rows are also cross-coupled with rows in adjacent metal layers to provide vertical flux. Fractal shapes can be used to maximize the length of the perimeter of adjacent capacitor conductive components in a single metal layer. The Koch Islands and Minkowski Sausage families of fractals are particularly well suited for generating capacitor conductive component perimeter shapes. These fractals are generated by selecting an initiator shape and repeatedly applying a generator. The fractal shapes are generated by a computer program based upon user input parameters.

摘要翻译： 线性集成电路电容器通过使用横向通量具有更大的电容单位面积。 一个实施例包括两个金属层电容器，其中每个金属层由两个电容器导电部件组成。 电容器导电部件被交叉耦合，使得总电容是金属层之间的垂直通量和沿着每个金属层中的两个电容器导电部件之间的边缘的横向磁通的总和。 单个金属层中的电容器导电元件之间的横向通量增加了每单位面积的电容，并降低了底板寄生电容。 增加由金属层中的电容器导电部件形成的共同边缘的长度增加了每单位面积的电容。 在一个横向通量电容器中，每个金属层由多个行组成，交替的行耦合在一起，使得在每行之间产生横向通量。 这些行还与相邻金属层中的行交叉耦合以提供垂直通量。 可以使用分形来最大化单个金属层中相邻电容器导电组件的周长的长度。 科赫群岛和明科夫斯基香肠分形系列特别适用于生成电容器导电组件周边形状。 这些分形是通过选择引发器形状并重复应用发生器来生成的。 基于用户输入参数的计算机程序生成分形。

公开(公告)号：US20070045569A1

公开(公告)日：2007-03-01

申请号：US11217700

申请日：2005-08-31

申请人： Steven Walther ,  Ukyo Jeong ,  Sandeep Mehta

发明人： Steven Walther ,  Ukyo Jeong ,  Sandeep Mehta

IPC分类号： H01J37/08

CPC分类号： H01J37/3171 ,  H01J37/304 ,  H01J2237/24507 ,  H01J2237/24528

摘要： A system, method and program product for monitoring the beam angle integrity of an ion beam generated by an ion implanter system are disclosed. The invention utilizes at least one template with each template having a template surface that impedes the motion of an ion. Each template is configured such that an ion impacts the surface of the template if the trajectory of the template deviates from the optimum trajectory by a pre-determined maximum variance angle. The change caused by the impact of the ions with the template and/or a target is then measured to determine the amount of variance in the ion beam. Adjustments can then be made to the ion beam generator to correct for a misaligned beam.

摘要翻译： 公开了一种用于监测由离子注入机系统产生的离子束的束角完整性的系统，方法和程序产品。 本发明利用至少一个模板，每个模板具有阻碍离子运动的模板表面。 每个模板被配置成使得如果模板的轨迹偏离最佳轨迹预定的最大方差角，则离子冲击模板的表面。 然后测量由离子与模板和/或靶的影响引起的变化，以确定离子束中的方差量。 然后可以对离子束发生器进行调整，以校正未对准的光束。

公开(公告)号：US20060121704A1

公开(公告)日：2006-06-08

申请号：US11005972

申请日：2004-12-07

申请人： Steven Walther ,  Ziwei Fang

发明人： Steven Walther ,  Ziwei Fang

IPC分类号： H01L21/04 ,  C23C16/00

CPC分类号： C23C14/48 ,  H01J37/32412 ,  H01J37/32697 ,  H01L21/2236

摘要： A plasma ion implantation system includes a process chamber, a source for generating a plasma in the process chamber, a platen for holding a substrate in the process chamber, an implant pulse source configured to generate implant pulses for accelerating ions from the plasma into the substrate, and an axial electrostatic confinement structure configured to confine electrons in a direction generally orthogonal to a surface of the platen. The confinement structure may include an auxiliary electrode spaced from the platen and a bias source configured to bias the auxiliary electrode at a negative potential relative to the plasma.

摘要翻译： 等离子体离子注入系统包括处理室，用于在处理室中产生等离子体的源，用于在处理室中保持衬底的压板，配置成产生用于将离子从等离子体加速到衬底中的注入脉冲的注入脉冲源 以及轴向静电限制结构，其构造成在大致正交于压板的表面的方向上限制电子。 限制结构可以包括与压板间隔开的辅助电极和被配置为将辅助电极相对于等离子体偏压成负电位的偏置源。