公开(公告)号：US07531861B2

公开(公告)日：2009-05-12

申请号：US12033065

申请日：2008-02-19

申请人： Suk-jin Chung ,  Seung-hwan Lee ,  Sung-tae Kim ,  Young-sun Kim ,  Jae-soon Lim ,  Young-geun Park

发明人： Suk-jin Chung ,  Seung-hwan Lee ,  Sung-tae Kim ,  Young-sun Kim ,  Jae-soon Lim ,  Young-geun Park

IPC分类号： H01L29/94

CPC分类号： H01L27/10867 ,  H01L27/10829 ,  H01L27/1087 ,  H01L29/66181 ,  H01L29/945

摘要： Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include forming a first layer on a substrate. A second layer is formed on the first layer opposite to the substrate. A mask is formed that has an opening on top of the first and second layers. A first trench is formed by removing a portion of the first and second layers through the opening in the mask. A portion of the first layer under the second layer is removed to form an undercut region under the second layer. An insulating layer collar is formed in the undercut region under the second layer. A second trench is formed that extends from the first trench by removing a portion of the substrate through the opening in the mask. A buried plate is formed in the substrate along the second trench. A dielectric layer is formed on an inner wall and bottom of the second trench. A storage electrode is formed in the second trench on the dielectric layer.

摘要翻译： 提供了在底切区域中具有绝缘层套环的沟槽电容器和制造这种沟槽电容器的方法。 制造沟槽电容器的一些方法包括在衬底上形成第一层。 在与衬底相对的第一层上形成第二层。 形成在第一和第二层的顶部上具有开口的掩模。 通过从掩模中的开口去除第一层和第二层的一部分来形成第一沟槽。 除去第二层下面的第一层的一部分，以在第二层下形成底切区域。 在第二层下方的底切区域中形成绝缘层套环。 形成第二沟槽，其通过从掩模中的开口去除衬底的一部分而从第一沟槽延伸。 掩埋板沿着第二沟槽形成在衬底中。 介电层形成在第二沟槽的内壁和底部上。 在电介质层上的第二沟槽中形成存储电极。

公开(公告)号：US20080135876A1

公开(公告)日：2008-06-12

申请号：US12033065

申请日：2008-02-19

申请人： Suk-jin Chung ,  Seung-hwan Lee ,  Sung-tae Kim ,  Young-sun Kim ,  Jae-soon Lim ,  Young-geun Park

发明人： Suk-jin Chung ,  Seung-hwan Lee ,  Sung-tae Kim ,  Young-sun Kim ,  Jae-soon Lim ,  Young-geun Park

IPC分类号： H01L29/94

CPC分类号： H01L27/10867 ,  H01L27/10829 ,  H01L27/1087 ,  H01L29/66181 ,  H01L29/945

摘要： Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include forming a first layer on a substrate. A second layer is formed on the first layer opposite to the substrate. A mask is formed that has an opening on top of the first and second layers. A first trench is formed by removing a portion of the first and second layers through the opening in the mask. A portion of the first layer under the second layer is removed to form an undercut region under the second layer. An insulating layer collar is formed in the undercut region under the second layer. A second trench is formed that extends from the first trench by removing a portion of the substrate through the opening in the mask. A buried plate is formed in the substrate along the second trench. A dielectric layer is formed on an inner wall and bottom of the second trench. A storage electrode is formed in the second trench on the dielectric layer.

摘要翻译： 提供了在底切区域中具有绝缘层套环的沟槽电容器和制造这种沟槽电容器的方法。 制造沟槽电容器的一些方法包括在衬底上形成第一层。 在与衬底相对的第一层上形成第二层。 形成在第一和第二层的顶部上具有开口的掩模。 通过从掩模中的开口去除第一层和第二层的一部分来形成第一沟槽。 除去第二层下面的第一层的一部分，以在第二层下形成底切区域。 在第二层下方的底切区域中形成绝缘层套环。 形成第二沟槽，其通过从掩模中的开口去除衬底的一部分而从第一沟槽延伸。 掩埋板沿着第二沟槽形成在衬底中。 介电层形成在第二沟槽的内壁和底部上。 在电介质层上的第二沟槽中形成存储电极。

公开(公告)号：US07354821B2

公开(公告)日：2008-04-08

申请号：US11037626

申请日：2005-01-18

申请人： Suk-jin Chung ,  Seung-hwan Lee ,  Sung-tae Kim ,  Young-sun Kim ,  Jae-soon Lim ,  Young-geun Park

发明人： Suk-jin Chung ,  Seung-hwan Lee ,  Sung-tae Kim ,  Young-sun Kim ,  Jae-soon Lim ,  Young-geun Park

IPC分类号： H01L21/8242 ,  H01L21/336

CPC分类号： H01L27/10867 ,  H01L27/10829 ,  H01L27/1087 ,  H01L29/66181 ,  H01L29/945

摘要： Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include forming a first layer on a substrate. A second layer is formed on the first layer opposite to the substrate. A mask is formed that has an opening on top of the first and second layers. A first trench is formed by removing a portion of the first and second layers through the opening in the mask. A portion of the first layer under the second layer is removed to form an undercut region under the second layer. An insulating layer collar is formed in the undercut region under the second layer. A second trench is formed that extends from the first trench by removing a portion of the substrate through the opening in the mask. A buried plate is formed in the substrate along the second trench. A dielectric layer is formed on an inner wall and bottom of the second trench. A storage electrode is formed in the second trench on the dielectric layer.

摘要翻译： 提供了在底切区域中具有绝缘层套环的沟槽电容器和制造这种沟槽电容器的方法。 制造沟槽电容器的一些方法包括在衬底上形成第一层。 在与衬底相对的第一层上形成第二层。 形成在第一和第二层的顶部上具有开口的掩模。 通过从掩模中的开口去除第一层和第二层的一部分来形成第一沟槽。 除去第二层下面的第一层的一部分，以在第二层下形成底切区域。 在第二层下方的底切区域中形成绝缘层套环。 形成第二沟槽，其通过从掩模中的开口去除衬底的一部分而从第一沟槽延伸。 掩埋板沿着第二沟槽形成在衬底中。 介电层形成在第二沟槽的内壁和底部上。 在电介质层上的第二沟槽中形成存储电极。

公开(公告)号：US20050212026A1

公开(公告)日：2005-09-29

申请号：US11037626

申请日：2005-01-18

申请人： Suk-jin Chung ,  Seung-hwan Lee ,  Sung-tae Kim ,  Young-sun Kim ,  Jae-soon Lim ,  Young-geun Park

发明人： Suk-jin Chung ,  Seung-hwan Lee ,  Sung-tae Kim ,  Young-sun Kim ,  Jae-soon Lim ,  Young-geun Park

IPC分类号： H01L27/108 ,  H01L21/334 ,  H01L21/82 ,  H01L21/8242 ,  H01L29/94

CPC分类号： H01L27/10867 ,  H01L27/10829 ,  H01L27/1087 ,  H01L29/66181 ,  H01L29/945

摘要： Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include forming a first layer on a substrate. A second layer is formed on the first layer opposite to the substrate. A mask is formed that has an opening on top of the first and second layers. A first trench is formed by removing a portion of the first and second layers through the opening in the mask. A portion of the first layer under the second layer is removed to form an undercut region under the second layer. An insulating layer collar is formed in the undercut region under the second layer. A second trench is formed that extends from the first trench by removing a portion of the substrate through the opening in the mask. A buried plate is formed in the substrate along the second trench. A dielectric layer is formed on an inner wall and bottom of the second trench. A storage electrode is formed in the second trench on the dielectric layer.

摘要翻译： 提供了在底切区域中具有绝缘层套环的沟槽电容器和制造这种沟槽电容器的方法。 制造沟槽电容器的一些方法包括在衬底上形成第一层。 在与衬底相对的第一层上形成第二层。 形成在第一和第二层的顶部上具有开口的掩模。 通过从掩模中的开口去除第一层和第二层的一部分来形成第一沟槽。 除去第二层下面的第一层的一部分，以在第二层下形成底切区域。 在第二层下方的底切区域中形成绝缘层套环。 形成第二沟槽，其通过从掩模中的开口去除衬底的一部分而从第一沟槽延伸。 掩埋板沿着第二沟槽形成在衬底中。 介电层形成在第二沟槽的内壁和底部上。 在电介质层上的第二沟槽中形成存储电极。

公开(公告)号：US20090096008A1

公开(公告)日：2009-04-16

申请号：US12249004

申请日：2008-10-10

申请人： Sun-jung Kim ,  Young-geun Park ,  Han-mei Choi ,  Seung-hwan Lee ,  Se-hoon Oh ,  Young-sun Kim ,  Sung-tae Kim

发明人： Sun-jung Kim ,  Young-geun Park ,  Han-mei Choi ,  Seung-hwan Lee ,  Se-hoon Oh ,  Young-sun Kim ,  Sung-tae Kim

IPC分类号： H01L29/788 ,  H01L23/58

CPC分类号： H01L29/42332 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/42348

摘要： A nonvolatile memory device having a blocking insulating layer with an excellent data retention property and a method of fabricating the same are provided. The nonvolatile memory device may include a semiconductor substrate having a channel region formed therein; and a gate stack including a tunneling insulating layer, a charge storing layer, a blocking insulating layer and a control gate electrode sequentially stacked on the channel region of the semiconductor substrate. The blocking insulating layer may comprise a lanthanum aluminum oxide having a formula of La2-xAlxOy and the composition parameter x may be 1

摘要翻译： 提供了具有优异数据保存性能的阻挡绝缘层的非易失性存储器件及其制造方法。 非易失性存储器件可以包括其中形成有沟道区的半导体衬底; 以及栅极堆叠，其包括顺序堆叠在半导体衬底的沟道区上的隧道绝缘层，电荷存储层，阻挡绝缘层和控制栅电极。 阻挡绝缘层可以包含具有下式的La 2-x Al x O y的氧化镧铝，组成参数x可以是1

公开(公告)号：US20070035291A1

公开(公告)日：2007-02-15

申请号：US11500491

申请日：2006-08-08

申请人： Byoung-woo Kim ,  Yong-jin Seo ,  Young-geun Park ,  Ho-keun Song

发明人： Byoung-woo Kim ,  Yong-jin Seo ,  Young-geun Park ,  Ho-keun Song

IPC分类号： G01R31/28

CPC分类号： B07C5/344 ,  G01R31/2893

摘要： Provided are an IC sorter, a method for sorting a burn-in IC, an IC sorted using the method. The IC sorter according to one embodiment of the present invention includes a board table onto which a burn-in board is loaded, a tray loader and a tray unloader which are spaced from the board table in a first axis direction and extended parallel to each other in a second axis direction, a DC test buffer and unloading buffer which are spaced from the board table in a second axis direction with a working area of the board table in between, a sorting unit spaced from the board table, having at least one DC failure tray receiving ICs which fail a DC test and at least one sorting tray, a DC failure/loading head movable at least among a working location of the tray loader, the DC test buffer and a DC failure tray of the sorting unit, a unloading head movable at least among a working location of the tray unloader and the unloading buffer, a sorting head movable at least among the unloading buffer and the sorting tray of the sorting unit; and an insertion/removal head movable at least among the DC test buffer, the working area of the board table, and the unloading buffer.

摘要翻译： 提供了一种IC分拣机，用于分类老化IC的方法，使用该方法排序的IC。 根据本发明的一个实施例的IC分拣机包括一个板载台，一个老化板被装载到其上，一个托盘装载器和一个托盘卸载机，它们在第一轴线方向上与板台间隔开并且彼此平行延伸 在第二轴线方向上，DC测试缓冲器和卸载缓冲器，其在第二轴线方向上与所述板台间隔开，其中所述板台的工作区域在其间，与所述板台间隔开的分拣单元，具有至少一个DC 故障托盘接收不通过直流测试的IC和至少一个分类托盘，至少在托盘加载器的工作位置，直流测试缓冲器和分类单元的直流故障托盘之间移动的直流故障/加载头，卸载 至少在所述托盘卸载机的工作位置和所述卸载缓冲器之间移动的头部，至少可移动到所述分拣单元的卸载缓冲器和分拣托盘之间的分拣头; 以及至少可以在DC测试缓冲器，板表的工作区域和卸载缓冲器之间移动的插入/移除头。

公开(公告)号：US07790591B2

公开(公告)日：2010-09-07

申请号：US12270014

申请日：2008-11-13

申请人： Dong-chul Yoo ,  Myoung-bum Lee ,  Young-geun Park ,  Han-mei Choi ,  Se-hoon Oh ,  Byong-ju Kim ,  Kyong-won An ,  Seon-ho Jo

发明人： Dong-chul Yoo ,  Myoung-bum Lee ,  Young-geun Park ,  Han-mei Choi ,  Se-hoon Oh ,  Byong-ju Kim ,  Kyong-won An ,  Seon-ho Jo

IPC分类号： H01L21/3205 ,  H01L21/4763

CPC分类号： H01L21/31616 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/3141 ,  H01L21/3142 ,  H01L21/3145 ,  H01L21/31604

摘要： Methods of manufacturing a semiconductor device are provided including forming a charge storage layer on a gate insulating layer that is on a semiconductor substrate. A blocking insulating layer is formed on the charge storage layer and an electrode layer is formed on the blocking insulating layer. The blocking insulating layer may be formed by forming a lower metal oxide layer at a first temperature and forming an upper metal oxide layer on the lower metal oxide layer at a second temperature, lower than the first temperature.

摘要翻译： 提供了制造半导体器件的方法，包括在半导体衬底上的栅极绝缘层上形成电荷存储层。 在电荷存储层上形成阻挡绝缘层，在隔离绝缘层上形成电极层。 阻挡绝缘层可以通过在第一温度下形成下部金属氧化物层并在低于第一温度的第二温度下在下部金属氧化物层上形成上部金属氧化物层而形成。

公开(公告)号：US20090124070A1

公开(公告)日：2009-05-14

申请号：US12270014

申请日：2008-11-13

申请人： Dong Chul Yoo ,  Myoung-bum Lee ,  Young-geun Park ,  Han-mei Choi ,  Se-hoon Oh ,  Byong-ju Kim ,  Kyong-won An ,  Seon-ho Jo

发明人： Dong Chul Yoo ,  Myoung-bum Lee ,  Young-geun Park ,  Han-mei Choi ,  Se-hoon Oh ,  Byong-ju Kim ,  Kyong-won An ,  Seon-ho Jo

IPC分类号： H01L21/3205

CPC分类号： H01L21/31616 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/3141 ,  H01L21/3142 ,  H01L21/3145 ,  H01L21/31604

摘要： Methods of manufacturing a semiconductor device are provided including forming a charge storage layer on a gate insulating layer that is on a semiconductor substrate. A blocking insulating layer is formed on the charge storage layer and an electrode layer is formed on the blocking insulating layer. The blocking insulating layer may be formed by forming a lower metal oxide layer at a first temperature and forming an upper metal oxide layer on the lower metal oxide layer at a second temperature, lower than the first temperature.

摘要翻译： 提供了制造半导体器件的方法，包括在半导体衬底上的栅极绝缘层上形成电荷存储层。 在电荷存储层上形成阻挡绝缘层，在隔离绝缘层上形成电极层。 阻挡绝缘层可以通过在第一温度下形成下部金属氧化物层并在低于第一温度的第二温度下在下部金属氧化物层上形成上部金属氧化物层而形成。