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    SILICON CARBIDE SEMICONDUCTOR DEVICE
    2.
    发明申请
    SILICON CARBIDE SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20200185519A1

    公开(公告)日：2020-06-11

    申请号：US16628473

    申请日：2018-04-26

    申请人： Sumitomo Electric Industries, Ltd.

    发明人： Toru HIYOSHI ,  Kosuke UCHIDA

    IPC分类号： H01L29/78 ,  H01L29/16 ,  H01L29/06 ,  H01L29/10

    摘要： A silicon carbide substrate has at least one of a first structure and a second structure. The first structure is such that a first impurity region is in contact with a second impurity region, a third impurity region is separated from a fourth impurity region by a second drift region, and the second impurity region has a width greater than a width of the fourth impurity region in a direction parallel to a first main surface. The second structure is such that the first impurity region is separated from the second impurity region by a first drift region, the third impurity region is in contact with the fourth impurity region, and the fourth impurity region has a width greater than a width of the second impurity region in the direction parallel to the first main surface.

    SILICON CARBIDE SEMICONDUCTOR DEVICE
    3.
    发明申请
    SILICON CARBIDE SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20200373393A1

    公开(公告)日：2020-11-26

    申请号：US16961030

    申请日：2018-10-02

    申请人： Sumitomo Electric Industries, Ltd.

    发明人： Kosuke UCHIDA ,  Toru HIYOSHI

    IPC分类号： H01L29/16 ,  H01L29/423 ,  H01L29/78

    摘要： A silicon carbide substrate has a first main surface and a second main surface opposite to the first main surface. A gate pad faces the first main surface. A drain electrode is in contact with the second main surface. The silicon carbide substrate includes a first impurity region constituting the second main surface and having a first conductivity type, a second impurity region provided on the first impurity region and having a second conductivity type different from the first conductivity type, a third impurity region provided on the second impurity region and having the first conductivity type, and a fourth impurity region provided on the third impurity region, constituting the first main surface, and having the second conductivity type. Each of the first impurity region, the second impurity region, the third impurity region, and the fourth impurity region is located between the gate pad and the drain electrode.

    SILICON CARBIDE SEMICONDUCTOR DEVICE
    4.
    发明申请
    SILICON CARBIDE SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20190288106A1

    公开(公告)日：2019-09-19

    申请号：US16347255

    申请日：2017-10-03

    申请人： Sumitomo Electric Industries, Ltd.

    发明人： Kosuke UCHIDA ,  Toru HIYOSHI

    IPC分类号： H01L29/78 ,  H01L29/16 ,  H01L29/10

    摘要： The side surface has a first outer end surface. The bottom surface has a first bottom portion continuous to the first outer end surface, and a second bottom portion continuous to the first bottom portion and located on a side opposite to the inner end surface with respect to the first bottom portion. A silicon carbide substrate has a first region and a second region located between the at least one gate trench and a second main surface, and spaced from each other with a drift region being sandwiched therebetween. In a direction parallel to the first outer end surface, a spacing between the first region and the second region located between the first bottom portion and the second main surface is smaller than a spacing between the first region and the second region located between the second bottom portion and the second main surface.

    SILICON CARBIDE SEMICONDUCTOR DEVICE
    7.
    发明申请
    SILICON CARBIDE SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210399090A1

    公开(公告)日：2021-12-23

    申请号：US16967767

    申请日：2018-12-27

    申请人： Sumitomo Electric Industries, Ltd.

    发明人： Kosuke UCHIDA ,  Toru HIYOSHI

    IPC分类号： H01L29/06 ,  H01L29/78 ,  H01L29/10 ,  H01L29/66

    摘要： A first main surface of a silicon carbide substrate is provided with a first trench and a second trench. The first trench is defined by a first side surface and a first bottom surface. The second trench is defined by a second side surface and a second bottom surface. The silicon carbide substrate includes a first impurity region, a second impurity region, a third impurity region, and a fourth impurity region. A first insulating film is in contact with each of the first side surface and the first bottom surface. A gate electrode is provided on the first insulating film. A second insulating film is in contact with each of the second side surface and the second bottom surface. The second impurity region has a connection region electrically connected to the fourth impurity region and extending toward the fourth impurity region along the second side surface.

    SILICON CARBIDE SEMICONDUCTOR DEVICE
    8.
    发明申请
    SILICON CARBIDE SEMICONDUCTOR DEVICE 有权
    硅碳化硅半导体器件

    公开(公告)号：US20160027910A1

    公开(公告)日：2016-01-28

    申请号：US14802628

    申请日：2015-07-17

    申请人： Sumitomo Electric Industries, Ltd.

    发明人： Kosuke UCHIDA ,  Toru HIYOSHI

    IPC分类号： H01L29/78 ,  H01L29/10 ,  H01L29/06 ,  H01L29/16

    CPC分类号： H01L29/7802 ,  H01L21/046 ,  H01L21/0485 ,  H01L29/045 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/1037 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/41758 ,  H01L29/4238 ,  H01L29/45 ,  H01L29/66068 ,  H01L29/7813

    摘要： There is provided a silicon carbide semiconductor device having an improved switching characteristic. A MOSFET includes a silicon carbide layer, a gate insulating film, a gate electrode, and a source electrode. The silicon carbide layer includes a drift region, a body region, and a contact region. The source electrode is in contact with the contact region in a main surface. The MOSFET is configured such that contact resistance of the source electrode with respect to the contact region is not less than 1×10 −4 Ωcm2 and not more than 1×10−1 Ωcm2. Moreover, when viewed in a plan view of the main surface, an area of the contact region is not less than 10% of an area of the body region.

    摘要翻译： 提供了具有改进的开关特性的碳化硅半导体器件。 MOSFET包括碳化硅层，栅极绝缘膜，栅电极和源电极。 碳化硅层包括漂移区，体区和接触区。 源电极与主表面中的接触区域接触。 MOSFET被配置为使得源电极相对于接触区域的接触电阻不小于1×10 -4 [OHgr·cm 2]且不大于1×10 -1·OH·cm 2。 此外，当在主表面的平面图中观察时，接触区域的面积不小于身体区域的面积的10％。

    SILICON CARBIDE SEMICONDUCTOR DEVICE
    9.
    发明申请
    SILICON CARBIDE SEMICONDUCTOR DEVICE 有权
    硅碳化硅半导体器件

    公开(公告)号：US20150295048A1

    公开(公告)日：2015-10-15

    申请号：US14638497

    申请日：2015-03-04

    申请人： Sumitomo Electric Industries, Ltd.

    发明人： Toru HIYOSHI ,  Kosuke UCHIDA ,  Takashi TSUNO

    IPC分类号： H01L29/16 ,  H01L29/36 ,  H01L29/10 ,  H01L29/78

    CPC分类号： H01L29/1608 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0661 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/7395 ,  H01L29/7811 ,  H01L29/7813

    摘要： A silicon carbide semiconductor device includes a silicon carbide layer, a body region, a source region, a gate insulating film, a gate electrode, a source electrode, a first impurity region, and a second impurity region. The second impurity region is disposed within the silicon carbide layer so as to connect the body region and the first impurity region to each other, and has a second conductivity type. An impurity concentration in the second impurity region is equal to or higher than an impurity concentration in the silicon carbide layer and equal to or lower than a lower limit of an impurity concentration in the body region.

    摘要翻译： 碳化硅半导体器件包括碳化硅层，体区，源极区，栅绝缘膜，栅电极，源电极，第一杂质区和第二杂质区。 第二杂质区域设置在碳化硅层内，以将体区域和第一杂质区域彼此连接，并且具有第二导电类型。 第二杂质区域中的杂质浓度等于或高于碳化硅层中的杂质浓度，并且等于或低于体区中杂质浓度的下限。