Variable speed induction motor with single external power supply and control method thereof
    1.
    发明授权
    Variable speed induction motor with single external power supply and control method thereof 有权
    具有单个外部电源的变速感应电动机及其控制方法

    公开(公告)号:US09257933B2

    公开(公告)日:2016-02-09

    申请号:US13597663

    申请日:2012-08-29

    CPC分类号: H02P25/26 H02P27/05

    摘要: A single external power supply variable speed induction motor and a control method thereof are disclosed. An induction motor includes: a stator in which coils directly connected to a single-phase or 3-phase or more systematic power supply are wound; a rotor that is supported to be rotatable in the stator; a power conversion device that is attached to the rotor and controls a rotor current without connection of a separate external power supply; and a control circuit that is connected to the power conversion device and controls the power conversion device.

    摘要翻译: 公开了一种外部电源变速感应电动机及其控制方法。 感应电动机包括:缠绕直接连接到单相或三相或更系统的电源的线圈的定子; 支承在所述定子中可旋转的转子; 功率转换装置,其连接到转子并控制转子电流,而不连接单独的外部电源; 以及连接到电力转换装置并控制电力转换装置的控制电路。

    Semiconductor package having through electrodes that reduce leakage current and method for manufacturing the same
    5.
    发明授权
    Semiconductor package having through electrodes that reduce leakage current and method for manufacturing the same 有权
    具有减少漏电流的通电极的半导体封装及其制造方法

    公开(公告)号:US08609535B2

    公开(公告)日:2013-12-17

    申请号:US13286376

    申请日:2011-11-01

    IPC分类号: H01L21/283

    摘要: A stacked semiconductor package having through electrodes that exhibit a reduced leakage current and a method of making the same are presented. The stacked semiconductor package includes a semiconductor chip, through-holes, and a current leakage prevention layer. The semiconductor chip has opposing first and second surfaces. The through-holes pass entirely through the semiconductor chip and are exposed at the first and second surfaces. A polarized part is formed on at least one of the first and second surfaces of the semiconductor chip. The through-electrodes are disposed within the through-holes. The current leakage prevention layer covers the polarized part and exposes ends of the through-electrodes.

    摘要翻译: 本发明提供一种具有通过电极显示泄漏电流减小的叠层半导体封装及其制造方法。 叠层半导体封装包括半导体芯片,通孔和防止漏电流层。 半导体芯片具有相对的第一和第二表面。 通孔完全穿过半导体芯片,并在第一和第二表面露出。 偏振部分形成在半导体芯片的第一和第二表面中的至少一个上。 通孔设置在通孔内。 电流防漏层覆盖极化部分并暴露通孔的端部。

    Fabric treating apparatus
    6.
    发明授权
    Fabric treating apparatus 有权
    织物处理装置

    公开(公告)号:US08296967B2

    公开(公告)日:2012-10-30

    申请号:US12654046

    申请日:2009-12-08

    IPC分类号: F26B11/00

    CPC分类号: F26B11/12 D06F58/12 D06F58/20

    摘要: A present invention relates to a fabric treating apparatus including an inside cabinet which forms a treating chamber which the fabrics treated in, and a heating unit for supplying any one between hot wind and steam to the treating chamber, and a hanger rack disposed in the treating chamber, and a driving unit for generating rotary power outside the treating chamber and is disposed upper part of the inside cabinet, and a transmission unit for reciprocating the hanger rack by transmitting the rotary power of the driving unit.

    摘要翻译: 一种织物处理装置本发明涉及一种织物处理装置,其包括形成处理过的织物的处理室的内部机壳和用于将热风和蒸汽之间的任何一个供应到处理室的加热单元和设置在处理室中的衣架 以及用于在处理室外产生旋转动力的驱动单元,并且设置在内部机壳的上部;以及传动单元,用于通过传递驱动单元的旋转动力来使衣架架往复运动。

    Semiconductor package
    10.
    发明授权
    Semiconductor package 有权
    半导体封装

    公开(公告)号:US07968918B2

    公开(公告)日:2011-06-28

    申请号:US12493290

    申请日:2009-06-29

    申请人: Sung Min Kim

    发明人: Sung Min Kim

    摘要: A semiconductor package includes a semiconductor chip having two or more regions that partially overlap so as to define an overlapping region. Through-holes are defined through the two or more partially overlapping regions. One or more first electrodes are disposed on inner surfaces of the semiconductor chip within the through-holes. One or more second electrodes are disposed so as to be insulated from the first electrodes. The one or more second electrodes are at least partially disposed in the overlapping region. Insulation members are disposed in the through-holes.

    摘要翻译: 半导体封装包括具有部分重叠以限定重叠区域的两个或更多个区域的半导体芯片。 通过两个或更多个部分重叠的区域限定通孔。 一个或多个第一电极设置在通孔内的半导体芯片的内表面上。 一个或多个第二电极设置成与第一电极绝缘。 一个或多个第二电极至少部分地设置在重叠区域中。 绝缘构件设置在通孔中。