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1.发明公开公开(公告)号：US20240170584A1
公开(公告)日：2024-05-23
申请号：US18154875
申请日：2023-01-16
发明人： CHIH-HSUAN TAI , HSIANG-TAI LU
CPC分类号： H01L29/945 , H01L23/5226 , H01L29/0649 , H01L29/401 , H01L29/41 , H01L29/66181
摘要： A semiconductor structure includes a substrate including a recess indented into the substrate, a capacitor structure at least partially disposed within the recess, and an interconnect structure disposed over and electrically connected to the capacitor structure. The capacitor structure includes a first electrode layer, a second electrode layer over the first electrode layer, and a first dielectric between the first electrode layer and the second electrode layer. The first electrode layer includes a first body portion disposed in and conformal to the recess and a first extending portion disposed on the substrate, and the second electrode layer covers the first dielectric, the first body portion and the first extending portion of the first electrode layer.
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公开(公告)号：US20180204828A1
公开(公告)日：2018-07-19
申请号：US15725766
申请日：2017-10-05
发明人： HSIANG-TAI LU , SHUO-MAO CHEN , MILL-JER WANG , FENG-CHENG HSU , CHAO-HSIANG YANG , SHIN-PUU JENG , CHENG-YI HONG , CHIH-HSIEN LIN , DAI-JANG CHEN , CHEN-HUA LIN
IPC分类号： H01L25/00 , H01L23/538 , H01L23/31 , H01L23/00 , H01L25/10 , H01L21/66 , H01L21/48 , H01L21/56
摘要： A method of manufacturing a semiconductor structure includes forming a redistribution layer (RDL); forming a conductive member over the RDL; performing a first electrical test through the conductive member; disposing a first die over the RDL; performing a second electrical test through the conductive member; and disposing a second die over the first die and the conductive member.
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公开(公告)号：US20240170349A1
公开(公告)日：2024-05-23
申请号：US18154847
申请日：2023-01-15
发明人： CHIH-HSUAN TAI , YU-WEI CHIU , KUO WEN CHEN , HSIANG-TAI LU
IPC分类号： H01L21/66 , H01L21/56 , H01L21/768 , H01L23/31 , H01L23/48
CPC分类号： H01L22/32 , H01L21/565 , H01L21/76898 , H01L23/3128 , H01L23/481
摘要： A method of manufacturing a semiconductor structure, comprising: disposing a dielectric layer over a semiconductive wafer defined with a plurality of active regions and a scribe line region surrounding each of the plurality of active regions; forming a plurality of interconnect structures within the dielectric layer, wherein the formation of the plurality of interconnect structures includes forming a plurality of first testing pads within the scribe line region and at least partially exposed through the dielectric layer; and sawing the semiconductive wafer along the scribe line region to form a first interposer and a second interposer, wherein each of the plurality of first testing pads is at least partially removed by the sawing of the semiconductive wafer.
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公开(公告)号：US20230298970A1
公开(公告)日：2023-09-21
申请号：US17697932
申请日：2022-03-18
发明人： KUO WEN CHEN , HSIANG-TAI LU , CHIH-HSUAN TAI , MING-CHUNG WU
IPC分类号： H01L23/48 , H01L21/768 , H01L29/94 , H01L23/522
CPC分类号： H01L23/481 , H01L21/76898 , H01L23/5223 , H01L29/94
摘要： A semiconductor structure includes a substrate, a capacitor disposed in the substrate, an interconnect structure disposed over the substrate, and a first doped region disposed in the substrate. The interconnect structure includes a first via structure coupled to the substrate, and a second via structure coupled to the capacitor. The first doped region is disposed under the first via structure. The first doped region includes p-type or n-type dopants.
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公开(公告)号：US20240363576A1
公开(公告)日：2024-10-31
申请号：US18307002
申请日：2023-04-25
发明人： WEI-YU CHOU , YANG-CHE CHEN , YI-LUN YANG , TING-YUAN HUANG , HSIANG-TAI LU
CPC分类号： H01L24/26 , H01L21/563 , H01L23/3185 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/32 , H01L24/73 , H01L24/83 , H01L24/92 , H01L25/16 , H01L25/18 , H01L25/50 , H01L2224/16227 , H01L2224/19 , H01L2224/214 , H01L2224/215 , H01L2224/26175 , H01L2224/32225 , H01L2224/73204 , H01L2224/83855 , H01L2224/92125 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01074 , H01L2924/01079
摘要： A semiconductor package structure includes a semiconductor die encapsulated in a molding compound, a redistribution structure over the semiconductor die and the molding compound, a surface device over and electrically connected to the redistribution structure, a first connector over and electrically connected to the redistribution structure, a second connector between the surface device and the redistribution structure, a trench in the redistribution structure and laterally surrounding the surface device in a top view of the semiconductor package structure, and an underfill. The second connector electrically connects the surface device to the redistribution structure. The underfill surrounds the second connector. The underfill include a first portion and a second portion. The first portion of the underfill is located between the surface device and the redistribution structure and laterally surrounding the second connector, and the second portion of the underfill is disposed in the trench.
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公开(公告)号：US20220271024A1
公开(公告)日：2022-08-25
申请号：US17743455
申请日：2022-05-13
发明人： HSIANG-TAI LU , SHUO-MAO CHEN , MILL-JER WANG , FENG-CHENG HSU , CHAO-HSIANG YANG , SHIN-PUU JENG , CHENG-YI HONG , CHIH-HSIEN LIN , DAI-JANG CHEN , CHEN-HUA LIN
IPC分类号： H01L25/00 , H01L23/538 , H01L23/31 , H01L23/00 , H01L25/10 , H01L21/48 , H01L21/56 , H01L21/66
摘要： A method of manufacturing a semiconductor structure forming a redistribution layer (RDL); forming a conductive pad over the RDL; performing a first electrical test through the conductive pad; bonding a first die over the RDL by a connector; disposing a first underfill material to surround the connector; performing a second electrical test through the conductive pad; disposing a second die over the first die and the conductive pad; and disposing a second underfill material to surround the second die, wherein the conductive pad is at least partially in contact with the second underfill material, and is protruded from the RDL during the first electrical test and the second electrical test.
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公开(公告)号：US20240274541A1
公开(公告)日：2024-08-15
申请号：US18167882
申请日：2023-02-12
发明人： CHIH-HSUAN TAI , HSIANG-TAI LU
IPC分类号： H01L23/538 , H01L21/56 , H01L21/66 , H01L23/00 , H01L23/31 , H01L23/498 , H01L25/00 , H01L25/065 , H10B80/00
CPC分类号： H01L23/5384 , H01L21/565 , H01L22/12 , H01L22/32 , H01L23/3107 , H01L23/49816 , H01L24/08 , H01L24/16 , H01L25/0655 , H01L25/50 , H10B80/00 , H01L2224/08112 , H01L2224/16227 , H01L2924/1436 , H01L2924/1437
摘要： A semiconductor package structure includes an interposer, an IPD package, a plurality of detecting bumps, and a plurality of daisy chains. The interposer includes at least a detecting pad and a plurality of bonding pads. The IPD package includes a plurality of metal bumps. The detecting bumps are disposed in the IPD package and separated from the metal bumps of the IPD package. The daisy chains are disposed in the IPD package and electrically connected to the detecting bumps.
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公开(公告)号：US20240243163A1
公开(公告)日：2024-07-18
申请号：US18154043
申请日：2023-01-13
发明人： WEI-YU CHOU , YANG-CHE CHEN , CHI-HUI LAI , YI-LUN YANG , HSIANG-TAI LU
CPC分类号： H01L28/10 , H01F27/06 , H01F27/24 , H01F41/0206
摘要： The present disclosure provides a semiconductor structure including a vertical inductor. The semiconductor structure includes a first semiconductor substrate, a first conductive layer, a first magnetic layer, and a second magnetic layer. The first semiconductor substrate has a top surface, and the first conductive layer is vertically inserted into the first semiconductor substrate from the top surface of the first semiconductor substrate. The first magnetic layer is disposed in the first semiconductor substrate and surrounds the first conductive layer. The second magnetic layer is disposed over the first conductive layer and the first magnetic layer.
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公开(公告)号：US20240088124A1
公开(公告)日：2024-03-14
申请号：US18518636
申请日：2023-11-24
发明人： HSIANG-TAI LU , SHUO-MAO CHEN , MILL-JER WANG , FENG-CHENG HSU , CHAO-HSIANG YANG , SHIN-PUU JENG , CHENG-YI HONG , CHIH-HSIEN LIN , DAI-JANG CHEN , CHEN-HUA LIN
IPC分类号： H01L25/00 , H01L21/48 , H01L21/56 , H01L21/66 , H01L23/00 , H01L23/31 , H01L23/538 , H01L25/10
CPC分类号： H01L25/50 , H01L21/4853 , H01L21/486 , H01L21/565 , H01L22/20 , H01L22/32 , H01L23/3135 , H01L23/3185 , H01L23/5386 , H01L24/19 , H01L24/20 , H01L25/105 , H01L21/4857 , H01L21/563 , H01L22/14 , H01L23/49827 , H01L23/5383 , H01L23/5384 , H01L23/5389 , H01L2224/214 , H01L2225/1035 , H01L2225/1058
摘要： A semiconductor structure, comprising a redistribution layer (RDL) including a dielectric layer and a conductive trace within the dielectric layer; a first conductive member disposed over the RDL and electrically connected with the conductive trace; a second conductive member disposed over the RDL and electrically connected with the conductive trace; a first die disposed over the RDL; a second die disposed over the first die, the first conductive member and the second conductive member; and a connector disposed between the second die and the second conductive member to electrically connect the second die with the conductive trace, wherein the first conductive member is electrically isolated from the second die.
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