Frequency detector and oscillator circuit

    公开(公告)号:US09602084B2

    公开(公告)日:2017-03-21

    申请号:US14966616

    申请日:2015-12-11

    CPC classification number: H03K3/037 G01R19/1659 H03K3/0231

    Abstract: Frequency detector and oscillator circuits are disclosed. Example frequency detector and oscillator circuits disclosed herein include a current approximation circuit coupled to an external clock operating at a target frequency. In some examples, the current approximation circuit is configured to determine a magnitude of a first current to charge a capacitor to reach a reference voltage during a first set of clock cycles generated by the external clock. In some examples, the current approximation circuit is further configured to generate an output current based on the magnitude of the first current and to use the output current to produce a comparator output. In some examples, the frequency detector and oscillator circuits further include a latching circuit coupled to receive the comparator output from the current approximation circuit. In some such examples, the latching circuit is configured to generate oscillating signals at the target frequency based on the comparator output.

    Floating input detection
    2.
    发明授权

    公开(公告)号:US10725118B2

    公开(公告)日:2020-07-28

    申请号:US16124261

    申请日:2018-09-07

    Abstract: A floating input detection method and circuits. A method for detecting a floating signal input terminal includes providing a common-mode input voltage to a first amplifier coupled to the signal input terminal, and providing an output signal generated by the first amplifier to: a non-inverting input of a second amplifier coupled to the signal input terminal, an inverting input of the second amplifier, coarse detection circuitry, and fine float detection circuitry. The method also includes comparing, by the coarse detection circuitry, the output signal to a first threshold voltage, and determining the signal input terminal to be not floating responsive to the comparing indicating that the output signal is greater than the first threshold voltage.

    FREQUENCY DETECTOR AND OSCILLATOR CIRCUIT
    3.
    发明申请
    FREQUENCY DETECTOR AND OSCILLATOR CIRCUIT 有权
    频率检测器和振荡器电路

    公开(公告)号:US20160308516A1

    公开(公告)日:2016-10-20

    申请号:US14966616

    申请日:2015-12-11

    CPC classification number: H03K3/037 G01R19/1659 H03K3/0231

    Abstract: Frequency detector and oscillator circuits are disclosed. Example frequency detector and oscillator circuits disclosed herein include a current approximation circuit coupled to an external clock operating at a target frequency. In some examples, the current approximation circuit is configured to determine a magnitude of a first current to charge a capacitor to reach a reference voltage during a first set of clock cycles generated by the external clock. In some examples, the current approximation circuit is further configured to generate an output current based on the magnitude of the first current and to use the output current to produce a comparator output. In some examples, the frequency detector and oscillator circuits further include a latching circuit coupled to receive the comparator output from the current approximation circuit. In some such examples, the latching circuit is configured to generate oscillating signals at the target frequency based on the comparator output.

    Abstract translation: 公开了频率检测器和振荡器电路。 本文公开的示例性频率检测器和振荡器电路包括耦合到以目标频率工作的外部时钟的电流近似电路。 在一些示例中,电流近似电路被配置为在由外部时钟产生的第一组时钟周期期间确定用于对电容器充电以达到参考电压的第一电流的幅度。 在一些示例中,电流近似电路还被配置为基于第一电流的幅度产生输出电流并且使用输出电流来产生比较器输出。 在一些示例中,频率检测器和振荡器电路还包括耦合以从电流近似电路接收比较器输出的锁存电路。 在一些这样的示例中,锁存电路被配置为基于比较器输出以目标频率产生振荡信号。

    Method and apparatus for compensating offset drift with temperature
    4.
    发明授权
    Method and apparatus for compensating offset drift with temperature 有权
    补偿偏移随温度的方法和装置

    公开(公告)号:US09425811B1

    公开(公告)日:2016-08-23

    申请号:US14871005

    申请日:2015-09-30

    Inventor: Dipankar Mandal

    CPC classification number: H03M1/0607 H03M1/1057 H03M1/468

    Abstract: The disclosure provides an analog to digital converter (ADC). The ADC includes a comparator that receives a threshold voltage. A set of elementary capacitors is coupled to the comparator, and receives one of an input voltage and a set of reference voltages. A set of M offset capacitors is coupled to the comparator, and receives one of a primary voltage and a secondary voltage, M is an integer. A difference in the primary voltage and the secondary voltage varies linearly with temperature.

    Abstract translation: 本公开提供了一种模数转换器(ADC)。 ADC包括一个接收阈值电压的比较器。 一组基本电容器耦合到比较器,并且接收输入电压和一组参考电压中的一个。 一组M偏移电容器耦合到比较器,并且接收初级电压和次级电压之一,M是整数。 初级电压和次级电压的差异随温度线性变化。

    System and method for multi channel sampling SAR ADC
    5.
    发明授权
    System and method for multi channel sampling SAR ADC 有权
    多通道采样SAR ADC的系统和方法

    公开(公告)号:US09270293B2

    公开(公告)日:2016-02-23

    申请号:US14529785

    申请日:2014-10-31

    Inventor: Dipankar Mandal

    CPC classification number: H03M1/38 H03M1/001 H03M1/1225 H03M1/1245 H03M1/466

    Abstract: A device includes a SAR, a comparator, a DAC and a multichannel passive S/H component. The multichannel passive S/H component is able to sample and hold a plurality of analog voltages in parallel. The multichannel passive S/H component is further able to serially feed the plurality of sampled and held analog voltages to the SAR, comparator and DAC, such that each analog voltage is serially converted to a digital representation.

    Abstract translation: 器件包括SAR,比较器,DAC和多通道无源S / H组件。 多通道无源S / H组件能够并行采样和保持多个模拟电压。 多通道无源S / H分量还能够将多个采样和保持的模拟电压串行馈送到SAR,比较器和DAC,使得每个模拟电压被串行转换为数字表示。

    SYSTEM AND METHOD FOR MULTI CHANNEL SAMPLING SAR ADC
    6.
    发明申请
    SYSTEM AND METHOD FOR MULTI CHANNEL SAMPLING SAR ADC 有权
    用于多通道采样SAR ADC的系统和方法

    公开(公告)号:US20150372691A1

    公开(公告)日:2015-12-24

    申请号:US14529785

    申请日:2014-10-31

    Inventor: Dipankar Mandal

    CPC classification number: H03M1/38 H03M1/001 H03M1/1225 H03M1/1245 H03M1/466

    Abstract: A device includes a SAR, a comparator, a DAC and a multichannel passive S/H component. The multichannel passive S/H component is able to sample and hold a plurality of analog voltages in parallel. The multichannel passive S/H component is further able to serially feed the plurality of sampled and held analog voltages to the SAR, comparator and DAC, such that each analog voltage is serially converted to a digital representation.

    Abstract translation: 器件包括SAR,比较器,DAC和多通道无源S / H组件。 多通道无源S / H组件能够并行采样和保持多个模拟电压。 多通道无源S / H分量还能够将多个采样和保持的模拟电压串行馈送到SAR,比较器和DAC,使得每个模拟电压被串行转换为数字表示。

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