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公开(公告)号：US20100046284A1
公开(公告)日：2010-02-25
申请号：US12515898
申请日：2007-11-12
CPC分类号： H01L27/228 , B82Y10/00 , B82Y25/00 , G11C11/161 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/1675 , H01F10/3254 , H01F10/3272 , H01L43/08
摘要： An MRAM comprises: a plurality of magnetic memory cells each having a magnetoresistive element; and a magnetic field application section. The magnetic field application section applies an offset adjustment magnetic field in a certain direction to the plurality of magnetic memory cells from outside the plurality of magnetic memory cells. Respective data stored in the plurality of magnetic memory cells become the same when the offset adjustment magnetic field is removed.
摘要翻译： MRAM包括：多个具有磁阻元件的磁存储单元; 和磁场施加部。 磁场施加部从多个磁存储单元的外部向多个磁存储单元施加一定方向的偏移调整磁场。 当去除偏移调整磁场时，存储在多个磁存储单元中的各个数据变得相同。
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公开(公告)号：US07948783B2
公开(公告)日：2011-05-24
申请号：US12515898
申请日：2007-11-12
IPC分类号： G11C15/02
CPC分类号： H01L27/228 , B82Y10/00 , B82Y25/00 , G11C11/161 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/1675 , H01F10/3254 , H01F10/3272 , H01L43/08
摘要： An MRAM comprises: a plurality of magnetic memory cells each having a magnetoresistive element; and a magnetic field application section. The magnetic field application section applies an offset adjustment magnetic field in a certain direction to the plurality of magnetic memory cells from outside the plurality of magnetic memory cells. Respective data stored in the plurality of magnetic memory cells become the same when the offset adjustment magnetic field is removed.
摘要翻译： MRAM包括：多个具有磁阻元件的磁存储单元; 和磁场施加部。 磁场施加部从多个磁存储单元的外部向多个磁存储单元施加一定方向的偏移调整磁场。 当去除偏移调整磁场时，存储在多个磁存储单元中的各个数据变得相同。
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公开(公告)号：US08737119B2
公开(公告)日：2014-05-27
申请号：US13433895
申请日：2012-03-29
IPC分类号： G11C11/16
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/161 , G11C11/1655 , G11C11/1657 , G11C11/1659 , G11C11/1675 , H01L43/08
摘要： A magnetic memory cell 1 is provided with a magnetic recording layer 10 which is a ferromagnetic layer and a pinned layer 30 connected with the magnetic recording layer 10 through a non-magnetic layer 20. The magnetic recording layer 10 has a magnetization inversion region 13, a first magnetization fixed region 11 and a second magnetization fixed region 12. The magnetization inversion region 13 has a magnetization whose orientation is invertible and overlaps the pinned layer 30. The first magnetization fixed region 11 is connected with a first boundary B1 in the magnetization inversion region 13 and a magnetization orientation is fixed on a first direction. The second magnetization fixed region 12 is connected with a second boundary B2 in magnetization inversion region 13 and a magnetization orientation is fixed on a second direction. The first direction and the second direction are opposite to each other.
摘要翻译： 磁存储单元1设置有磁记录层10，磁记录层10是铁磁层，和通过非磁性层20与磁记录层10连接的钉扎层30.磁记录层10具有磁化反转区域13， 第一磁化固定区域11和第二磁化固定区域12.磁化反转区域13具有其取向可反转并与被钉扎层30重叠的磁化。第一磁化固定区域11与磁化反转中的第一边界B1连接 区域13和磁化取向在第一方向固定。 第二磁化固定区域12与磁化反转区域13中的第二边界B2连接，并且磁化取向固定在第二方向上。 第一方向和第二方向彼此相反。
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公开(公告)号：US08693238B2
公开(公告)日：2014-04-08
申请号：US12376925
申请日：2007-07-13
CPC分类号： G11C8/08 , G11C11/1659 , G11C11/1675
摘要： An MRAM of a spin transfer type is provided with a memory cell 10 and a word driver 30. The memory cell 10 has a magnetic resistance element 1 and a selection transistor TR having one of source/drain electrodes which is connected with one end of the magnetic resistance element 1. The word driver 30 drives a word line WL connected with a gate electrode of the selection transistor TR. The word driver 30 changes a drive voltage of the word line WL according to the write data DW to be written in the magnetic resistance element 1.
摘要翻译： 自旋转移型的MRAM具有存储单元10和字驱动器30.存储单元10具有磁阻元件1和选择晶体管TR，其具有与源极/漏极之一连接的源极/漏极之一 字驱动器30驱动与选择晶体管TR的栅电极连接的字线WL。 字驱动器30根据要写入磁阻元件1的写数据DW改变字线WL的驱动电压。
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5.发明授权Operation method of MRAM including correcting data for single-bit error and multi-bit error 有权MRAM的操作方法包括纠正单位错误和多位错误的数据公开(公告)号：US08281221B2
公开(公告)日：2012-10-02
申请号：US12083373
申请日：2006-10-17
IPC分类号： G06F11/00
CPC分类号： G11C11/16 , G06F11/1044 , G06F11/1076 , G11C11/1653 , G11C11/1673 , G11C11/1675 , G11C2029/0411 , G11C2211/5641
摘要： An operation method of a MRAM of the present invention stores in memory arrays, error correction codes, each of which comprises of symbols, each of which comprises bits, and to which an error correction is possible in units of symbols. In the operation method, the symbols are read by using the reference cells different from each other. Moreover, when a correctable error is detected in a read data of the error correction code from data cells corresponding to an input address, (A) a data in the data cell corresponding to an error bit is corrected, for a first error symbol as an error pattern of one bit, and (B) a data in the reference cell that is used to read a second error symbol is corrected for a second error symbol as en error pattern of the bits.
摘要翻译： 本发明的MRAM的操作方法存储在存储器阵列中，每个都包括符号，每个符号包括位，并且可以以符号为单位进行纠错。 在操作方法中，通过使用彼此不同的参考单元来读取符号。 此外，当在对应于输入地址的数据单元的错误校正码的读取数据中检测到可校正错误时，（A）对与错误位对应的数据单元中的数据进行校正，对于第一错误符号，作为 一个比特的错误模式和（B）用于读取第二错误符号的参考小区中的数据被校正为第二个错误符号作为比特的错误模式。
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公开(公告)号：US20090161423A1
公开(公告)日：2009-06-25
申请号：US12066926
申请日：2006-09-07
IPC分类号： G11C11/14 , G11C11/416
CPC分类号： B82Y10/00 , G11C11/161 , G11C11/1655 , G11C11/1657 , G11C11/1659 , G11C11/1675 , G11C11/1693
摘要： An MRAM having a first cell array group (2-0) and a second cell array group (2-1) containing a plurality of cell arrays (21) is used. Each of the first cell array group (2-0) and the second cell array group (2-1) includes a first current source unit for supplying a first write current IWBL to a bit line WBL of the cell array (21) and a first current waveform shaping unit having a first capacitor requiring precharge and shaping the waveform of the first write current IWBL. When the cell array (21) performs write into a magnetic memory (24), the first current waveform shaping unit of the first cell array group (2-0) and the first current waveform shaping unit of the second cell array group (2-1) charges and discharges electric charge accumulated in the first capacitor to wiring toward the bit line WBL at different periods from each other.
摘要翻译： 使用具有包含多个单元阵列（21）的第一单元阵列组（2-0）和第二单元阵列组（2-1）的MRAM。 第一单元阵列组（2-0）和第二单元阵列组（2-1）中的每一个包括用于将第一写入电流IWBL提供给单元阵列（21）的位线WBL的第一电流源单元和 第一电流波形整形单元，其具有需要预充电的第一电容器并且对第一写入电流IWBL的波形进行整形。 当单元阵列（21）对磁存储器（24）进行写入时，第一单元阵列组（2-0）的第一电流波形整形单元和第二单元阵列组（2- 1）对在第一电容器中累积的电荷进行充电和放电，以不同的周期向位线WBL布线。
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公开(公告)号：US07453719B2
公开(公告)日：2008-11-18
申请号：US10553998
申请日：2004-04-13
IPC分类号： G11C11/15
CPC分类号： G11C11/15 , G11C11/1673
摘要： An MRAM has a plurality of bit lines, a reference bit line, a plurality of memory cells and reference cells and a read section. The memory cells are provided along the bit lines and the reference cells along the reference bit line. The memory cell and reference cell have a tunneling magnetic resistance and a reference tunneling magnetic resistance, each of which has a spontaneous magnetization whose direction is reversed in accordance with data stored therein. The read section has a first resistance section which contains a ninth terminal connected with a bit line and a tenth terminal connected with the first power supply, a second resistance section which contains an eleventh terminal connected with the reference bit line and a twelfth terminal connected with the first power supply, and a comparing section which compares a sense voltage on the ninth terminal and a reference voltage of the eleventh terminal.
摘要翻译： MRAM具有多个位线，参考位线，多个存储单元和参考单元以及读取部分。 沿着位线和参考单元沿着参考位线提供存储单元。 存储单元和参考单元具有隧道磁阻和参考隧道磁阻，每个具有根据存储在其中的数据方向反转的自发磁化。 读取部分具有包含与位线连接的第九端子和与第一电源连接的第十端子的第一电阻部分，包含与参考位线连接的第十一端子的第二电阻部分和与参考位线连接的第十二端子 第一电源以及比较第九端子的感测电压与第十一端子的基准电压的比较部。
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公开(公告)号：US07440314B2
公开(公告)日：2008-10-21
申请号：US10591617
申请日：2005-03-02
CPC分类号： G11C11/16
摘要： A MRAM includes: first wirings, second wirings, memory cells, a second sense amplifier and a first sense amplifier. The first wirings and second wirings are extended in a first and a second direction. The memory cells are placed correspondingly to positions where the first wirings are crossed with the second wirings. The second sense amplifier detects a state of a reference cell on the basis of an output from the reference cell provided by corresponding to a reference wiring. The first sense amplifier (2) detects a state of the memory cell on the basis of an output from the reference cell and an output from the memory cell. The memory cell includes a magnetic tunneling junction element having a laminated free layer. The magnetic tunneling junction element has a magnetization easy axis direction which is different from the first and second directions.
摘要翻译： MRAM包括：第一布线，第二布线，存储单元，第二读出放大器和第一读出放大器。 第一布线和第二布线沿第一和第二方向延伸。 存储单元对应于第一配线与第二配线交叉的位置放置。 第二读出放大器基于对应于参考布线提供的参考单元的输出来检测参考单元的状态。 第一读出放大器（2）基于来自参考单元的输出和来自存储单元的输出来检测存储器单元的状态。 存储单元包括具有层叠自由层的磁性隧道接合元件。 磁性隧道接合元件具有不同于第一和第二方向的易磁化方向的磁化方向。
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公开(公告)号：US20080089117A1
公开(公告)日：2008-04-17
申请号：US11574121
申请日：2005-08-19
CPC分类号： H01L27/228 , G11C11/15 , H01L43/08 , Y10S977/935
摘要： A memory cell is used which includes a plurality of magneto-resistive elements and a plurality of laminated ferrimagnetic structure substances. The plurality of the magneto-resistive elements are placed corresponding to respective positions where a plurality of first wirings extended in a first direction intersects with a plurality of second wirings extended in a second direction which is substantially perpendicular to the first direction. The plurality of the laminated ferrimagnetic structure substances corresponds to the plurality of the magneto-resistive elements, respectively, is placed to have a distance of a predetermined range from the respective plurality of the magneto-resistive elements, and has a laminated ferrimagnetic structure. The magneto-resistive element includes a free layer having a laminated ferrimagnetic structure, a fixed layer, and a nonmagnetic layer interposed between the free layer and the fixed layer.
摘要翻译： 使用包括多个磁阻元件和多个叠层铁磁结构物质的存储单元。 多个磁阻元件对应于在第一方向上延伸的多个第一布线与基本上垂直于第一方向的第二方向延伸的多个第二布线相对应的相应位置放置。 多个叠层铁氧体结构物质分别对应于多个磁阻元件，放置成距离相应的多个磁阻元件具有预定范围的距离，并具有叠层铁磁结构。 磁阻元件包括层叠的铁磁结构，固定层和插入在自由层和固定层之间的非磁性层的自由层。
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公开(公告)号：US20070159876A1
公开(公告)日：2007-07-12
申请号：US11614231
申请日：2006-12-21
IPC分类号： G11C11/00
CPC分类号： G11C11/16
摘要： A semiconductor memory device is provided with a memory array including memory cells arranged in rows and columns; and a sense amplifier circuit. Each of the memory cells includes at least one magnetoresistive element storing data, and an amplifying member used to amplify a signal generated by a current through the at least one magnetoresistive element. The sense amplifier circuit identifies data stored in the at least one magnetoresistive element in response to an output signal of the amplifying member.
摘要翻译： 半导体存储器件设置有包括排列成行和列的存储单元的存储器阵列; 和读出放大器电路。 每个存储单元包括存储数据的至少一个磁阻元件和用于放大由通过至少一个磁阻元件的电流产生的信号的放大构件。 感测放大器电路响应于放大构件的输出信号识别存储在至少一个磁阻元件中的数据。
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