公开(公告)号：US20240204084A1

公开(公告)日：2024-06-20

申请号：US18590099

申请日：2024-02-28

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yen-Ru LEE ,  Chii-Horng LI ,  Chien-I KUO ,  Heng-Wen TING ,  Jung-Chi TAI ,  Lilly SU ,  Yang-Tai HSIAO

IPC: H01L29/66 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/417 ,  H01L29/78

CPC classification number: H01L29/66795 ,  H01L29/41791 ,  H01L29/785 ,  H01L21/823425 ,  H01L21/823431 ,  H01L21/823475 ,  H01L27/0886

Abstract: A device includes a first semiconductor fin, a second semiconductor fin, a source/drain epitaxial structure, a semiconductive cap, and a contact. The first semiconductor fin and the second semiconductor fin are over a substrate. The source/drain epitaxial structure is connected to the first semiconductor fin and the second semiconductor fin. The source/drain epitaxial structure includes a first protruding portion and a second protruding portion aligned with the first semiconductor fin and the second semiconductor fin, respectively. The semiconductive cap is on and in contact with the first protruding portion and the second protruding portion. A top surface of the semiconductive cap is lower than a top surface of the first protruding portion of the source/drain epitaxial structure. The contact is electrically connected to the source/drain epitaxial structure and covers the semiconductive cap.

公开(公告)号：US20230369490A1

公开(公告)日：2023-11-16

申请号：US18346480

申请日：2023-07-03

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wei-Yang LEE ,  Ting-Yeh CHEN ,  Chii-Horng LI ,  Feng-Cheng YANG

IPC: H01L29/78 ,  H01L27/092 ,  H01L29/66 ,  H01L29/165

CPC classification number: H01L29/7848 ,  H01L27/0924 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/66818 ,  H01L29/7851 ,  H01L29/7853 ,  H01L29/0847

Abstract: A method includes forming a fin in a substrate. The fin is etched to create a source/drain recess. A source/drain feature is formed in the source/drain recess, in which a lattice constant of the source/drain feature is greater than a lattice constant of the fin. An epitaxy coat is grown over the source/drain feature, in which a lattice constant of the epitaxy coat is smaller than a lattice constant of the fin.

公开(公告)号：US20190319098A1

公开(公告)日：2019-10-17

申请号：US15952495

申请日：2018-04-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Roger TAI ,  Chii-Horng LI ,  Pei-Ren JENG ,  Yen-Ru LEE ,  Yan-Ting LIN ,  Chih-Yun CHIN

IPC: H01L29/08 ,  H01L29/66 ,  H01L21/762 ,  H01L21/02 ,  H01L29/78 ,  H01L29/165

Abstract: An embodiment is a semiconductor structure. The semiconductor structure includes a fin on a substrate. A gate structure is over the fin. A source/drain is in the fin proximate the gate structure. The source/drain includes a bottom layer, a supportive layer over the bottom layer, and a top layer over the supportive layer. The supportive layer has a different property than the bottom layer and the top layer, such as a different material, a different natural lattice constant, a different dopant concentration, and/or a different alloy percent content.

公开(公告)号：US20190164835A1

公开(公告)日：2019-05-30

申请号：US15821969

申请日：2017-11-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Hao LU ,  Yi-Fang PAI ,  Tuoh-Bin NG ,  Li-Li SU ,  Chii-Horng LI

IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/04 ,  H01L29/08 ,  H01L29/167 ,  H01L29/45 ,  H01L23/535 ,  H01L21/02

CPC classification number: H01L21/823418 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/02609 ,  H01L21/823431 ,  H01L21/823475 ,  H01L23/535 ,  H01L27/0886 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/167 ,  H01L29/45 ,  H01L29/7848

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a first fin structure and a second fin structure over a substrate. The semiconductor device structure also includes a gate structure over the first and second fin structure. The semiconductor device structure further includes a source/drain structure over the first and second fin structure. The source/drain structure includes a first semiconductor layer over the first fin structure and a second semiconductor layer over the second fin structure. The source/drain structure also includes a third semiconductor layer covering the first and second semiconductor layers. The third semiconductor layer has a surface with [110] plane orientation.

公开(公告)号：US20170125410A1

公开(公告)日：2017-05-04

申请号：US14925479

申请日：2015-10-28

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chii-Horng LI ,  Chien-I KUO ,  Lilly SU ,  Chien-Chang SU ,  Ying-Wei LI

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/08

CPC classification number: H01L27/0886 ,  H01L21/823431 ,  H01L21/823481 ,  H01L29/0847

Abstract: A semiconductor device includes a semiconductor substrate, at least one first isolation structure, at least one second isolation structure, a source structure, a drain structure and a plurality of semiconductor fins. The first isolation structure and the second isolation structure are located on the semiconductor substrate. The source structure is located on the semiconductor substrate and the first isolation structure, in which at least one first gap is located between the source structure and the first isolation structure. The drain structure is located on the semiconductor substrate and the second isolation structure, in which at least one second gap is located between the drain structure and the second isolation structure. The semiconductor fins protrude from the semiconductor substrate, in which the semiconductor fins are spaced apart from each other, and connect the source structure and the drain structure.

公开(公告)号：US20210273101A1

公开(公告)日：2021-09-02

申请号：US17320687

申请日：2021-05-14

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wei-Yang LEE ,  Ting-Yeh CHEN ,  Chii-Horng LI ,  Feng-Cheng YANG

IPC: H01L29/78 ,  H01L27/092 ,  H01L29/66 ,  H01L29/165

Abstract: A method includes forming a fin in a substrate. The fin is etched to create a source/drain recess. A source/drain feature is formed in the source/drain recess, in which a lattice constant of the source/drain feature is greater than a lattice constant of the fin. An epitaxy coat is grown over the source/drain feature, in which a lattice constant of the epitaxy coat is smaller than a lattice constant of the fin.

公开(公告)号：US20200381539A1

公开(公告)日：2020-12-03

申请号：US16994531

申请日：2020-08-14

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yen-Ru LEE ,  Chii-Horng LI ,  Chien-I KUO ,  Heng-Wen TING ,  Jung-Chi TAI ,  Lilly SU ,  Yang-Tai HSIAO

IPC: H01L29/66 ,  H01L29/417 ,  H01L29/78

Abstract: A method includes etching a semiconductor substrate to form a plurality of semiconductor fins. The semiconductor fins are etched to form a recess. An epitaxy structure is grown in the recess. The epitaxy structure has a W-shape cross section. A capping layer is formed over the epitaxy structure. The capping layer is at least conformal to a sidewall of the epitaxy structure. The capping layer is etched to expose a top surface of the epitaxy structure. A first portion of the capping layer remains over the sidewall of the epitaxy structure after etching the capping layer. A contact is formed in contact with the exposed top surface of the epitaxy structure and the first portion of the capping layer.

公开(公告)号：US20190165100A1

公开(公告)日：2019-05-30

申请号：US15922643

申请日：2018-03-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien-I KUO ,  Chii-Horng LI ,  Chia-Ling CHAN ,  Li-Li SU ,  Yi-Fang PAI ,  Wei Te CHIANG ,  Shao-Fu FU ,  Wei Hao LU

IPC: H01L29/08 ,  H01L29/167 ,  H01L29/36 ,  H01L21/223 ,  H01L21/02 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/0847 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/2236 ,  H01L21/30604 ,  H01L21/3065 ,  H01L29/167 ,  H01L29/36 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/7851

Abstract: The present disclosure relates generally to an epitaxy scheme for forming source/drain regions in a semiconductor device, such as an n-channel device. In an example, a method of manufacturing a semiconductor device includes forming an active area on a substrate. The active area includes a source/drain region. The formation of the source/drain region includes forming a barrier region along a bottom surface and side surface of a recess in the active area. The barrier region includes arsenic having a first dopant concentration. The formation of the source/drain region further includes forming an epitaxial material on the barrier region in the recess. The epitaxial material includes phosphorous having a second dopant concentration.

公开(公告)号：US20190051737A1

公开(公告)日：2019-02-14

申请号：US16160900

申请日：2018-10-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yen-Ru LEE ,  Chii-Horng LI ,  Chien-I KUO ,  Heng-Wen TING ,  Jung-Chi TAI ,  Lilly SU ,  Yang-Tai HSIAO

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/417 ,  H01L21/8234 ,  H01L27/088

Abstract: A semiconductor device includes a plurality of semiconductor fins, an epitaxy structure, a capping layer, and a contact. The epitaxy structure adjoins the semiconductor fins. The epitaxy structure has a plurality of protrusive portions. The capping layer is over a sidewall of the epitaxy structure. The contact is in contact with the epitaxy structure and the capping layer. The contact has a portion between the protrusive portions. The portion of the contact between the protrusive portions has a bottom in contact with the epitaxy structure.

公开(公告)号：US20170077228A1

公开(公告)日：2017-03-16

申请号：US14850726

申请日：2015-09-10

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yen-Ru LEE ,  Chii-Horng LI ,  Chien-I KUO ,  Heng-Wen TING ,  Jung-Chi TAI ,  Lilly SU ,  Yang-Tai HSIAO

IPC: H01L29/08 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L27/088

CPC classification number: H01L29/66795 ,  H01L21/823425 ,  H01L21/823431 ,  H01L21/823475 ,  H01L27/0886 ,  H01L29/41791 ,  H01L29/785

Abstract: A semiconductor device includes a semiconductor substrate, a plurality of semiconductor fins and a source/drain structure. The semiconductor fins and the source/drain structure are located on the semiconductor substrate, and the source/drain structure is connected to the semiconductor fins. The source/drain structure has a top portion with a W-shape cross section for forming a contact landing region. The semiconductor device may further include a plurality of capping layers located on a plurality of recessed portions of the top portion.

Abstract translation: 半导体器件包括半导体衬底，多个半导体鳍片和源极/漏极结构。 半导体鳍片和源极/漏极结构位于半导体衬底上，源极/漏极结构连接到半导体鳍片。 源极/漏极结构具有用于形成接触着陆区域的具有W形横截面的顶部部分。 半导体器件还可以包括位于顶部的多个凹陷部分上的多个封盖层。