公开(公告)号：US20190319098A1

公开(公告)日：2019-10-17

申请号：US15952495

申请日：2018-04-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Roger TAI ,  Chii-Horng LI ,  Pei-Ren JENG ,  Yen-Ru LEE ,  Yan-Ting LIN ,  Chih-Yun CHIN

IPC: H01L29/08 ,  H01L29/66 ,  H01L21/762 ,  H01L21/02 ,  H01L29/78 ,  H01L29/165

Abstract: An embodiment is a semiconductor structure. The semiconductor structure includes a fin on a substrate. A gate structure is over the fin. A source/drain is in the fin proximate the gate structure. The source/drain includes a bottom layer, a supportive layer over the bottom layer, and a top layer over the supportive layer. The supportive layer has a different property than the bottom layer and the top layer, such as a different material, a different natural lattice constant, a different dopant concentration, and/or a different alloy percent content.

公开(公告)号：US20240204084A1

公开(公告)日：2024-06-20

申请号：US18590099

申请日：2024-02-28

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yen-Ru LEE ,  Chii-Horng LI ,  Chien-I KUO ,  Heng-Wen TING ,  Jung-Chi TAI ,  Lilly SU ,  Yang-Tai HSIAO

IPC: H01L29/66 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/417 ,  H01L29/78

CPC classification number: H01L29/66795 ,  H01L29/41791 ,  H01L29/785 ,  H01L21/823425 ,  H01L21/823431 ,  H01L21/823475 ,  H01L27/0886

Abstract: A device includes a first semiconductor fin, a second semiconductor fin, a source/drain epitaxial structure, a semiconductive cap, and a contact. The first semiconductor fin and the second semiconductor fin are over a substrate. The source/drain epitaxial structure is connected to the first semiconductor fin and the second semiconductor fin. The source/drain epitaxial structure includes a first protruding portion and a second protruding portion aligned with the first semiconductor fin and the second semiconductor fin, respectively. The semiconductive cap is on and in contact with the first protruding portion and the second protruding portion. A top surface of the semiconductive cap is lower than a top surface of the first protruding portion of the source/drain epitaxial structure. The contact is electrically connected to the source/drain epitaxial structure and covers the semiconductive cap.

公开(公告)号：US20210313443A1

公开(公告)日：2021-10-07

申请号：US16837465

申请日：2020-04-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien-Wei LEE ,  Yen-Ru LEE ,  Hsueh-Chang SUNG ,  Yee-Chia YEO

IPC: H01L29/66 ,  H01L21/02

Abstract: A method for forming a fin field effect transistor device structure includes forming a fin structure over a substrate. The method also includes forming a gate structure across the fin structure. The method also includes forming a source/drain recess adjacent to the gate structure. The method also includes wet cleaning the source/drain recess in a first wet cleaning process. The method also includes treating the source/drain recess with a plasma process. The method also includes wet cleaning the source/drain recess in a second wet cleaning process after treating the source/drain recess via the plasma process. The method also includes growing a source/drain epitaxial structure in the source/drain recess.

公开(公告)号：US20200381539A1

公开(公告)日：2020-12-03

申请号：US16994531

申请日：2020-08-14

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yen-Ru LEE ,  Chii-Horng LI ,  Chien-I KUO ,  Heng-Wen TING ,  Jung-Chi TAI ,  Lilly SU ,  Yang-Tai HSIAO

IPC: H01L29/66 ,  H01L29/417 ,  H01L29/78

Abstract: A method includes etching a semiconductor substrate to form a plurality of semiconductor fins. The semiconductor fins are etched to form a recess. An epitaxy structure is grown in the recess. The epitaxy structure has a W-shape cross section. A capping layer is formed over the epitaxy structure. The capping layer is at least conformal to a sidewall of the epitaxy structure. The capping layer is etched to expose a top surface of the epitaxy structure. A first portion of the capping layer remains over the sidewall of the epitaxy structure after etching the capping layer. A contact is formed in contact with the exposed top surface of the epitaxy structure and the first portion of the capping layer.

公开(公告)号：US20190051737A1

公开(公告)日：2019-02-14

申请号：US16160900

申请日：2018-10-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yen-Ru LEE ,  Chii-Horng LI ,  Chien-I KUO ,  Heng-Wen TING ,  Jung-Chi TAI ,  Lilly SU ,  Yang-Tai HSIAO

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/417 ,  H01L21/8234 ,  H01L27/088

Abstract: A semiconductor device includes a plurality of semiconductor fins, an epitaxy structure, a capping layer, and a contact. The epitaxy structure adjoins the semiconductor fins. The epitaxy structure has a plurality of protrusive portions. The capping layer is over a sidewall of the epitaxy structure. The contact is in contact with the epitaxy structure and the capping layer. The contact has a portion between the protrusive portions. The portion of the contact between the protrusive portions has a bottom in contact with the epitaxy structure.

公开(公告)号：US20170077228A1

公开(公告)日：2017-03-16

申请号：US14850726

申请日：2015-09-10

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yen-Ru LEE ,  Chii-Horng LI ,  Chien-I KUO ,  Heng-Wen TING ,  Jung-Chi TAI ,  Lilly SU ,  Yang-Tai HSIAO

IPC: H01L29/08 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L27/088

CPC classification number: H01L29/66795 ,  H01L21/823425 ,  H01L21/823431 ,  H01L21/823475 ,  H01L27/0886 ,  H01L29/41791 ,  H01L29/785

Abstract: A semiconductor device includes a semiconductor substrate, a plurality of semiconductor fins and a source/drain structure. The semiconductor fins and the source/drain structure are located on the semiconductor substrate, and the source/drain structure is connected to the semiconductor fins. The source/drain structure has a top portion with a W-shape cross section for forming a contact landing region. The semiconductor device may further include a plurality of capping layers located on a plurality of recessed portions of the top portion.

Abstract translation: 半导体器件包括半导体衬底，多个半导体鳍片和源极/漏极结构。 半导体鳍片和源极/漏极结构位于半导体衬底上，源极/漏极结构连接到半导体鳍片。 源极/漏极结构具有用于形成接触着陆区域的具有W形横截面的顶部部分。 半导体器件还可以包括位于顶部的多个凹陷部分上的多个封盖层。

公开(公告)号：US20220359733A1

公开(公告)日：2022-11-10

申请号：US17873982

申请日：2022-07-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yen-Ru LEE ,  Chii-Horng LI ,  Chien-I KUO ,  Heng-Wen TING ,  Jung-Chi TAI ,  Lilly SU ,  Yang-Tai HSIAO

IPC: H01L29/66 ,  H01L29/417 ,  H01L29/78

Abstract: A device includes a first semiconductor fin, a second semiconductor fin, a source/drain epitaxial structure, a semiconductive cap, and a contact. The first semiconductor fin and the second semiconductor fin are over a substrate. The source/drain epitaxial structure is connected to the first semiconductor fin and the second semiconductor fin. The source/drain epitaxial structure includes a first protruding portion and a second protruding portion aligned with the first semiconductor fin and the second semiconductor fin, respectively. The semiconductive cap is on and in contact with the first protruding portion and the second protruding portion. A top surface of the semiconductive cap is lower than a top surface of the first protruding portion of the source/drain epitaxial structure. The contact is electrically connected to the source/drain epitaxial structure and covers the semiconductive cap.

公开(公告)号：US20220302281A1

公开(公告)日：2022-09-22

申请号：US17207359

申请日：2021-03-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien-Wei LEE ,  Chii-Horng LI ,  Heng-Wen TING ,  Yee-Chia YEO ,  Yen-Ru LEE ,  Chih-Yun CHIN ,  Chih-Hung NIEN ,  Jing Yi YAN

IPC: H01L29/66 ,  H01L29/45 ,  H01L29/08 ,  H01L29/78 ,  H01L29/167 ,  H01L21/225 ,  H01L21/02 ,  H01L29/40

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a fin structure over the substrate, a gate structure over the fin structure, an epitaxial region formed in the fin structure and adjacent to the gate structure. The epitaxial region can embed a plurality of clusters of dopants.

公开(公告)号：US20170077300A1

公开(公告)日：2017-03-16

申请号：US14852441

申请日：2015-09-11

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yen-Ru LEE ,  Chii-Horng LI ,  Heng-Wen TING ,  Tzu-Hsiang HSU ,  Chih-Yun CHIN

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66

CPC classification number: H01L29/7848 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate, at least one first isolation structure, at least two second isolation structures, and a plurality of epitaxy structures. The substrate has a plurality of semiconductor fins therein. The first isolation structure is disposed between the semiconductor fins. The semiconductor fins are disposed between the second isolation structures, and the second isolation structures extend into the substrate further than the first isolation structure. The epitaxy structures are respectively disposed on the semiconductor fins. The epitaxy structures are separated from each other, and at least one of the epitaxy structures has a substantially round profile.

Abstract translation: 半导体器件包括衬底，至少一个第一隔离结构，至少两个第二隔离结构和多个外延结构。 基板在其中具有多个半导体翅片。 第一隔离结构设置在半导体翅片之间。 半导体鳍片设置在第二隔离结构之间，并且第二隔离结构比第一隔离结构延伸到衬底中。 外延结构分别设置在半导体翅片上。 外延结构彼此分离，并且至少一个外延结构具有基本圆形的轮廓。

公开(公告)号：US20170077222A1

公开(公告)日：2017-03-16

申请号：US14854915

申请日：2015-09-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yen-Ru LEE ,  Chii-Horng LI ,  Chien-I KUO ,  Heng-Wen TING ,  Jung-Chi TAI ,  Lilly SU ,  Tzu-Ching LIN

IPC: H01L29/06 ,  H01L29/08 ,  H01L21/764 ,  H01L21/762 ,  H01L21/283 ,  H01L21/306 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/0649 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/0262 ,  H01L21/283 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/76224 ,  H01L21/764 ,  H01L29/0847 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device includes a substrate, at least one first isolation structure, at least two second isolation structure, and an epitaxy structure. The substrate has a plurality of semiconductor fins therein. The first isolation structure is disposed between the semiconductor fins. The semiconductor fins are disposed between the second isolation structures, and the second isolation structures extend into the substrate further than the first isolation structure. The epitaxy structure is disposed on the semiconductor fins. At least one void is present between the first isolation structure and the epitaxy structure.

Abstract translation: 半导体器件包括衬底，至少一个第一隔离结构，至少两个第二隔离结构和外延结构。 基板在其中具有多个半导体翅片。 第一隔离结构设置在半导体翅片之间。 半导体鳍片设置在第二隔离结构之间，并且第二隔离结构比第一隔离结构延伸到衬底中。 外延结构设置在半导体鳍片上。 在第一隔离结构和外延结构之间存在至少一个空隙。