公开(公告)号：US20240088266A1

公开(公告)日：2024-03-14

申请号：US18511711

申请日：2023-11-16

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hsueh-Chang SUNG ,  Kun-Mu LI

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/308 ,  H01L29/04 ,  H01L29/08 ,  H01L29/78

CPC分类号： H01L29/66636 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02609 ,  H01L21/0262 ,  H01L21/3065 ,  H01L21/3085 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851 ,  H01L29/0653

摘要： A fin structure on a substrate is disclosed. The fin structure can comprises a first epitaxial region and a second epitaxial region separated by a dielectric region, a merged epitaxial region on the first epitaxial region and the second epitaxial region, an epitaxial buffer region on a top surface of the merged epitaxial region, and an epitaxial capping region on the buffer epitaxial region and side surfaces of the merged epitaxial region.

公开(公告)号：US20220059676A1

公开(公告)日：2022-02-24

申请号：US17515883

申请日：2021-11-01

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hsueh-Chang SUNG ,  Kun-Mu Li

IPC分类号： H01L29/66 ,  H01L21/308 ,  H01L21/02 ,  H01L29/78 ,  H01L21/3065 ,  H01L29/04 ,  H01L29/08

摘要： A fin structure on a substrate is disclosed. The fin structure can comprises a first epitaxial region and a second epitaxial region separated by a dielectric region, a merged epitaxial region on the first epitaxial region and the second epitaxial region, an epitaxial buffer region on a top surface of the merged epitaxial region, and an epitaxial capping region on the buffer epitaxial region and side surfaces of the merged epitaxial region.

公开(公告)号：US20210313443A1

公开(公告)日：2021-10-07

申请号：US16837465

申请日：2020-04-01

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chien-Wei LEE ,  Yen-Ru LEE ,  Hsueh-Chang SUNG ,  Yee-Chia YEO

IPC分类号： H01L29/66 ,  H01L21/02

摘要： A method for forming a fin field effect transistor device structure includes forming a fin structure over a substrate. The method also includes forming a gate structure across the fin structure. The method also includes forming a source/drain recess adjacent to the gate structure. The method also includes wet cleaning the source/drain recess in a first wet cleaning process. The method also includes treating the source/drain recess with a plasma process. The method also includes wet cleaning the source/drain recess in a second wet cleaning process after treating the source/drain recess via the plasma process. The method also includes growing a source/drain epitaxial structure in the source/drain recess.

公开(公告)号：US20180204726A1

公开(公告)日：2018-07-19

申请号：US15918354

申请日：2018-03-12

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Tsung-Yao WEN ,  Sheng-Chen WANG ,  Sai-Hooi YEONG ,  Hsueh-Chang SUNG ,  Ya-Yun CHENG

IPC分类号： H01L21/265 ,  H01L29/78 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/161 ,  H01L29/10 ,  H01L21/324 ,  H01L29/04 ,  H01L27/12 ,  H01L27/092 ,  H01L21/84 ,  H01L21/8238 ,  H01L27/088

CPC分类号： H01L21/26513 ,  H01L21/324 ,  H01L21/823431 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/045 ,  H01L29/0653 ,  H01L29/1033 ,  H01L29/1054 ,  H01L29/1083 ,  H01L29/161 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

摘要： A fin field device structure and method for forming the same are provided. The FinFET device structure includes a protruding structure extending from a substrate and an anti-punch through implant (APT) region formed in the protruding structure. The FinFET device structure includes a barrier layer formed on the APT region, and the barrier layer has a width in a horizontal direction. The width gradually tapers from a bottom of the barrier layer to a top of the barrier layer.

公开(公告)号：US20200321450A1

公开(公告)日：2020-10-08

申请号：US16908057

申请日：2020-06-22

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hsueh-Chang SUNG ,  Kun-Mu LI

IPC分类号： H01L29/66 ,  H01L21/308 ,  H01L21/02 ,  H01L29/78 ,  H01L21/3065 ,  H01L29/04 ,  H01L29/08

摘要： A method of forming a semiconductor device having first and second fin structures on a substrate includes forming a first epitaxial region of the first fin structure and forming a second epitaxial region of the second fin structure. The method further includes forming a buffer region on the first epitaxial region of the first fin structure and performing an etch process to etch back a portion of the second epitaxial region. The buffer region helps to prevents etch back of a top surface of the first epitaxial region during the etch process. Further, a capping region is formed on the buffer region and the etched second epitaxial region.

公开(公告)号：US20170133286A1

公开(公告)日：2017-05-11

申请号：US14934517

申请日：2015-11-06

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Hsueh-Chang SUNG ,  Chih-Chiang CHANG ,  Kun-Mu LI

IPC分类号： H01L21/66 ,  H01L27/092 ,  H01L29/161 ,  H01L29/78 ,  H01L29/04 ,  H01L29/08 ,  H01L29/06 ,  H01L21/8238 ,  H01L29/165

CPC分类号： H01L22/30 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L27/0924 ,  H01L29/045 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/7848

摘要： A semiconductor structure includes a device region and a test region. In the device region, first fin spacers cover sidewalls of a first fin structure and have a first height, and a first epitaxy structure is disposed in the first fin structure, which a portion of the first epitaxy structure is above the first fin spacers and having a first width. In the test region, second fin spacers cover sidewalls of the second fin structure and have a second height, and the second height is greater than the first height. A second epitaxy structure is disposed in the second fin structure, and a portion of the second epitaxy structure is above the second fin spacers and having a second width, which the second width is less than the first width.

公开(公告)号：US20180033882A1

公开(公告)日：2018-02-01

申请号：US15782637

申请日：2017-10-12

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hsueh-Chang SUNG ,  Liang-Yi CHEN

IPC分类号： H01L29/78 ,  H01L21/02 ,  H01L21/306 ,  H01L29/66

CPC分类号： H01L29/785 ,  H01L21/02532 ,  H01L21/30604 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7848

摘要： A source/drain (S/D) structure includes a SiGe structure epitaxially grown and having sloped facets on a recessed fin structure disposed adjacent to a channel portion of a finFET, a first Ge structure having a rounded surface epitaxially grown on the SiGe structure, and a capping layer formed over the rounded surface of the Ge structure. The capping layer may be formed of Si. Such S/D structures provide both a larger physical size for lower contact resistance, and greater volume and concentration of Ge for higher compressive strain applied to the channel portion of the finFET.

公开(公告)号：US20170092768A1

公开(公告)日：2017-03-30

申请号：US14871454

申请日：2015-09-30

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Hsueh-Chang SUNG ,  Chih-Chiang CHANG ,  Kun-Mu LI

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L29/165

CPC分类号： H01L29/7849 ,  H01L21/02532 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7851

摘要： A semiconductor structure and a method of fabricating the semiconductor structure are disclosed herein. The semiconductor structure includes a substrate, a strain-inducing layer and an epitaxy structure. The strain-inducing layer is disposed on the substrate, and the epitaxy structure is embedded in the strain-inducing layer and not in contact with the substrate.

公开(公告)号：US20160218104A1

公开(公告)日：2016-07-28

申请号：US14607971

申请日：2015-01-28

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Tsung-Yao WEN ,  Sheng-Chen WANG ,  Sai-Hooi YEONG ,  Hsueh-Chang SUNG ,  Ya-Yun CHENG

IPC分类号： H01L27/092 ,  H01L29/06 ,  H01L29/66 ,  H01L29/161 ,  H01L29/04 ,  H01L29/10 ,  H01L29/78

CPC分类号： H01L21/26513 ,  H01L21/324 ,  H01L21/823431 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/045 ,  H01L29/0653 ,  H01L29/1033 ,  H01L29/1054 ,  H01L29/1083 ,  H01L29/161 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

摘要： A fin field device structure and method for forming the same are provided. The FinFET device structure includes a substrate and a fin structure extending from the substrate. The FinFET device structure also includes an anti-punch through implant (APT) region formed in the fin structure and a barrier layer formed on the APT region. The barrier layer has a middle portion and a peripheral portion, and the middle portion is higher than the peripheral portion. The FinFET device structure further includes an epitaxial layer formed on the barrier layer.

摘要翻译： 提供了一种翅片场设备结构及其形成方法。 FinFET器件结构包括从衬底延伸的衬底和鳍结构。 FinFET器件结构还包括形成在鳍结构中的抗穿通植入（APT）区域和形成在APT区域上的阻挡层。 阻挡层具有中间部分和周边部分，并且中间部分高于周边部分。 FinFET器件结构还包括形成在阻挡层上的外延层。