公开(公告)号：US11990509B2

公开(公告)日：2024-05-21

申请号：US17866986

申请日：2022-07-18

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Shu-Han Chen ,  Tsung-Ju Chen ,  Chun-Heng Chen ,  Chi On Chui

IPC: H01L29/06 ,  H01L21/02 ,  H01L21/306 ,  H01L21/311 ,  H01L21/3115 ,  H01L29/66 ,  H01L29/78 ,  H01L21/265 ,  H01L29/10

CPC classification number: H01L29/0673 ,  H01L21/0262 ,  H01L21/30604 ,  H01L21/31116 ,  H01L21/31155 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L21/26513 ,  H01L29/1083

Abstract: In an embodiment, a structure includes: a nano-structure; an epitaxial source/drain region adjacent the nano-structure; a gate dielectric wrapped around the nano-structure; a gate electrode over the gate dielectric, the gate electrode having an upper portion and a lower portion, a first width of the upper portion increasing continually in a first direction extending away from a top surface of the nano-structure, a second width of the lower portion being constant along the first direction; and a gate spacer between the gate dielectric and the epitaxial source/drain region.

公开(公告)号：US20220352313A1

公开(公告)日：2022-11-03

申请号：US17866986

申请日：2022-07-18

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Shu-Han Chen ,  Tsung-Ju Chen ,  Chun-Heng Chen ,  Chi On Chui

IPC: H01L29/06 ,  H01L21/02 ,  H01L21/306 ,  H01L21/311 ,  H01L29/78 ,  H01L21/3115 ,  H01L29/66

Abstract: In an embodiment, a structure includes: a nano-structure; an epitaxial source/drain region adjacent the nano-structure; a gate dielectric wrapped around the nano-structure; a gate electrode over the gate dielectric, the gate electrode having an upper portion and a lower portion, a first width of the upper portion increasing continually in a first direction extending away from a top surface of the nano-structure, a second width of the lower portion being constant along the first direction; and a gate spacer between the gate dielectric and the epitaxial source/drain region.

公开(公告)号：US10269900B2

公开(公告)日：2019-04-23

申请号：US15601895

申请日：2017-05-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chi-Ming Liao ,  Chun-Heng Chen ,  Sheng-Po Wu ,  Ming-Feng Hsieh ,  Hongfa Luan

IPC: H01L21/762 ,  H01L29/66 ,  H01L29/06 ,  H01L21/02 ,  H01L27/12 ,  H01L23/535 ,  H01L29/51 ,  H01L29/78 ,  H01L21/84

Abstract: Presented herein is a device including an insulator layer disposed over a substrate. An adhesion layer is disposed over the insulator layer and includes a semiconductor oxide, the semiconductor oxide includes a compound of a semiconductor element and oxygen. A semiconductor film layer is over the adhesion layer, the semiconductor film layer being a material that includes the semiconductor element, the semiconductor film layer having a different composition than the adhesion layer. Bonds at an interface between the insulator layer and the adhesion layer comprise oxygen-hydrogen bonds and oxygen-semiconductor element bonds. An interface between a dummy gate and a gate dielectric layer of a gate-last transistor structure may be similarly formed.

公开(公告)号：US20150102470A1

公开(公告)日：2015-04-16

申请号：US14054483

申请日：2013-10-15

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chi-Ming Liao ,  Chun-Heng Chen ,  Sheng-Po Wu ,  Ming-Feng Hsieh ,  Hongfa Luan

IPC: H01L29/06 ,  H01L27/12 ,  H01L21/762 ,  H01L21/02

CPC classification number: H01L29/0649 ,  H01L21/02123 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/7624 ,  H01L21/76243 ,  H01L21/84 ,  H01L23/535 ,  H01L27/1203 ,  H01L29/0684 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6678 ,  H01L29/78 ,  H01L2924/00 ,  H01L2924/0002

Abstract: Presented herein is a method for forming a semiconductor film using an adhesion layer, comprising providing an oxide layer disposed over a substrate, forming at least one adhesion layer over the oxide layer, and forming a film layer over the at least one adhesion layer in a same process step as the forming the at least one adhesion layer. Forming the at least one adhesion layer further comprises at least forming a first adhesion layer over the oxide layer and forming a second adhesion layer over the first adhesion layer. Forming the first adhesion layer comprises providing the terminating gas at a substantially constant first flow rate, and wherein the forming the second adhesion layer comprises ramping a flow rate of the terminating gas to a zero flow rate from the first flow rate.

Abstract translation: 这里提出的是使用粘合层形成半导体膜的方法，包括提供设置在衬底上的氧化物层，在氧化物层上形成至少一个粘合层，以及在至少一个粘附层上形成膜层 与形成至少一个粘附层相同的工艺步骤。 形成所述至少一个粘合层还包括至少在所述氧化物层上形成第一粘附层并在所述第一粘附层上形成第二粘附层。 形成第一粘合层包括以基本上恒定的第一流速提供终止气体，并且其中形成第二粘合层包括使终止气体的流速从第一流量斜率变为零流率。

公开(公告)号：US20220223595A1

公开(公告)日：2022-07-14

申请号：US17707942

申请日：2022-03-29

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Cheng-I Lin ,  Chun-Heng Chen ,  Ming-Ho Lin ,  Chi-On Chui

IPC: H01L27/092 ,  H01L21/02 ,  H01L21/8238

Abstract: A semiconductor device includes a semiconductor substrate and a first dielectric layer. The semiconductor substrate includes at least one fin. The first dielectric layer is disposed on the at least one fin. A thickness of the first dielectric layer located on a top surface of the at least one fin is greater than a thickness of the first dielectric layer located on a sidewall of the at least one fin.

公开(公告)号：US20170323939A1

公开(公告)日：2017-11-09

申请号：US15601895

申请日：2017-05-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chi-Ming Liao ,  Chun-Heng Chen ,  Sheng-Po Wu ,  Ming-Feng Hsieh ,  Hongfa Luan

IPC: H01L29/06 ,  H01L21/02 ,  H01L29/78 ,  H01L29/66 ,  H01L29/51 ,  H01L27/12 ,  H01L21/84 ,  H01L21/762 ,  H01L23/535

CPC classification number: H01L29/0649 ,  H01L21/02123 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/7624 ,  H01L21/76243 ,  H01L21/84 ,  H01L23/535 ,  H01L27/1203 ,  H01L29/0684 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6678 ,  H01L29/78 ,  H01L2924/00 ,  H01L2924/0002

Abstract: Presented herein is a device including an insulator layer disposed over a substrate. An adhesion layer is disposed over the insulator layer and includes a semiconductor oxide, the semiconductor oxide includes a compound of a semiconductor element and oxygen. A semiconductor film layer is over the adhesion layer, the semiconductor film layer being a material that includes the semiconductor element, the semiconductor film layer having a different composition than the adhesion layer. Bonds at an interface between the insulator layer and the adhesion layer comprise oxygen-hydrogen bonds and oxygen-semiconductor element bonds. An interface between a dummy gate and a gate dielectric layer of a gate-last transistor structure may be similarly formed.

公开(公告)号：US20140246758A1

公开(公告)日：2014-09-04

申请号：US13782382

申请日：2013-03-01

Applicant: Taiwan Semiconductor Manufacturing Company Ltd.

Inventor： An-Chun Tu ,  Chih-Hong Hwang ,  Yi Hsien Lu ,  Chun-Heng Chen ,  Chen-Chien Li ,  Chih-Jen Wu ,  Kuei-Shu Chang-Liao ,  Chen-Ming Huang

IPC: H01L21/02

CPC classification number: H01L21/02178 ,  H01L21/02181 ,  H01L21/02247 ,  H01L21/02249 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/28202 ,  H01L29/518

Abstract: A method of forming a nitrogen-containing oxide film is disclosed. The method comprises (a) exposing a substrate to a first gas pulse having one of an oxygen-containing gas and a metal-containing gas; (b) exposing the substrate to a second gas pulse having the other of the oxygen-containing gas and the metal-containing gas to form an oxide film over the substrate; and (c) exposing the oxide film to a third gas pulse having a nitrogen-containing plasma to form a nitrogen-containing oxide film, wherein the nitrogen-containing oxide film has a nitrogen concentration between about 0.1 and about 3 atomic percent (at %).

Abstract translation: 公开了一种形成含氮氧化物膜的方法。 该方法包括（a）将衬底暴露于具有含氧气体和含金属气体中的一种的第一气体脉冲; （b）将衬底暴露于具有另一个含氧气体和含金属气体的第二气体脉冲，以在衬底上形成氧化膜; 和（c）将氧化膜暴露于具有含氮等离子体的第三气体脉冲以形成含氮氧化物膜，其中所述含氮氧化物膜的氮浓度为约0.1至约3原子百分比（原子％ ）。

公开(公告)号：US20250006777A1

公开(公告)日：2025-01-02

申请号：US18470180

申请日：2023-09-19

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Heng Chen ,  Chi-Yuan Shih ,  Hsin-Li Cheng ,  Shih-Fen Huang ,  Tuo-Hsin Chien ,  Yu-Chi Chang

IPC: H01C17/075 ,  H01C7/00 ,  H01L23/522

Abstract: Resistors and method of forming the same are provided. A device structure according to the present disclosure includes a substrate, a first intermetal dielectric (IMD) layer over the substrate, a resistor that includes a first resistor layer over the first IMD layer, a second resistor layer over the first resistor layer, and a third resistor layer over the second resistor layer, a second IMD layer over the first IMD layer and the resistor, a first contact via extending through the second IMD layer and the third resistor layer and terminating in the first resistor layer, and a second contact via extending through the second IMD layer and the third resistor layer and terminating in the first resistor layer.

公开(公告)号：US20240371917A1

公开(公告)日：2024-11-07

申请号：US18312726

申请日：2023-05-05

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Heng Chen ,  Hsi-Jung Wu ,  Jiun-Jie Huang ,  Ru-Shang Hsiao ,  Yu-Wei Liang ,  Yu-Chun Chang

IPC: H01L29/00 ,  H01C7/00

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a resistor structure overlying a semiconductor substrate. A dielectric structure overlies the semiconductor substrate. The resistor structure is disposed within the dielectric structure. The resistor structure includes a thin film resistor (TFR) layer and a first capping structure disposed on the TFR layer. A first cavity is disposed within the dielectric structure and abuts a first sidewall of the first capping structure.

公开(公告)号：US11942556B2

公开(公告)日：2024-03-26

申请号：US17225306

申请日：2021-04-08

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Yu-Ru Lin ,  Shu-Han Chen ,  Yi-Shao Li ,  Chun-Heng Chen ,  Chi On Chui

IPC: H01L29/06 ,  H01L21/02 ,  H01L21/3065 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L29/78696 ,  H01L21/0259 ,  H01L21/3065 ,  H01L29/0665 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66636 ,  H01L29/66742 ,  H01L29/78618

Abstract: A device includes a first channel layer, a second channel layer, a gate structure, a source/drain epitaxial structure, and a source/drain contact. The first channel layer and the second channel layer are arranged above the first channel layer in a spaced apart manner over a substrate. The gate structure surrounds the first and second channel layers. The source/drain epitaxial structure is connected to the first and second channel layers. The source/drain contact is connected to the source/drain epitaxial structure. The second channel layer is closer to the source/drain contact than the first channel layer is to the source/drain contact, and the first channel layer is thicker than the second channel layer.