公开(公告)号：US20150179531A1

公开(公告)日：2015-06-25

申请号：US14136449

申请日：2013-12-20

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chung-Hsi Wu ,  Han-Wen Liao ,  Chih-Yu Lin ,  Cherng-Chang Tsuei

IPC分类号： H01L21/66 ,  H01L21/3213 ,  H01L21/683 ,  H01L21/02

CPC分类号： H01L22/12 ,  H01L21/02019 ,  H01L21/3065 ,  H01L21/31144 ,  H01L21/3213 ,  H01L21/32137 ,  H01L21/32139 ,  H01L21/6831 ,  H01L22/20

摘要： A method for patterning a wafer includes performing a first patterning on a wafer, and after performing the first patterning, calculating a simulated dose mapper (DoMa) map predicting a change in critical dimensions of the wafer due to performing a second patterning on the wafer. The method further includes performing the second patterning on the wafer. Performing the second patterning includes adjusting one or more etching parameters of the second patterning in accordance with differences between the simulated DoMa map and desired critical dimensions of the wafer.

摘要翻译： 用于图案化晶片的方法包括在晶片上执行第一图案化，并且在执行第一图案化之后，计算由于在晶片上执行第二图案化而预测晶片的临界尺寸的变化的模拟剂量映射器（DoMa）映射。 该方法还包括在晶片上执行第二图案化。 执行第二图案化包括根据模拟DoMa图与晶片的期望临界尺寸之间的差异来调整第二图案化的一个或多个蚀刻参数。

公开(公告)号：US20180174883A1

公开(公告)日：2018-06-21

申请号：US15380941

申请日：2016-12-15

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Han-Wen Liao

IPC分类号： H01L21/687 ,  H01L21/67 ,  H01J37/32 ,  C23C16/50

CPC分类号： H01J37/32532 ,  C23C16/50 ,  H01J37/32009 ,  H01J2237/334 ,  H01L21/02274 ,  H01L21/0262 ,  H01L21/28556 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136 ,  H01L21/67069 ,  H01L21/68714

摘要： A system is configured to perform plasma related fabrication processes. The system includes a process chamber and a wafer stage positioned within the process chamber. The wafer stage is configured to secure a process wafer. The system further includes a bottom electrode positioned beneath the wafer stage, a top electrode positioned external to the chamber, and a plasma distribution mechanism. The plasma distribution mechanism is reconfigurable to allow for more than one plasma distribution profile.

公开(公告)号：US20150279750A1

公开(公告)日：2015-10-01

申请号：US14735657

申请日：2015-06-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chung-Hsi Wu ,  Han-Wen Liao ,  Chih-Yu Lin ,  Cherng-Chang Tsuei

IPC分类号： H01L21/66 ,  H01L21/3065 ,  H01L21/683

CPC分类号： H01L22/12 ,  H01L21/02019 ,  H01L21/3065 ,  H01L21/31144 ,  H01L21/3213 ,  H01L21/32137 ,  H01L21/32139 ,  H01L21/6831 ,  H01L22/20

摘要： A method for patterning a wafer includes performing a first patterning on a wafer, and after performing the first patterning, calculating a simulated dose mapper (DoMa) map predicting a change in critical dimensions of the wafer due to performing a second patterning on the wafer. The method further includes performing the second patterning on the wafer. Performing the second patterning includes adjusting one or more etching parameters of the second patterning in accordance with differences between the simulated DoMa map and desired critical dimensions of the wafer.

公开(公告)号：US09362185B2

公开(公告)日：2016-06-07

申请号：US14735657

申请日：2015-06-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chung-Hsi Wu ,  Han-Wen Liao ,  Chih-Yu Lin ,  Cherng-Chang Tsuei

IPC分类号： H01L21/66 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/683 ,  H01L21/3065

CPC分类号： H01L22/12 ,  H01L21/02019 ,  H01L21/3065 ,  H01L21/31144 ,  H01L21/3213 ,  H01L21/32137 ,  H01L21/32139 ,  H01L21/6831 ,  H01L22/20

摘要： A method for patterning a wafer includes performing a first patterning on a wafer, and after performing the first patterning, calculating a simulated dose mapper (DoMa) map predicting a change in critical dimensions of the wafer due to performing a second patterning on the wafer. The method further includes performing the second patterning on the wafer. Performing the second patterning includes adjusting one or more etching parameters of the second patterning in accordance with differences between the simulated DoMa map and desired critical dimensions of the wafer.

公开(公告)号：US09064741B1

公开(公告)日：2015-06-23

申请号：US14136449

申请日：2013-12-20

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chung-Hsi Wu ,  Han-Wen Liao ,  Chih-Yu Lin ,  Cherng-Chang Tsuei

IPC分类号： H01L21/00 ,  G01R31/26 ,  H01L21/66 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/683

CPC分类号： H01L22/12 ,  H01L21/02019 ,  H01L21/3065 ,  H01L21/31144 ,  H01L21/3213 ,  H01L21/32137 ,  H01L21/32139 ,  H01L21/6831 ,  H01L22/20

摘要： A method for patterning a wafer includes performing a first patterning on a wafer, and after performing the first patterning, calculating a simulated dose mapper (DoMa) map predicting a change in critical dimensions of the wafer due to performing a second patterning on the wafer. The method further includes performing the second patterning on the wafer. Performing the second patterning includes adjusting one or more etching parameters of the second patterning in accordance with differences between the simulated DoMa map and desired critical dimensions of the wafer.

摘要翻译： 用于图案化晶片的方法包括在晶片上执行第一图案化，并且在执行第一图案化之后，计算由于在晶片上执行第二图案化而预测晶片的临界尺寸的变化的模拟剂量映射器（DoMa）映射。 该方法还包括在晶片上执行第二图案化。 执行第二图案化包括根据模拟DoMa图与晶片的期望临界尺寸之间的差异来调整第二图案化的一个或多个蚀刻参数。