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公开(公告)号：US11709153B2
公开(公告)日：2023-07-25
申请号：US17102255
申请日：2020-11-23
Inventor： Jun-Hao Deng , Kuan-Wen Lin , Sheng-Chi Chin , Yu-Ching Lee
IPC: G01N29/44 , B08B13/00 , G01B17/00 , G01B21/16 , B08B3/04 , B08B5/02 , H01L21/02 , H01L21/288 , H01L21/67 , H01L21/66 , G01B17/02
CPC classification number: G01N29/44 , B08B3/04 , B08B5/02 , B08B13/00 , G01B17/00 , G01B17/02 , G01B17/025 , G01B21/16 , H01L21/02041 , H01L21/02282 , H01L21/02623 , H01L21/288 , H01L21/67253 , H01L22/10 , G01N2291/044
Abstract: Methods and systems disclosed herein use acoustic energy to determine a gap between a wafer and an integrated circuit (IC) processing system and/or determine a thickness of a material layer of the wafer during IC processing implemented by the IC processing system. An exemplary method includes emitting acoustic energy through a substrate and a material layer disposed thereover. The substrate is positioned within an IC processing system. The method further includes receiving reflected acoustic energy from a surface of the substrate and a surface of the material layer disposed thereover and converting the reflected acoustic energy into electrical signals. The electrical signals indicate a thickness of the material layer.
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公开(公告)号：US20170138911A1
公开(公告)日：2017-05-18
申请号：US14942402
申请日：2015-11-16
Inventor： Jun-Hao Deng , Kuan-Wen Lin , Sheng-Chi Chin , Yu-Ching Lee
Abstract: A system and method for determining clearance between a fabrication tool and a workpiece is provided. In an exemplary embodiment, the method includes receiving a substrate within a tool such that a gap is defined there between. A transducer disposed on a bottom surface of the substrate opposite the gap provides an acoustic signal that is conducted through the substrate. The transducer also receives a first echo from a top surface of the substrate that defines the gap and a second echo from a bottom surface of the tool that further defines the gap. A width of the gap is measured based on the first echo and the second echo. In some embodiments, the bottom surface of the tool is a bottom surface of a nozzle, and the nozzle provides a liquid or a gas in the gap while the transducer is receiving the first and second echoes.
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3.发明申请PELLICLE AGING ESTIMATION AND PARTICLE REMOVAL FROM PELLICLE VIA ACOUSTIC WAVES 有权通过声音波形从胶囊中分离出的细胞衰老估计和颗粒公开(公告)号：US20160274471A1
公开(公告)日：2016-09-22
申请号：US14658399
申请日：2015-03-16
Inventor： Yu-Ching Lee , Ching-Fang Yu , Chun-Hung Lin , Sheng-Chi Chin , Ting-Hao Hsu , Mark Chang
IPC: G03F7/20
Abstract: A pellicle is disposed over a lithography mask. An acoustic wave generator is placed over the pellicle. The acoustic wave generator is configured to generate acoustic waves to cause the pellicle to vibrate at a target resonance frequency. A resonance detection tool is configured to detect an actual resonance frequency of the pellicle in response to the acoustic waves. One or more electronic processors are configured to estimate an age condition of the pellicle as a function of a shift of the actual resonance frequency from the target resonance frequency.
Abstract translation: 防护薄膜组件设置在光刻掩模上。 声波发生器放置在防护薄膜上。 声波发生器被配置为产生声波以使防护薄膜以目标谐振频率振动。 谐振检测工具被配置为响应于声波来检测防护薄膜的实际谐振频率。 一个或多个电子处理器被配置为根据实际谐振频率与目标共振频率的偏移来估计防护薄膜的年龄条件。
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公开(公告)号：US20230366857A1
公开(公告)日：2023-11-16
申请号：US18354786
申请日：2023-07-19
Inventor： Jun-Hao Deng , Kuan-Wen Lin , Sheng-Chi Chin , Yu-Ching Lee
IPC: G01N29/44 , H01L21/288 , H01L21/02 , G01B21/16 , G01B17/00 , B08B3/04 , G01B17/02 , H01L21/66 , B08B13/00 , B08B5/02 , H01L21/67
CPC classification number: G01N29/44 , H01L21/288 , H01L21/02623 , G01B21/16 , G01B17/00 , B08B3/04 , H01L21/02041 , G01B17/025 , H01L21/02282 , H01L22/10 , B08B13/00 , B08B5/02 , G01B17/02 , H01L21/67253 , G01N2291/044
Abstract: Methods and systems disclosed herein use acoustic energy to determine a gap between a wafer and an integrated circuit (IC) processing system and/or determine a thickness of a material layer of the wafer during IC processing implemented by the IC processing system. An exemplary method includes emitting acoustic energy through a substrate and a material layer disposed thereover. The substrate is positioned within an IC processing system. The method further includes receiving reflected acoustic energy from a surface of the substrate and a surface of the material layer disposed thereover and converting the reflected acoustic energy into electrical signals. The electrical signals indicate a thickness of the material layer.
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公开(公告)号：US20200075373A1
公开(公告)日：2020-03-05
申请号：US16675473
申请日：2019-11-06
Inventor： Yu-Ching Lee , Yu-Piao Fang
IPC: H01L21/673 , H01L21/677 , G03F1/66
Abstract: An apparatus configured to load or unload a mask pod includes a first load port supporter and a second load port supporter spaced apart from the first load port supporter. Each of the first load port supporter and the second load port supporter includes at least portions of an L-shaped rectangular prism. The first load port supporter and the second load port supporter are disposed diagonally around a rectangular area, where first inner sidewalls of the first load port supporter and second inner sidewalls of the second load port supporter delimit boundaries of the rectangular area, and where a first width of the rectangular area is equal to a second width of the mask pod, and a first length of the rectangular area is equal to a second length of the mask pod.
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Patent Agency Ranking
公开(公告)号：US20190072849A1
公开(公告)日：2019-03-07
申请号：US16181637
申请日：2018-11-06
Inventor： Yu-Ching Lee , Ching-Fang Yu , Chun-Hung Lin , Ting-Hao Hsu , Ching-Hsiang Chang , Sheng-Chi Chin
CPC classification number: G03F1/64 , G03F7/2004
Abstract: Pellicle-mask systems for advanced lithography, such as extreme ultraviolet lithography, are disclosed herein. An exemplary pellicle-mask system includes a mask having an integrated circuit (IC) pattern, a pellicle membrane, and a pellicle frame. The pellicle frame has a first surface attached to the pellicle membrane and a second surface opposite the first surface attached to the mask, such that the IC pattern of the mask is positioned within an enclosed space defined by the mask, the pellicle membrane, and the pellicle frame. A void is defined between the pellicle frame and the mask, where the void is defined by a portion of the second surface of the pellicle membrane not attached to the mask. The void is not in communication with the enclosed space and is not in communication with an exterior space of the pellicle-mask system.
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公开(公告)号：US20190033732A1
公开(公告)日：2019-01-31
申请号：US15665125
申请日：2017-07-31
Inventor： Yu-Ching Lee , Yu-Piao Fang
IPC: G03F7/20
Abstract: An apparatus configured to load or unload a mask pod includes a first load port supporter and a second load port supporter spaced apart from the first load port supporter. Each of the first load port supporter and the second load port supporter includes at least portions of an L-shaped rectangular prism. The first load port supporter and the second load port supporter are disposed diagonally around a rectangular area, where first inner sidewalls of the first load port supporter and second inner sidewalls of the second load port supporter delimit boundaries of the rectangular area, and where a first width of the rectangular area is equal to a second width of the mask pod, and a first length of the rectangular area is equal to a second length of the mask pod.
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公开(公告)号：US10126644B2
公开(公告)日：2018-11-13
申请号：US15019478
申请日：2016-02-09
Inventor： Yu-Ching Lee , Ching-Fang Yu , Chun-Hung Lin , Ting-Hao Hsu , Ching-Hsiang Chang , Sheng-Chi Chin
Abstract: The present disclosure provides an apparatus for a semiconductor lithography process in accordance with some embodiments. The apparatus includes a pellicle membrane, a pellicle frame attached to the pellicle membrane. The pellicle frame has a surface that defines at least one groove. The apparatus further includes a substrate that is in contact with the surface of the pellicle frame such that the grove is positioned between the pellicle frame and the substrate.
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公开(公告)号：US11768443B2
公开(公告)日：2023-09-26
申请号：US17846294
申请日：2022-06-22
Inventor： Yu-Ching Lee , Yu-Piao Fang
CPC classification number: G03F7/70633 , G03F7/2022 , G03F7/70466 , G03F7/70625 , G03F7/70641 , G03F7/70683 , G03F9/7076 , B82Y20/00
Abstract: Methods for manufacturing a semiconductor structure are provided. A substrate is provided. A metrology target is formed in a layer over the substrate according to a first layer mask and a second layer mask. The metrology target includes a first pattern formed by a plurality of first photonic crystals corresponding to the first layer mask and a second pattern formed by a plurality of second photonic crystals corresponding to the second layer mask. First light is provided to illuminate the metrology target. Second light is received from the metrology target in response to the first light. The second light is analyzed to detect overlay-shift between the first pattern and the second pattern. The first pattern and the second pattern are arranged to cross in one direction in the metrology target.
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公开(公告)号：US11378892B2
公开(公告)日：2022-07-05
申请号：US17329772
申请日：2021-05-25
Inventor： Yu-Ching Lee , Yu-Piao Fang
Abstract: Overlay-shift measurement systems are provided. An overlay-shift measurement system includes an optical device, a first light detection device and a processor. The optical device is configured to provide an input light to a metrology target of a semiconductor structure. The first light detection device is configured to receive a transmitted light from the metrology target when the input light penetrates the metrology target. The processor is configured to determine whether overlay-shift between a plurality of first photonic crystals and a plurality of second photonic crystals in the metrology target is present according to characteristics of the transmitted light.
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