摘要:
In a CCD solid-state image pick-up device according to the present invention, a solid-state image pick-up circuit formed by a sensor part, a horizontal transfer register part and a floating diffusion amplifier converts a photo signal into a voltage signal and outputs the voltage signal, and a voltage-current conversion circuit converts the voltage signal output from the solid-state image pick-up circuit into a current signal. A current-driven black signal component detect/remove circuit then removes a black signal component from the current signal output from the CCD solid-state image pick-up device, and an image signal component alone is output as a current image signal. A current-voltage conversion circuit converts the current image signal into a voltage image signal.
摘要:
A pipeline A/D converter of the present invention includes a plurality of stages each operating for A/D conversion and a digital computing portion that outputs an A/D converted signal based on a digital signal output from each of the stages. In each of the stages, an analog signal from the preceding stage is sampled by passive elements C1 and C2 in a first period, and one of the passive elements is used as a feedback element in a second period to perform adding/subtracting with respect to the signal sampled by the other passive element. By the control from the digital computing portion, a test signal Tink is used instead of an analog output signal Vo(k−1), and a unique conversion-error value is detected and corrected based on the digital signal obtained by the operation of each of the stages. It is possible to obtain a high-resolution A/D convert that can suppress a conversion error caused by the relative error of capacitors used for analog signal processing without decreasing the speed of A/D conversion.
摘要:
A pipeline A/D converter of the present invention includes a plurality of stages each operating for A/D conversion and a digital computing portion that outputs an A/D converted signal based on a digital signal output from each of the stages. In each of the stages, an analog signal from the preceding stage is sampled by passive elements C1 and C2 in a first period, and one of the passive elements is used as a feedback element in a second period to perform adding/subtracting with respect to the signal sampled by the other passive element. By the control from the digital computing portion, a test signal Tink is used instead of an analog output signal Vo(k−1), and a unique conversion-error value is detected and corrected based on the digital signal obtained by the operation of each of the stages. It is possible to obtain a high-resolution A/D convert that can suppress a conversion error caused by the relative error of capacitors used for analog signal processing without decreasing the speed of A/D conversion.
摘要:
(a) The luminance levels of the optical black part pixels included in the output signal of an image sensor are detected and digitized, (b) the digitized luminance levels of the optical black part pixels are averaged, (c) the number of pixels on which averaging is performed is counted, (d) a control signal is generated when the count value of the number of pixels reaches a predetermined value, (e) the black level of the output signal of the image sensor is determined from the averaged luminance level in response to the control signal, and (f) the luminance levels of the effective part pixels included in the output signal of the image sensor whose black level is determined are detected and digitized.
摘要:
A front-end signal processing circuit that stabilizes a black level of an output signal of an image sensor in a prescribed set level, without being influenced by a DC offset component of circuit elements making up a feedback loop, and an imaging device including such the front-end signal processing circuit, are provided.The front-end signal processing circuit includes a feedback loop made up of a luminance detecting/digitizing section and a black level clamp section, and clamps a black level of an output signal of an image sensor to a prescribed set level. The front-end signal processing circuit further includes an offset correction section. The offset correction section stores an offset value being a difference between a signal level of an OB region of the image sensor and the prescribed level, subtracts the offset value from a digital luminance signal corresponding to an effective pixel region of the image sensor, and outputs the obtained signal.
摘要:
A front-end signal processing circuit that stabilizes a black level of an output signal of an image sensor in a prescribed set level, without being influenced by a DC offset component of circuit elements making up a feedback loop, and an imaging device including such the front-end signal processing circuit, are provided. The front-end signal processing circuit includes a feedback loop made up of a luminance detecting/digitizing section and a black level clamp section, and clamps a black level of an output signal of an image sensor to a prescribed set level. The front-end signal processing circuit further includes an offset correction section. The offset correction section stores an offset value being a difference between a signal level of an OB region of the image sensor and the prescribed level, subtracts the offset value from a digital luminance signal corresponding to an effective pixel region of the image sensor, and outputs the obtained signal.
摘要:
The present invention provides a pipeline A/D converter having resolution, allowable conversion processing rate and power consumption satisfying the requests of a system incorporating the pipeline A/D converter. The pipeline A/D converter in accordance with the present invention comprises a control section for outputting a control signal according to the operation state of an apparatus incorporating the pipeline A/D converter, and a pipeline A/D conversion section, the resolution and/or allowable conversion processing rate of which are switched by switching the capacitance in a built-in operational amplifier according to the control signal.
摘要:
The present invention provides a pipeline A/D converter having resolution, allowable conversion processing rate and power consumption satisfying the requests of a system incorporating the pipeline A/D converter. The pipeline A/D converter in accordance with the present invention comprises a control section for outputting a control signal according to the operation state of an apparatus incorporating the pipeline A/D converter, and a pipeline A/D conversion section, the resolution and/or allowable conversion processing rate of which are switched by switching the capacitance in a built-in operational amplifier according to the control signal.
摘要:
The present invention provides a pipeline A/D converter having resolution, allowable conversion processing rate and power consumption satisfying the requests of a system incorporating the pipeline A/D converter.The pipeline A/D converter in accordance with the present invention comprises a control section for outputting a control signal according to the operation state of an apparatus incorporating the pipeline A/D converter, and a pipeline A/D conversion section, the resolution and/or allowable conversion processing rate of which are switched by switching the capacitance in a built-in operational amplifier according to the control signal.
摘要:
The present invention relates to a metal catalyst containing fine metal particles, characterized in that the fine metal particles have a particle diameter of 3 nm or less and also have a proportion of metallic bond state of 40% or more, which is ascribed by subjecting to waveform separation of a binding energy peak peculiar to the metal as measured by using an X-ray photoelectron spectrometer. The fine metal particles are preferably fine platinum particles. The fine metal particles are preferably supported on the surface of carrier particles by reducing ions of metal to be deposited through the action of a reducing agent in a reaction system of a liquid phase containing the carrier particles dispersed therein, thereby to deposit the metal on the surface of carrier particles in the form of fine particles. The proportion of metallic bond state of the fine metal particles is adjusted within the above range by reducing after deposition thereby to decrease the oxidation state.