摘要:
A continuous data server apparatus incorporating a plurality of buffer memory units for storing the continuous data read out by the data memory control units and to be given to the communication control unit, at least one buffer memory unit being provided dedicatedly for each combination of one data memory control unit group formed by at least one data memory control unit and one communication control unit group formed by at least one communication control unit. The apparatus may further incorporate a plurality of calculation units connected in series, where each calculation unit is connected between corresponding one data memory control unit group and at least one buffer memory unit, and carrying out a prescribed calculation processing. The continuous data can be arranged over a plurality of data memory control units in word units, such that the data memory control units read out the continuous data in block units, the buffer memory units store the continuous data in block units, and the communication control unit transfers the continuous data obtained by reading out data the buffer memory units sequentially in word units.
摘要:
A server device and a communication connection scheme capable of expanding the memory bandwidth and thereby expanding the power to transmit Web data to the network are disclosed. Network cards are detachably attached to a host machine (main machine). Each network card contains a processor, a memory, and a network interface unit, where data are transmitted to the network from a memory on the network card and the memory bandwidth expansion is realized by the presence of a plurality of network cards. In addition, using a memory of the network card as a cache, the load on the host machine is reduced by transmitting data from this memory to the network when the data exists on the memory and a certain condition is satisfied.
摘要:
A server device is formed by a plurality of network interface processors connected to a network, each network interface processor having a network interface local memory functioning as a cache memory for storing a part of server data and a network interface local processor, at least one storage interface processor connected with a storage device for storing the server data, and a connection network for connecting the network interface processors and the storage interface processor. In this server device, the network interface local processor of one network interface processor carries out a control processing such that a requested data stored In the network interface local memory of the one network Interface processor is transmitted to the network when a request received from the network at the one network interface processor satisfies a prescribed first condition, and the request is given to the storage interface processor via the connection network when the request satisfies a prescribed second condition and the requested data is transmitted to the network upon receiving the requested data returned from the storage interface processor to the one network interface processor via the connection network in response to the request.
摘要:
The shared disk array which incorporates a plurality of disk apparatus storing the contents including the digitized video data and a plurality of element servers are connected to the shared channel network suitable for the multi-initiator architecture, whereby each of the element servers can physically share the shared disk array via the shared channel network. Further, each of the element servers is provided with the network interface suitable for the high-speed transmission and the band-width reservation, so that the contents stored in the shared disk array are read out in response to the request form the client, thus being output of the communication network via the network interface.
摘要:
According to a data display method, data having a program unit and instruction data for the program unit multiplexed on bit stream data is received. The program unit is extracted from the received data and is stored in a memory. The instruction data is extracted from the received data, and the program unit or part thereof specified by the instruction data is read from the memory and is executed. Then, the bit stream data and the execution result are displayed. This ensures smooth synchronization of reproduction of a bit stream with execution of an associated program and efficient use of resources.
摘要:
According to a data display method, data having a program unit and instruction data for the program unit multiplexed on bit stream data is received. The program unit is extracted from the received data and is stored in a memory. The instruction data is extracted from the received data, and the program unit or part thereof specified by the instruction data is read from the memory and is executed. Then, the bit stream data and the execution result are displayed. This ensures smooth synchronization of reproduction of a bit stream with execution of an associated program and efficient use of resources.
摘要:
According to a data display method, data having a program unit and instruction data for the program unit multiplexed on bit stream data is received. The program unit is extracted from the received data and is stored in a memory. The instruction data is extracted from the received data, and the program unit or part thereof specified by the instruction data is read from the memory and is executed. Then, the bit stream data and the execution result are displayed. This ensures smooth synchronization of reproduction of a bit stream with execution of an associated program and efficient use of resources.
摘要:
According to a data display method, data having a program unit and instruction data for the program unit multiplexed on bit stream data is received. The program unit is extracted from the received data and is stored in a memory. The instruction data is extracted from the received data, and the program unit or part thereof specified by the instruction data is read from the memory and is executed. Then, the bit stream data and the execution result are displayed. This ensures smooth synchronization of reproduction of a bit stream with execution of an associated program and efficient use of resources.
摘要:
A memory system comprises an encoding processing circuit 100 that performs redundant encoding process on target data Din to be written to thereby generate data RDin such that the number of bits having a predetermined value is half or less than the total number of bits, and a memory 120 to which the data RDin generated by the encoding processing circuit are written.
摘要:
According to an embodiment, a control system includes a processing device; a main storage device to store the data; a cache memory to store part of the data stored; a prefetch unit to predict data highly likely to be accessed and execute prefetch, reading out data in advance onto the cache memory; and a power supply unit. The system further includes: a detecting unit to detect whether the processing device is in an idle state; a determining unit that determines whether to stop the supply of power to the cache memory in accordance with the state of the prefetch when determined as idle state; and a power supply control unit that controls the power supply unit so as to stop the supply of power, or controls the power supply unit so as to continue the supply of power.