利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

15 条记录 (耗时 0.039 秒)

    Combination of input output circuitry and local area network systems
    1.
    发明授权
    Combination of input output circuitry and local area network systems 失效
    输入输出电路和局域网系统的组合

    公开(公告)号：US5754764A

    公开(公告)日：1998-05-19

    申请号：US200097

    申请日：1994-02-22

    申请人： Timothy D. Davis ,  Roman Baker ,  Dan E. Daugherty ,  Martin S. Michael ,  Ahmed Masood ,  Kent Bruce Waterson ,  Hon C. Fung ,  Mark Douglas Koether ,  J. Scott Johnson

    发明人： Timothy D. Davis ,  Roman Baker ,  Dan E. Daugherty ,  Martin S. Michael ,  Ahmed Masood ,  Kent Bruce Waterson ,  Hon C. Fung ,  Mark Douglas Koether ,  J. Scott Johnson

    IPC分类号： G06F13/38 ,  H04L7/10 ,  H04L12/28 ,  G06F13/00 ,  H04L12/00

    CPC分类号： G06F13/385 ,  H04L12/28 ,  H04L7/10

    摘要： Input/output and local area network functions are combined into a single integrated circuit on a single semiconductor (e.g., a single piece of silicon). Preferred system embodiments on a single integrated circuit are typically placed inside a host system (e.g., a personal computer based on Intel.RTM.'s 286, 386, 486, and Pentium microprocessors) and interrelate with standard operating systems (e.g., Microsoft.RTM.'s DOS, IBM.RTM.'s OS/2) on traditional, commonly used bus architectures (e.g., Industry Standard Architecture and Enhanced Industry Standard). Local area network circuitry and input and output circuitry are both coupled to at least one host system (and indirectly to potentially any number of host systems tied together via the local area network system) via a common data bus. The input and output circuitry couples the host system to at least one input/output channels. Examples of the types of input/output channels are a first serial interface, a second serial interface, a parallel port, a hard drive, a floppy drive, and/or any combination thereof.

    摘要翻译： 输入/输出和局域网功能在单个半导体（例如单个硅片）上组合成单个集成电路。 单个集成电路上的优选系统实施例通常放置在主机系统（例如，基于Intel TM 286,386,468和Pentium微处理器的个人计算机）内，并与标准操作系统（例如，Microsoft TM DOS，IBM TM的OS / 2）在传统的常用总线架构（例如，行业标准架构和增强行业标准）上。 局域网电路和输入和输出电路都经由公共数据总线耦合到至少一个主机系统（并且间接地连接到潜在的任何数量的通过局域网系统连接在一起的主机系统）。 输入和输出电路将主机系统耦合到至少一个输入/输出通道。 输入/输出通道的类型的示例是第一串行接口，第二串行接口，并行端口，硬盘驱动器，软盘驱动器和/或其任何组合。

    Method and system for cache power reduction
    3.
    发明授权
    Method and system for cache power reduction 有权
    缓存功率降低的方法和系统

    公开(公告)号：US07177981B2

    公开(公告)日：2007-02-13

    申请号：US10434617

    申请日：2003-05-09

    申请人： Timothy D. Davis

    发明人： Timothy D. Davis

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0846 ,  G06F12/0864 ,  G06F2212/1028 ,  Y02D10/13

    摘要： A method and system is disclosed for minimizing data array accesses during a read operation in a cache memory. The cache memory has one or more tag arrays and one or more data arrays. After accessing each tag array, a selected data array is identified, and subsequently activated. At least one predetermined data entry from the activated data array is accessed, wherein all other data arrays are deactivated during the read operation. In another example, the cache memory is divided into multiple sub-groups so that only a particular sub-group is involved in a memory read operation. By deactivating any many circuits as possible throughout the read operation, the power consumption of the cache memory is greatly reduced.

    摘要翻译： 公开了一种用于在高速缓冲存储器中的读取操作期间最小化数据阵列访问的方法和系统。 缓存存储器具有一个或多个标签数组和一个或多个数据数组。 在访问每个标签阵列后，识别所选择的数据阵列，并随后激活。 访问来自激活的数据阵列的至少一个预定数据条目，其中所有其他数据阵列在读取操作期间被去激活。 在另一示例中，高速缓存存储器被划分成多个子组，使得只有特定的子组涉及存储器读取操作。 通过在整个读取操作中尽可能地去激活任何许多电路，高速缓冲存储器的功耗大大降低。

    Signal bus line driver circuit
    4.
    发明授权
    Signal bus line driver circuit 失效
    信号总线驱动电路

    公开(公告)号：US5247207A

    公开(公告)日：1993-09-21

    申请号：US869214

    申请日：1992-04-13

    申请人： Joseph D. Wert ,  Timothy D. Davis

    发明人： Joseph D. Wert ,  Timothy D. Davis

    IPC分类号： H03K17/14 ,  H03K17/567

    CPC分类号： H03K17/567 ,  H03K17/14

    摘要： A signal line driver circuit having an input signal buffer and an open collector output circuit configuration and a method are provided for receiving an input signal and causing the output to pull down the voltage potential of a signal bus line while sinking an output current therefrom at a substantially constant output voltage with a substantially constant input-to-output signal propagation delay variation over variations in operating temperatures. A portion of the output current which is to be sunk from the signal bus line is advantageously used as the current supply for the input signal buffer circuitry. The input signal buffer circuitry uses metal oxide semiconductor field effect transistors in parallel with a bipolar junction transistor to take advantage of their mutually inverse conductivity vs. temperature characteristics, thereby ensuring that the output current sinking capability, output voltage range and input-to-output signal propagation delay variation remain substantially constant over a wide operating temperature range.

    摘要翻译： 具有输入信号缓冲器和集电极开路输出电路配置和方法的信号线驱动器电路被提供用于接收输入信号，并且使得输出在信号总线的电压电位下降，同时从其输出电流 基本上恒定的输出电压，具有基本上恒定的输入到输出信号传播延迟变化​​与工作温度变化的关系。 有利地，将要从信号总线吸入的输出电流的一部分用作输入信号缓冲电路的电流源。 输入信号缓冲电路使用与双极结型晶体管并联的金属氧化物半导体场效应晶体管，以利用它们相互反向的电导率对温度特性，从而确保输出电流吸收能力，输出电压范围和输入到输出 信号传播延迟变化​​在宽的工作温度范围内保持基本恒定。

    Process station fire suppression system
    7.
    发明授权
    Process station fire suppression system 失效
    过程站灭火系统

    公开(公告)号：US6079502A

    公开(公告)日：2000-06-27

    申请号：US187240

    申请日：1998-11-06

    申请人： Timothy D. Davis ,  Paul A. Grenewald ,  Terry L. Schock

    发明人： Timothy D. Davis ,  Paul A. Grenewald ,  Terry L. Schock

    IPC分类号： A62C37/40 ,  A62C37/10

    CPC分类号： A62C37/40

    摘要： A fire suppression system for a process station, or chemical wet bench, employs an electro-optical fire detector and system controller to detect a fire in the process station. The system controller is coupled to a solenoid valve that is opened when a fire is detected by the fire detector, causing the fire suppressant to be delivered to a nozzle positioned in the process station. The nozzle atomizes the fire suppressant flowing through the nozzle so as to substantially cover the interior space of the process station with fire suppressant. The fire suppressant may be water provided by a local sprinkler system, and the nozzle is configured to atomize the fire suppressant when the fire suppressant is delivered to the nozzle under relatively low pressure.

    摘要翻译： 用于处理站或化学湿式工作台的灭火系统采用电光火灾探测器和系统控制器来检测过程站中的火灾。 系统控制器耦合到电磁阀，该电磁阀在火灾检测器检测到火灾时被打开，从而使灭火剂被输送到位于处理站中的喷嘴。 喷嘴使流过喷嘴的灭火剂雾化，从而基本上用灭火剂覆盖处理站的内部空间。 防火剂可以是由本地喷洒系统提供的水，并且当防火剂在相对低的压力下被输送到喷嘴时，喷嘴构造成使灭火剂雾化。

    MEMBRANE DISTILLATION SYSTEM AND METHOD
    8.
    发明申请
    MEMBRANE DISTILLATION SYSTEM AND METHOD 审中-公开
    膜分离系统和方法

    公开(公告)号：US20110180383A1

    公开(公告)日：2011-07-28

    申请号：US12694757

    申请日：2010-01-27

    申请人： Zidu Ma ,  Timothy D. Davis ,  James R. Irish ,  Gary D. Winch

    发明人： Zidu Ma ,  Timothy D. Davis ,  James R. Irish ,  Gary D. Winch

    IPC分类号： B01D61/36 ,  B01D3/00 ,  C02F1/04

    CPC分类号： B01D61/364 ,  B01D63/02 ,  B01D2313/38 ,  F28D21/0015 ,  Y02W10/37

    摘要： A membrane distillation system includes a distillation vessel, an array of hollow fiber membranes pervious to distillate vapor but impervious to feed solution and an array of hollow tubes impervious to distillate vapor and feed solution but which allow thermal energy transmission. The system further includes a pump, a heat exchanger for heating the feed solution before it enters the hollow fiber membranes, and an outlet for removing distillate from the distillation vessel. A method for removing distillate from a feed solution includes delivering the feed solution through hollow tubes spanning a distillation vessel, heating the feed solution, delivering the feed solution through hollow fiber membranes spanning the distillation vessel to create a vapor pressure differential between the hollow fiber membranes and a distillation volume within the distillation vessel, and removing distillate from the distillation vessel.

    摘要翻译： 膜蒸馏系统包括蒸馏容器，可透过蒸馏物蒸气但不能进料溶液的中空纤维膜阵列，以及不透水蒸馏和进料溶液但允许热能传递的中空管阵列。 该系统还包括泵，用于在进料溶液进入中空纤维膜之前加热进料溶液的热交换器，以及用于从蒸馏容器除去馏出物的出口。 从进料溶液中除去馏出物的方法包括将进料溶液通过跨越蒸馏容器的中空管输送，加热进料溶液，通过跨越蒸馏容器的中空纤维膜输送进料溶液以在中空纤维膜之间产生蒸气压差 和蒸馏容器内的蒸馏体积，并从蒸馏容器中除去馏出物。

    Method of forming a variable sized and shaped pizza box and apparatus thereof
    10.
    发明授权
    Method of forming a variable sized and shaped pizza box and apparatus thereof 失效
    形成可变尺寸和形状的比萨饼盒的方法及其装置

    公开(公告)号：US06440050B1

    公开(公告)日：2002-08-27

    申请号：US09663984

    申请日：2000-09-19

    申请人： Patsy R. Capparelli ,  Timothy D. Davis

    发明人： Patsy R. Capparelli ,  Timothy D. Davis

    IPC分类号： B65D554

    CPC分类号： B65D5/54 ,  B65D5/0005 ,  B65D5/2028 ,  B65D5/4295 ,  B65D5/667 ,  B65D2585/366

    摘要： A generally rectangular blank of preferably cardboard material having a multitude of strategically positioned cut lines, fold lines, and perforated tear lines. The present invention can be formed into at least two differently shaped and sized boxes; thus, efficiently accommodating a whole pizza in its original rectangular shape, and efficiently accommodating a slice or other portion of pizza in its reduced-size, triangular shape. In addition to the typical cut and fold lines found in a common pizza box, the present invention provides, generally, eight sets of perforated tear lines strategically positioned such that a rectangularly-shaped pizza box may be torn along the perforated tear lines to form a generally triangularly-shaped, smaller dimensioned pizza box.

    摘要翻译： 优选纸板材料的大致矩形坯料具有多个策略性定位的切割线，折叠线和穿孔撕裂线。 本发明可以形成为至少两个不同形状和尺寸的盒子; 从而有效地容纳整个比萨饼在其原始矩形形状中，并且有效地容纳缩小尺寸的三角形形状的薄片或其他部分的比萨饼。 除了在普通披萨盒中发现的典型的切割和折叠线之外，本发明通常提供八组穿孔撕裂线，其策略性地定位成使得矩形形状的比萨盒可以沿着穿孔的撕裂线撕开以形成 一般三角形，较小尺寸的比萨盒。