公开(公告)号：US20200381264A1

公开(公告)日：2020-12-03

申请号：US16770084

申请日：2018-12-11

Applicant: TOKYO ELECTRON LIMITED ,  UNIVERSITE D'ORLEANS

Inventor： Koichi YATSUDA ,  Kaoru MAEKAWA ,  Nagisa SATO ,  Kumiko ONO ,  Shigeru TAHARA ,  Jacques FAGUET ,  Remi DUSSART ,  Thomas TILLOCHER ,  Philippe LEFAUCHEUX ,  Gaëlle ANTOUN

IPC: H01L21/311

Abstract: A plasma etching method includes a physisorption step for causing an adsorbate that is based on first processing gas to be physisorbed onto a film to be etched, while cooling an object to be processed on which the film to be etched is provided; and an etching step for etching the film to be etched by causing the adsorbate to react with the film to be etched, using the plasma of second processing gas.

公开(公告)号：US20150194441A1

公开(公告)日：2015-07-09

申请号：US14592281

申请日：2015-01-08

Applicant: TOKYO ELECTRON LIMITED

Inventor： Koichi YATSUDA ,  Takaaki TSUNOMURA ,  Takashi HAYAKAWA ,  Hiromasa MOCHIKI ,  Kazuhide HASEBE

IPC: H01L27/115 ,  H01L21/28

CPC classification number: H01L27/11582 ,  H01L27/1157 ,  H01L27/11575

Abstract: Disclosed is method of manufacturing a semiconductor device. The method includes: forming an insulating film on one side of a substrate; forming a carbon film on the insulating film formed in the forming of the insulating film; forming an insulating film-carbon film laminate including a plurality of insulating films and carbon films alternately laminated on the one side of the substrate, by repeating the forming of the insulating film and the forming of the carbon film multiple times; removing the carbon films included in the insulating film-carbon film laminate; and forming electrode films in regions from which the carbon films are removed in the removing of the carbon films to obtain an insulating film-electrode film laminate in which the insulating films and the electrode films are laminated in a plurality of layers.

Abstract translation: 公开了制造半导体器件的方法。 该方法包括：在基板的一侧上形成绝缘膜; 在形成绝缘膜的绝缘膜上形成碳膜; 通过重复绝缘膜的形成和碳膜的形成多次，形成包含交替层压在基板的一侧上的多个绝缘膜和碳膜的绝缘膜 - 碳膜层压体; 除去包含在绝缘膜 - 碳膜层压体中的碳膜; 以及在去除碳膜时从其中除去碳膜的区域中形成电极膜，以获得绝缘膜 - 电极膜层压体，其中绝缘膜和电极膜以多层层叠。

公开(公告)号：US20200035553A1

公开(公告)日：2020-01-30

申请号：US16491678

申请日：2018-02-27

Applicant: Tokyo Electron Limited

Inventor： Koichi YATSUDA ,  Takashi HAYAKAWA ,  Mitsuaki IWASHITA ,  Takashi TANAKA

IPC: H01L21/768 ,  H01L27/11556 ,  H01L27/11582 ,  H01L23/522 ,  H01L23/528

Abstract: A method includes a step of performing a selective catalyst treatment by supplying a catalyst solution to an upper surface of an exposed interconnection layer forming a step portion of a stepped shape formed by pair layers stacked to form the stepped shape, the pair layer including an interconnection layer formed on an insulating layer, and a step of selectively growing a metal layer by performing electroless plating on the upper surface of the interconnection layer on which the catalyst treatment is performed.

公开(公告)号：US20190109205A1

公开(公告)日：2019-04-11

申请号：US16087574

申请日：2016-06-27

Applicant: TOKYO ELECTRON LIMITED

Inventor： Koichi YATSUDA

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/51 ,  H01L21/768 ,  H01L21/308 ,  H01L21/28

Abstract: A method for manufacturing a semiconductor device includes: a first insulating film forming step of forming a first insulating film in a transistor having a structure in which a source and a drain raised in a fin shape are covered with a gate; a sacrifice film forming step of forming a sacrifice film; a hard mask pattern forming step of forming a hard mask film having a desired pattern; a first opening forming step of forming a first opening; a second insulating film forming step of forming a second insulating film made of a material different from the first insulating film, in the first opening; a second opening forming step of forming a second opening by removing the sacrifice film, after the second insulating film forming step; and a contact plug forming step of forming a contact plug in the second opening.

公开(公告)号：US20210118727A1

公开(公告)日：2021-04-22

申请号：US17137945

申请日：2020-12-30

Applicant: TOKYO ELECTRON LIMITED

Inventor： Koichi YATSUDA ,  Tatsuya YAMAGUCHI ,  Yannick FEURPRIER ,  Frederic LAZZARINO ,  Jean-Francois de MARNEFFE ,  Khashayar BABAEI GAVAN

IPC: H01L21/768 ,  H01L21/311 ,  H01L21/3105

Abstract: A semiconductor device manufacturing method of forming a trench and a via in a porous low dielectric constant film formed on a substrate as an interlayer insulating film, includes: embedding a polymer having a urea bond in pores of the porous low dielectric constant film by supplying a raw material for polymerization to the porous low dielectric constant film; forming the via by etching the porous low dielectric constant film; subsequently, embedding a protective filling material made of an organic substance in the via; subsequently, forming the trench by etching the porous low dielectric constant film; subsequently, removing the protective filling material; and after the forming a trench, removing the polymer from the pores of the porous low dielectric constant film by heating the substrate to depolymerize the polymer, wherein the embedding a polymer having a urea bond in pores is performed before the forming a trench.

公开(公告)号：US20210020758A1

公开(公告)日：2021-01-21

申请号：US17065107

申请日：2020-10-07

Applicant: TOKYO ELECTRON LIMITED

Inventor： Koichi YATSUDA

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/28 ,  H01L21/308 ,  H01L21/768 ,  H01L29/51

Abstract: A method for manufacturing a semiconductor device includes: a first insulating film forming step of forming a first insulating film in a transistor having a structure in which a source and a drain raised in a fin shape are covered with a gate; a sacrifice film forming step of forming a sacrifice film; a hard mask pattern forming step of forming a hard mask film having a desired pattern; a first opening forming step of forming a first opening; a second insulating film forming step of forming a second insulating film made of a material different from the first insulating film, in the first opening; a second opening forming step of forming a second opening by removing the sacrifice film, after the second insulating film forming step; and a contact plug forming step of forming a contact plug in the second opening.

公开(公告)号：US20200152475A1

公开(公告)日：2020-05-14

申请号：US16745720

申请日：2020-01-17

Applicant: TOKYO ELECTRON LIMITED

Inventor： Koichi YATSUDA ,  Takashi HAYAKAWA ,  Hiroshi OKUNO ,  Reiji NIINO ,  Hiroyuki HASHIMOTO ,  Tatsuya YAMAGUCHI

IPC: H01L21/311 ,  H01L21/67 ,  H01L21/768

Abstract: There is provided a method of fabricating a semiconductor device by performing a process on a substrate, which includes: forming a masking film made of a polymer having a urea bond by supplying polymerizing raw materials to a surface of the substrate on which an etching target film formed; forming an etching pattern on the masking film; subsequently, etching the etching target film with a processing gas using the etching pattern; and subsequently, removing the masking film by heating the substrate to depolymerize the polymer.

公开(公告)号：US20190181039A1

公开(公告)日：2019-06-13

申请号：US16213119

申请日：2018-12-07

Applicant: TOKYO ELECTRON LIMITED ,  IMEC VZW

Inventor： Koichi YATSUDA ,  Tatsuya YAMAGUCHI ,  Yannick FEURPRIER ,  Frederic LAZZARINO ,  Jean-Francois de MARNEFFE ,  Khashayar BABAEI GAVAN

IPC: H01L21/768 ,  H01L21/311

Abstract: A semiconductor device manufacturing method of forming a trench and a via in a porous low dielectric constant film formed on a substrate as an interlayer insulating film, includes: embedding a polymer having a urea bond in pores of the porous low dielectric constant film by supplying a raw material for polymerization to the porous low dielectric constant film; forming the via by etching the porous low dielectric constant film; subsequently, embedding a protective filling material made of an organic substance in the via; subsequently, forming the trench by etching the porous low dielectric constant film; subsequently, removing the protective filling material; and after the forming a trench, removing the polymer from the pores of the porous low dielectric constant film by heating the substrate to depolymerize the polymer, wherein the embedding a polymer having a urea bond in pores is performed before the forming a trench.

公开(公告)号：US20180025917A1

公开(公告)日：2018-01-25

申请号：US15654307

申请日：2017-07-19

Applicant: TOKYO ELECTRON LIMITED

Inventor： Koichi YATSUDA ,  Takashi HAYAKAWA ,  Hiroshi OKUNO ,  Reiji NIINO ,  Hiroyuki HASHIMOTO ,  Tatsuya YAMAGUCHI

IPC: H01L21/311 ,  H01L21/67

CPC classification number: H01L21/31144 ,  H01L21/02118 ,  H01L21/02271 ,  H01L21/02282 ,  H01L21/31116 ,  H01L21/31127 ,  H01L21/31138 ,  H01L21/67063 ,  H01L21/6715 ,  H01L21/67178 ,  H01L21/67207 ,  H01L21/67225 ,  H01L21/76811 ,  H01L23/53238 ,  H01L23/53295

Abstract: There is provided a method of fabricating a semiconductor device by performing a process on a substrate, which includes: forming a masking film made of a polymer having a urea bond by supplying polymerizing raw materials to a surface of the substrate on which an etching target film formed; forming an etching pattern on the masking film; subsequently, etching the etching target film with a processing gas using the etching pattern; and subsequently, removing the masking film by heating the substrate to depolymerize the polymer.