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    DEVICE FOR PROCESSING BINARY DATA WITH SERIAL/PARALLEL CONVERSION
    1.
    发明申请
    DEVICE FOR PROCESSING BINARY DATA WITH SERIAL/PARALLEL CONVERSION 审中-公开
    用于处理具有串行/并行转换的二进制数据的设备

    公开(公告)号：US20090040082A1

    公开(公告)日：2009-02-12

    申请号：US12179286

    申请日：2008-07-24

    申请人： Torsten Hinz ,  Otto Schumacher ,  Patrick Runkel ,  Russell Homer

    发明人： Torsten Hinz ,  Otto Schumacher ,  Patrick Runkel ,  Russell Homer

    IPC分类号： H03M9/00

    CPC分类号： G11C7/1051 ,  G11C7/106 ,  G11C7/1078 ,  G11C7/1087 ,  G11C2207/107 ,  H03M9/00

    摘要： A device for processing binary data comprises at least one transmission link having an input for receiving a serial bit stream and an output for forwarding bits in a parallel format, and a serial/parallel converter providing n≧2 successive data bits of the serial bit stream as n-bit data words in the parallel format. The serial/parallel converter comprises a 1-to-n demultiplexer which is constructed and controllable in such a manner that the successive data bits of the serial bit stream appear in succession at intervals equal to a bit period TB cyclically at n data outputs and remain latched at the respective data output until a data bit appears again at the relevant data output and a relatching circuit with latching elements which receive the signals from the data outputs of the demultiplexer at which the first k data bits of each cycle appear and which are enabled in each case at a time which is between the beginning of the latching of the last data bit and the end of the latching of the first data bit of the relevant cycle in the demultiplexer, wherein 1≦k

    摘要翻译： 一种用于处理二进制数据的装置包括至少一个具有用于接收串行比特流的输入和用于以并行格式转发比特的输出的传输链路，以及串行/并行转换器，其提供串行比特的n≥2个连续数据比特 流作为并行格式的n位数据字。 串行/并行转换器包括1对n解复用器，其被构造和可控制，使得串行比特流的连续数据位以n个数据输出周期性地等于比特周期TB的间隔连续出现并保持 锁存在相应的数据输出，直到数据位再次出现在相关数据输出端，并且具有锁存元件的重合电路，该锁存元件接收来自每个周期的第一个k个数据位的多路复用器的数据输出端的信号， 在每种情况下，在解锁器中最后数据位的锁存开始和相关周期的第一数据位的锁存结束之间的时间，其中1 <= k

    Method of contacting an electrical conductor and flexible element for providing an electrical contact
    3.
    发明授权
    Method of contacting an electrical conductor and flexible element for providing an electrical contact 有权
    使电导体和柔性元件接触以提供电接触的方法

    公开(公告)号：US07534961B2

    公开(公告)日：2009-05-19

    申请号：US11966119

    申请日：2007-12-28

    申请人： Otto Schumacher

    发明人： Otto Schumacher

    IPC分类号： H02G15/02

    CPC分类号： H01R4/646 ,  H01R13/52

    摘要： A method of contacting an electrical conductor (1) having a conducting core (2) covered partly by an insulating material (3), comprising installing a contacting device (10) in electrical contact with the conducting core in a position (4) where the conducting core is free from the insulating material. Said method further comprises a flexible element (5) comprising an electrically conducting material over the conducting core in said position prior to installing the contacting device, the flexible element comprising at least one adhesive portion (8) which adheres to the insulating material in a vicinity of said position and a non-adhesive portion (7) which contacts the conducting core.

    摘要翻译： 一种使具有部分被绝缘材料（3）覆盖的导电芯（2）的电导体（1）接触的方法，包括在（4）的位置安装与所述导电芯电接触的接触装置（10） 导电芯不含绝缘材料。 所述方法还包括柔性元件（5），其在安装接触装置之前在所述位置上包括在所述导电芯上方的导电材料，所述柔性元件包括至少一个附着在所述绝缘材料附近的粘合剂部分（8） 的所述位置和与所述导电芯接触的非粘合部分（7）。

    Signal converter circuit
    4.
    发明申请
    Signal converter circuit 审中-公开
    信号转换电路

    公开(公告)号：US20070252618A1

    公开(公告)日：2007-11-01

    申请号：US11413315

    申请日：2006-04-28

    申请人： Karthik Gopalakrishnan ,  Otto Schumacher ,  Luca Ravezzi ,  Andreas Blum ,  Hamid Partovi

    发明人： Karthik Gopalakrishnan ,  Otto Schumacher ,  Luca Ravezzi ,  Andreas Blum ,  Hamid Partovi

    IPC分类号： H03K19/094

    CPC分类号： H03K19/0185 ,  H03K19/09432

    摘要： A signal converter circuit including an input circuit and an output circuit. The input circuit is configured to receive current mode logic signals and provide differential input signals based on the current mode logic signals. The output circuit is configured to receive the differential input signals and provide rail-to-rail output signals based on the differential input signals. The output circuit is configured to switch the rail-to-rail output signals in response to a common edge type in each of the differential input signals.

    摘要翻译： 一种包括输入电路和输出电路的信号转换器电路。 输入电路被配置为接收电流模式逻辑信号并且基于当前模式逻辑信号提供差分输入信号。 输出电路被配置为接收差分输入信号并且基于差分输入信号提供轨到轨输出信号。 输出电路被配置为响应于每个差分输入信号中的公共边缘类型来切换轨到轨输出信号。

    Memory controller, memory circuit and memory system with a memory controller and a memory circuit
    5.
    发明授权
    Memory controller, memory circuit and memory system with a memory controller and a memory circuit 有权
    存储器控制器，存储器电路和具有存储器控制器和存储器电路的存储器系统

    公开(公告)号：US07802166B2

    公开(公告)日：2010-09-21

    申请号：US11535961

    申请日：2006-09-27

    申请人： Aaron John Nygren ,  Thomas Hein ,  Martin Maier ,  Otto Schumacher

    发明人： Aaron John Nygren ,  Thomas Hein ,  Martin Maier ,  Otto Schumacher

    IPC分类号： H03M13/00

    CPC分类号： G06F13/1668 ,  G06F11/1004

    摘要： Methods and apparatus for adjusting a phase difference between clock signals. A first clock signal at a memory controller is adjusted relative to a clock second signal at a memory device. In one embodiment, data is transferred to the memory device according to the first clock signal, which has a predetermined phase relationship with second clock signal. Data received at the memory device is sampled at the memory device according to the second clock signal. Analysis is done of the data on the memory controller and of the received data on the memory circuit. On the basis of the analysis, an adjustment may be made to the phase relationship.

    摘要翻译： 用于调整时钟信号之间的相位差的方法和装置。 存储器控制器处的第一时钟信号相对于存储器件处的时钟第二信号进行调整。 在一个实施例中，根据与第二时钟信号具有预定相位关系的第一时钟信号将数据传送到存储器件。 根据第二时钟信号，在存储器件处接收到的数据在存储器件中被采样。 对存储器控制器上的数据和存储器电路上的接收数据进行分析。 在分析的基础上，可以对相位关系进行调整。

    Test switching circuit for a high speed data interface
    7.
    发明申请
    Test switching circuit for a high speed data interface 有权
    用于高速数据接口的测试开关电路

    公开(公告)号：US20050193302A1

    公开(公告)日：2005-09-01

    申请号：US10788545

    申请日：2004-02-27

    申请人： Javier Arguelles ,  Otto Schumacher

    发明人： Javier Arguelles ,  Otto Schumacher

    IPC分类号： G01R31/28 ,  G01R31/317 ,  H04L12/26 ,  H04L25/12 ,  H04L29/10

    CPC分类号： G01R31/31716 ,  G01R31/31701

    摘要： Test switching circuit for a high speed data interface (1) of an integrated circuit comprising switching transistors (T1-T6) which switch in a test mode a termination resistor output stage (15) of a data transmission signal path (17) to a termination resistor input stage (18) of a data reception signal path (25) to form an internal feedback test loop within said integrated circuit.

    摘要翻译： 包括开关晶体管（T 1 -T 6）的集成电路的高速数据接口（1）的测试开关电路，其将测试模式中的数据传输信号路径（17）的终端电阻输出级（15）切换到 数据接收信号路径（25）的终端电阻器输入级（18），以在所述集成电路内形成内部反馈测试回路。

    Optical Electrical Hybrid Cable
    8.
    发明申请
    Optical Electrical Hybrid Cable 有权
    光电混合电缆

    公开(公告)号：US20150003794A1

    公开(公告)日：2015-01-01

    申请号：US13931060

    申请日：2013-06-28

    申请人： Asaad R. Elsaadani ,  Thomas McKeon ,  Erhard Mahlandt ,  Otto Schumacher ,  Robert Scott ,  Robert Mangiulli

    发明人： Asaad R. Elsaadani ,  Thomas McKeon ,  Erhard Mahlandt ,  Otto Schumacher ,  Robert Scott ,  Robert Mangiulli

    IPC分类号： H01B11/22 ,  H01B13/016

    CPC分类号： H01B11/22 ,  G02B6/4416 ,  G02B6/4471 ,  H01B9/005 ,  H01B13/016 ,  Y10T29/49123

    摘要： A hybrid cable for telecommunications systems is disclosed. The hybrid cable may include a plurality of fiber-optic cables and power cables extending within an armor member and an outer jacket in a main body portion of the hybrid cable, and extending outside of the armor member and the outer jacket in a termination portion of the hybrid cable. Shielded tube assemblies may be attached to the power cables in the termination portion to provide electrical shielding to the power cables in the termination portion of the hybrid cable. The shielded tube assemblies may be attached to the armor member to electrically ground the shielded tube assemblies. A method of constructing a hybrid cable is also disclosed.

    摘要翻译： 公开了一种用于电信系统的混合电缆。 混合电缆可以包括在混合电缆的主体部分内的铠装构件和外护套中延伸的多根光纤电缆和电力电缆，并且在铠装构件和外护套的外侧延伸到 混合电缆。 屏蔽管组件可以连接到终端部分中的电力电缆，以对混合电缆的终端部分中的电力电缆提供电屏蔽。 屏蔽管组件可以附接到铠装构件以使屏蔽管组件电接地。 还公开了一种构成混合电缆的方法。

    Tool for stripping off a jacket from tubes or cables
    9.
    发明授权
    Tool for stripping off a jacket from tubes or cables 有权
    用于从管或电缆剥离护套的工具

    公开(公告)号：US08393250B2

    公开(公告)日：2013-03-12

    申请号：US11120943

    申请日：2005-05-04

    申请人： Otto Schumacher ,  Peter Bernasch ,  Erhard Mahlandt

    发明人： Otto Schumacher ,  Peter Bernasch ,  Erhard Mahlandt

    IPC分类号： H02G1/12 ,  B21F13/00 ,  B21F27/00

    CPC分类号： H02G1/1224 ,  H02G1/1229

    摘要： A tool for stripping off a jacket from tubes or cables is characterized by a bend adapted to an outer diameter of the duct or cable to be stripped, and a blade protruding from the bend to the interior of the bend. The invention provides a cost-effective, accurate and easily producible tool for stripping off a jacket from tubes or cables.

    摘要翻译： 用于从管或电缆剥离护套的工具的特征在于适于被剥离的管道或电缆的外径的弯曲部以及从弯曲部向弯曲部的内部突出的刀片。 本发明提供了一种经济高效，准确和易于生产的工具，用于从管或电缆剥离护套。

    Test switching circuit for a high speed data interface
    10.
    发明授权
    Test switching circuit for a high speed data interface 有权
    用于高速数据接口的测试开关电路

    公开(公告)号：US07723995B2

    公开(公告)日：2010-05-25

    申请号：US10788545

    申请日：2004-02-27

    申请人： Javier Argüelles ,  Otto Schumacher

    发明人： Javier Argüelles ,  Otto Schumacher

    IPC分类号： G01R31/02 ,  G01R31/26

    CPC分类号： G01R31/31716 ,  G01R31/31701

    摘要： A test switching circuit for a high speed data interface is disclosed. Test switching circuit for a high speed data interface of an integrated circuit including switching transistors which switch in a test mode a termination resistor output stage of a data transmission signal path to a termination resistor input stage of a data reception signal path to form an internal feedback test loop within said integrated circuit.

    摘要翻译： 公开了一种用于高速数据接口的测试切换电路。 用于集成电路的高速数据接口的测试开关电路，包括开关晶体管，其将测试模式中的数据传输信号路径的终端电阻输出级切换到数据接收信号路径的终端电阻输入级，以形成内部反馈 所述集成电路内的测试回路。