Process for producing titanium dioxide pigment for photograph and
photographic support comprising same
    1.
    发明授权
    Process for producing titanium dioxide pigment for photograph and photographic support comprising same 失效
    用于生产包含其的照片和摄影载体的二氧化钛颜料的方法

    公开(公告)号:US5547822A

    公开(公告)日:1996-08-20

    申请号:US286378

    申请日:1994-08-04

    摘要: Disclosed is a process for producing a titanium dioxide pigment used for a resin-coated paper type photographic support, comprising the following steps:(a) a step of adding at least one alkaline earth metal compound in an amount of 0.01-2.0% by weight in terms of a metal oxide based on the titanium dioxide before calcination step and(b) an acid-washing step of washing the titanium dioxide at acidic state after the calcination step and before a step of surface treatment with a hydrated metal oxide,and wherein particle size of the titanium dioxide pigment is 0.110-0.150 .mu.m shown by number-average diameter obtained by measuring the diameter in a certain direction using an electron microscope. A photographic support which comprises the above titanium dioxide pigment is also disclosed. Occurrence of die lip stain and microgrit are substantially reduced in the photographic support and a photographic material made thereof exhibits improved image sharpness.

    摘要翻译: 公开了一种用于树脂涂布纸型照相载体的二氧化钛颜料的制造方法,包括以下步骤:(a)添加0.01〜2.0重量%的至少一种碱土金属化合物的工序 在煅烧步骤之前的基于二氧化钛的金属氧化物和(b)在煅烧步骤之后和在用水合金属氧化物进行表面处理的步骤之前洗涤二氧化钛的酸洗步骤,其中 二氧化钛颜料的粒径为0.110〜0.150μm,通过使用电子显微镜测定一定方向的直径而得到的数均粒径。 还公开了包含上述二氧化钛颜料的照相载体。 在照相支撑体中,模唇纹和微纹理的发生显着减少,并且其制成的照相材料表现出改善的图像清晰度。

    Process for producing titanium dioxide pigment for photograph and
photographic support comprising same
    2.
    发明授权
    Process for producing titanium dioxide pigment for photograph and photographic support comprising same 失效
    用于生产包含其的照片和摄影载体的二氧化钛颜料的方法

    公开(公告)号:US5264033A

    公开(公告)日:1993-11-23

    申请号:US714847

    申请日:1991-06-13

    摘要: Disclosed is a process for producing a titanium dioxide pigment used for a resin-coated paper type photographic support, comprising the following steps:(a) a step of adding at least one alkaline earth metal compound in an amount of 0.01-2.0% by weight in terms of a metal oxide based on the titanium dioxide before calcination step and(b) an acid-washing step of washing the titanium dioxide at acidic state after the calcination step and before a step of surface treatment with a hydrated metal oxide,and wherein particle size of the titanium dioxide pigment is 0.110-0.150 .mu.m shown by number-average diameter obtained by measuring the diameter in a certain direction using an electron microscope.A photographic support which comprises the above titanium dioxide pigment is also disclosed.Occurrence of die lip stain and microgrit are substantially restrained in this photographic support and a photographic material made of it shows improved image sharpness.

    摘要翻译: 公开了一种用于树脂涂布纸型照相载体的二氧化钛颜料的制造方法,包括以下步骤:(a)添加0.01〜2.0重量%的至少一种碱土金属化合物的工序 在煅烧步骤之前的基于二氧化钛的金属氧化物和(b)在煅烧步骤之后和在用水合金属氧化物进行表面处理的步骤之前洗涤二氧化钛的酸洗步骤,其中 二氧化钛颜料的粒径为0.110〜0.150μm,通过使用电子显微镜测定一定方向的直径而得到的数均粒径。 还公开了包含上述二氧化钛颜料的照相载体。 在这种摄影载体中基本上限制了死唇染色和微纹理的发生,并且由其制成的照相材料显示出改进的图像清晰度。

    Semiconductor device with supply voltage-lowering circuit
    3.
    发明授权
    Semiconductor device with supply voltage-lowering circuit 失效
    具有电源降压电路的半导体器件

    公开(公告)号:US5831421A

    公开(公告)日:1998-11-03

    申请号:US837461

    申请日:1997-04-18

    CPC分类号: G05F1/465

    摘要: A semiconductor device includes an internal circuit and first and second supply voltage-lowering circuits in its semiconductor chip. The first supply voltage-lowering circuit steps down an external power supply potential of the semiconductor chip in response to a control signal, generates a first internal power supply potential, and supplies it to the internal circuit. The second supply voltage-lowering circuit steps down the external power supply potential of the semiconductor chip in response to the control signal, generates a second internal power supply potential of substantially the same level as that of the first internal power supply potential, and supplies it to the internal circuit. The first and second internal power supply potentials output from the first and second supply voltage-lowering circuits vary out of phase with each other to cancel out variations in first and second internal power supply potentials.

    摘要翻译: 半导体器件包括其半导体芯片中的内部电路和第一和第二电源降压电路。 第一电源降压电路响应于控制信号降低半导体芯片的外部电源电位,产生第一内部电源电位,并将其提供给内部电路。 第二电源降压电路响应于控制信号降低半导体芯片的外部电源电位,产生与第一内部电源电位基本相同的第二内部电源电位,并将其提供 到内部电路。 从第一和第二电源电压降低电路输出的第一和第二内部电源电位彼此不同相异,以抵消第一和第二内部电源电位的变化。

    Semiconductor device including internal circuit having both states of
active/precharge
    4.
    发明授权
    Semiconductor device including internal circuit having both states of active/precharge 失效
    半导体器件包括具有两种状态的有源/预充电的内部电路

    公开(公告)号:US5402010A

    公开(公告)日:1995-03-28

    申请号:US56408

    申请日:1993-05-04

    申请人: Kazuyoshi Muraoka

    发明人: Kazuyoshi Muraoka

    CPC分类号: G11C7/20 G11C7/22

    摘要: A semiconductor device has a plurality of internal circuits capable of having two conditions of an active state and a precharge state in the internal circuits. The device comprises signal generation element for generating a first signal which causes said internal circuits to be initialized until satisfying a predetermined condition from a time when the power is supplied; and state set element which is connected to an external apparatus through an interface which is supplied an external state signal, and for setting a precharge state of the internal circuits by outputting an internal state signal corresponding to the external state signal in response to a supply of the first signal from the signal generation element.

    摘要翻译: 半导体器件具有能够在内部电路中具有两种状态的激活状态和预充电状态的多个内部电路。 该装置包括用于产生第一信号的信号产生元件,该第一信号使得所述内部电路被初始化,直到从供电时起满足预定条件; 以及状态设定元件,其通过提供外部状态信号的接口连接到外部设备,并且用于通过输出与外部状态信号相对应的内部状态信号来设置内部电路的预充电状态, 来自信号发生元件的第一信号。

    Semiconductor memory having a spare memory cell

    公开(公告)号:US20060146620A1

    公开(公告)日:2006-07-06

    申请号:US11363933

    申请日:2006-03-01

    IPC分类号: G11C29/00 G11C17/18

    CPC分类号: G11C29/027 G11C29/02

    摘要: A semiconductor memory encompasses a memory cell array having a spare memory cell array; a holding circuit having banks of fuses, configured to read and hold fuse information; a decision circuit configured to determine which address of memory cell is to be replaced with which spare memory cell based on the fuse information from the holding circuit; and a holding-controller configured to control reading and holding of the fuse information in the holding circuit by receiving a power supply completion signal and a refresh signal. The holding circuit rereads the fuse information when the reread signal is generated, after the holding circuit reads once the fuse information by receiving the power supplying completion signal.

    Semiconductor device having electric fuse element
    7.
    发明授权
    Semiconductor device having electric fuse element 失效
    具有电熔丝元件的半导体器件

    公开(公告)号:US06680873B2

    公开(公告)日:2004-01-20

    申请号:US10042937

    申请日:2002-01-08

    IPC分类号: G11C800

    摘要: The output terminal of a voltage generation circuit is connected to one end portion of a fuse circuit. A transistor is connected to the other end portion of the fuse circuit. In program mode, a voltage generated from the voltage generation circuit is applied to the fuse circuit and a current flows through the fuse circuit and the transistor. In verify mode, a current generated from the voltage generation circuit flows into a pad through a selected fuse circuit and a detection circuit.

    摘要翻译: 电压产生电路的输出端连接到熔丝电路的一端。 晶体管连接到熔丝电路的另一端部。 在编程模式中,从电压产生电路产生的电压被施加到熔丝电路,并且电流流过熔丝电路和晶体管。 在验证模式下,从电压产生电路产生的电流通过选定的熔丝电路和检测电路流入焊盘。

    Twisting method and twisting frame utilizing I/F fluctuations
    9.
    发明授权
    Twisting method and twisting frame utilizing I/F fluctuations 失效
    采用I / F波动的扭转方式和扭转框架

    公开(公告)号:US5813210A

    公开(公告)日:1998-09-29

    申请号:US853417

    申请日:1997-05-09

    IPC分类号: D01H1/00 D02G3/34 D01H7/46

    CPC分类号: D02G3/34 D01H1/006

    摘要: A twisting frame 1, and a method of twisting yarn 11 in which a twist is applied to the yarn by signals having a 1/f fluctuation to yield a yarn 11 in which the yarn count varies with a 1/f fluctuation. The first aspect is a twisting method that applies twist to a single yarn or a plural number of yarns, in which a twist is applied to the yarn or yarns by setting the twist count to correspond to the strengths of serial signals having a 1/f fluctuation.

    摘要翻译: 扭转框架1以及通过具有1 / f波动的信号对纱线施加扭曲的纱线11的捻合方法,从而产生纱线数1变化的纱线11。 第一方面是一种扭转方法,其对单纱或多根纱线施加扭曲,其中通过将捻数计算为对应于具有1 / f的串行信号的强度而对纱线或纱线施加扭曲 波动。

    Semiconductor memory device having dummy word lines and method for
controlling the same
    10.
    发明授权
    Semiconductor memory device having dummy word lines and method for controlling the same 失效
    具有虚拟字线的半导体存储器件及其控制方法

    公开(公告)号:US5768204A

    公开(公告)日:1998-06-16

    申请号:US661948

    申请日:1996-06-11

    申请人: Kazuyoshi Muraoka

    发明人: Kazuyoshi Muraoka

    摘要: Memory cells and a sense amplifier are connected to a pair of bit lines. Two dummy word lines are capacitively coupled with the pair of bit lines. One of the dummy word lines is driven to a high level before the sense amplifier starts the sense operation, and the other dummy word line is driven to a high level after the sense amplifier has started the sense operation. When the sense amplifier has terminated the sense operation, the two dummy word lines are driven to a low level.

    摘要翻译: 存储单元和读出放大器连接到一对位线。 两个虚拟字线与该对位线电容耦合。 在读出放大器开始感测操作之前,虚拟字线之一被驱动到高电平,并且在读出放大器已经开始感测操作之后将另一个虚拟字线驱动到高电平。 当读出放大器终止感测操作时,两个虚拟字线被驱动到低电平。