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14 条记录 (耗时 0.025 秒)

    NADH kinase and a process for producing the same
    2.
    发明授权
    NADH kinase and a process for producing the same 失效
    NADH激酶及其生产方法

    公开(公告)号：US5227299A

    公开(公告)日：1993-07-13

    申请号：US822906

    申请日：1992-01-21

    申请人： Tsuyoshi Ohno ,  Masaru Suzuki ,  Tatsuo Horiuchi

    发明人： Tsuyoshi Ohno ,  Masaru Suzuki ,  Tatsuo Horiuchi

    IPC分类号： C12N9/12 ,  C12Q1/48 ,  C12R1/84

    CPC分类号： C12N9/12 ,  Y10S435/938

    摘要： The present invention relates to a novel NADH kinase which has high stability and is specific for NADH, and a process for producing the NADH kinase by culturing a yeast belonging to the genus Pichia in a culture medium, and this enzyme permits highly sensitive determination of NADH alone and hence is useful in the field of clinical medicine.

    摘要翻译： 本发明涉及一种具有高稳定性且对NADH具有特异性的新型NADH激酶，以及通过在培养基中培养属于毕赤酵母属的酵母来生产NADH激酶的方法，并且该酶能够高度敏感地测定NADH 因此在临床医学领域是有用的。

    Processing method and processing system
    3.
    发明授权
    Processing method and processing system 有权
    处理方法和处理系统

    公开(公告)号：US08778205B2

    公开(公告)日：2014-07-15

    申请号：US12588395

    申请日：2009-10-14

    申请人： Tsuyoshi Ohno ,  Toshihiko Kikuchi ,  Machi Moriya ,  Yoshitaka Saita

    发明人： Tsuyoshi Ohno ,  Toshihiko Kikuchi ,  Machi Moriya ,  Yoshitaka Saita

    IPC分类号： B44C1/22 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00 ,  H01L21/302 ,  H01L21/461

    CPC分类号： G01N21/211

    摘要： The present invention is a processing method including a processing step of performing predetermined processing for a workpiece; an unnecessary portion removal step of removing an unnecessary portion produced on a surface of the workpiece due to the predetermined processing; and a surface structure evaluation step of evaluating a surface structure of the workpiece from which the unnecessary portion has been removed by the unnecessary portion removal step.

    摘要翻译： 本发明是一种处理方法，包括对工件进行预定处理的处理步骤; 不必要部分去除步骤，用于去除由于预定处理而在工件的表面上产生的不必要部分; 以及表面结构评价步骤，通过不必要部分去除步骤来评价已经从其中去除了不必要部分的工件的表面结构。

    Image pickup apparatus
    5.
    发明申请
    Image pickup apparatus 失效
    摄像设备

    公开(公告)号：US20090185065A1

    公开(公告)日：2009-07-23

    申请号：US12314636

    申请日：2008-12-15

    申请人： Tsuyoshi Ohno ,  Hitoshi Nakanishi ,  Toshiaki Edamitsu

    发明人： Tsuyoshi Ohno ,  Hitoshi Nakanishi ,  Toshiaki Edamitsu

    IPC分类号： H04N9/07

    CPC分类号： G02B27/0018 ,  G02B5/005 ,  G03B9/02

    摘要： An image pickup apparatus includes an image-pickup optical system, three color separation prisms separating incident light guided by the image-pickup optical system into three-primary-color light components and emitting the light components, and three image pickup elements respectively receiving the three light components from the prisms so as to produce respective image signals. Of the three prisms, a first prism that first receives the incident light has an edge extending parallel to an incidence plane. The image-pickup optical system has a plate-like fixed aperture stop disposed between the first prism and a final lens, disposed closest to the first prism, of multiple lenses included in the image-pickup optical system. The fixed aperture stop has an aperture that limits the incident light. An edge section of the aperture has projections and depressions arranged at least in parallel to the edge, as viewed from an optical-axis direction of the final lens.

    摘要翻译： 图像拾取装置包括：图像拾取光学系统，将由图像拾取光学系统引导的入射光分离成三原色光分量并发射光分量的三个分离棱镜，以及分别接收三个原色光分量的三个摄像元件 来自棱镜的光分量，以产生各自的图像信号。 在三个棱镜中，首先接收入射光的第一棱镜具有平行于入射平面延伸的边缘。 图像拾取光学系统具有设置在第一棱镜和最靠近第一棱镜的最终透镜之间的板状固定孔径光阑，包括在图像拾取光学系统中的多个透镜。 固定孔径光阑具有限制入射光的孔径。 当从最终透镜的光轴方向观察时，孔的边缘部分具有至少平行于边缘布置的突起和凹陷。

    SOLID-STATE IMAGE PICKUP DEVICE, COLOR SEPARATION IMAGE PICKUP OPTICAL SYSTEM AND IMAGE PICKUP APPARATUS
    6.
    发明申请
    SOLID-STATE IMAGE PICKUP DEVICE, COLOR SEPARATION IMAGE PICKUP OPTICAL SYSTEM AND IMAGE PICKUP APPARATUS 审中-公开
    固态图像拾取装置，彩色分离图像拾取光学系统和图像拾取装置

    公开(公告)号：US20070132876A1

    公开(公告)日：2007-06-14

    申请号：US11609080

    申请日：2006-12-11

    申请人： Tsuyoshi Ohno ,  Masaki Tamura ,  Hitoshi Nakanishi

    发明人： Tsuyoshi Ohno ,  Masaki Tamura ,  Hitoshi Nakanishi

    IPC分类号： H04N5/225

    CPC分类号： H04N9/097 ,  G02B5/208 ,  G02B5/223 ,  H01L27/14618 ,  H01L27/14621 ,  H01L27/14627 ,  H01L31/02162 ,  H01L31/02327 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A color separation image pickup optical system is which can spectralize light with low noise and can be formed in a minimized size. The color separation image pickup optical system includes a solid-state image pickup device which in turn includes a semiconductor substrate, a plurality of photoelectric conversion elements formed on the semiconductor substrate, a transparent seal member, an a package in which the semiconductor substrate is sealed with the transparent seal member. A color light absorbing member of a single performance is disposed on the transparent seal member side with respect to the photoelectric conversion elements in the package and absorbs color light in a particular visible wavelength region with regard to the photoelectric conversion elements.

    摘要翻译： 一种分色图像拾取光学系统，其可以以低噪声对光进行光谱分解并且可以以最小的尺寸形成。 分色图像拾取光学系统包括固态图像拾取器件，该固态摄像器件又包括半导体衬底，形成在半导体衬底上的多个光电转换元件，透明密封元件，密封半导体衬底的封装 与透明密封构件。 相对于封装中的光电转换元件，在透明密封构件侧设置单一性能的彩色光吸收构件，并且吸收相对于光电转换元件的特定可见波长区域的彩色光。

    Low-noise buffer circuit that suppresses current variation
    7.
    发明授权
    Low-noise buffer circuit that suppresses current variation 失效
    抑制电流变化的低噪声缓冲电路

    公开(公告)号：US06489815B2

    公开(公告)日：2002-12-03

    申请号：US09839119

    申请日：2001-04-23

    申请人： Tsuyoshi Ohno

    发明人： Tsuyoshi Ohno

    IPC分类号： H03K300

    CPC分类号： H03K19/00361 ,  H03K5/133 ,  H03K2005/00078

    摘要： A low-noise buffer circuit stabilizing the output voltage and current to prevent noise, includes current sources connected between the CMOS circuit and power supply sources providing a power supply for the CMOS circuit, a resistor element connected to the current sources and in parallel with the CMOS circuit, the resistor element bypassing current between the current sources to prevent current fluctuation.

    摘要翻译： 稳定输出电压和电流以防止噪声的低噪声缓冲电路包括连接在CMOS电路和电源之间的电流源，为CMOS电路提供电源，电阻元件连接到电流源并与 CMOS电路，电阻元件旁路电流源之间的电流，以防止电流波动。

    Transistor device of MOS structure in which variation of output impedance resulting from manufacturing error is reduced
    8.
    发明授权
    Transistor device of MOS structure in which variation of output impedance resulting from manufacturing error is reduced 有权
    MOS结构的晶体管器件，其中由制造误差导致的输出阻抗的变化减小

    公开(公告)号：US06351015B1

    公开(公告)日：2002-02-26

    申请号：US09474770

    申请日：1999-12-30

    申请人： Tsuyoshi Ohno

    发明人： Tsuyoshi Ohno

    IPC分类号： H01L2978

    CPC分类号： H01L29/435 ,  H01L27/092

    摘要： A MOS (Metal Oxide Semiconductor) transistor includes a gate electrode, a drain electrode, and a source electrode. The MOS transistor has an on-state resistance when the MOS transistor is in an ON state. The MOS transistor further includes a specific electrode, wherein the specific electrode connects the source electrode to a power supply section to which a power is supplied. The specific electrode has a resistance substantially identical to the on-state resistance. The specific electrode has a width substantially identical to a width of the gate electrode. The specific electrode and the gate electrode are formed at a same time.

    摘要翻译： MOS（金属氧化物半导体）晶体管包括栅电极，漏电极和源电极。 当MOS晶体管处于导通状态时，MOS晶体管具有导通电阻。 MOS晶体管还包括特定电极，其中特定电极将源电极连接到供电部分。 特定电极具有与导通电阻基本相同的电阻。 特定电极具有与栅电极的宽度基本相同的宽度。 特定电极和栅电极同时形成。

    Intermediate potential generation circuit
    9.
    发明授权
    Intermediate potential generation circuit 失效
    中间电位生成电路

    公开(公告)号：US5973544A

    公开(公告)日：1999-10-26

    申请号：US121118

    申请日：1998-07-23

    申请人： Tsuyoshi Ohno

    发明人： Tsuyoshi Ohno

    IPC分类号： H01L27/04 ,  G05F3/24 ,  G11C11/407 ,  H01L21/822 ,  H01L21/8238 ,  H01L27/092 ,  H02J3/38

    CPC分类号： G05F3/247

    摘要： An intermediate potential generating circuit mainly includes an intermediate potential generating portion and an output portion. In this event, the intermediate potential generating portion generates first and second signals having first and second intermediate potentials different from each other between a first voltage source and a second voltage source and supplies the first and second signals via first and second signal terminals. Specifically, the intermediate potential generating portion has first, second, third and fourth MOS transistors. On the other hand, the output portion supplies a power supply having a third intermediate potential between the first intermediate potential and the second intermediate potential via an output terminal and is formed by fifth and sixth MOS transistors.

    摘要翻译： 中间电位产生电路主要包括中间电位产生部分和输出部分。 在这种情况下，中间电位产生部分产生具有在第一电压源和第二电压源之间彼此不同的第一和第二中间电位的第一和第二信号，并且经由第一和第二信号端提供第一和第二信号。 具体地，中间电位产生部分具有第一，第二，第三和第四MOS晶体管。 另一方面，输出部分经由输出端提供具有第一中间电位和第二中间电位之间的第三中间电位的电源，并由第五和第六MOS晶体管形成。

    Processing method and processing system
    10.
    发明申请
    Processing method and processing system 有权
    处理方法和处理系统

    公开(公告)号：US20100133231A1

    公开(公告)日：2010-06-03

    申请号：US12588395

    申请日：2009-10-14

    申请人： Tsuyoshi Ohno ,  Toshihiko Kikuchi ,  Machi Moriya ,  Yoshitaka Saita

    发明人： Tsuyoshi Ohno ,  Toshihiko Kikuchi ,  Machi Moriya ,  Yoshitaka Saita

    IPC分类号： C23F1/00

    CPC分类号： G01N21/211

    摘要： The present invention is a processing method including a processing step of performing predetermined processing for a workpiece; an unnecessary portion removal step of removing an unnecessary portion produced on a surface of the workpiece due to the predetermined processing; and a surface structure evaluation step of evaluating a surface structure of the workpiece from which the unnecessary portion has been removed by the unnecessary portion removal step.

    摘要翻译： 本发明是一种处理方法，包括对工件进行预定处理的处理步骤; 不必要部分去除步骤，用于去除由于预定处理而在工件的表面上产生的不必要部分; 以及表面结构评价步骤，通过不必要部分去除步骤来评价已经从其中去除了不必要部分的工件的表面结构。