Light-emitting diode device and method for fabricating the same
    1.
    发明授权
    Light-emitting diode device and method for fabricating the same 有权
    发光二极管装置及其制造方法

    公开(公告)号:US07932529B2

    公开(公告)日:2011-04-26

    申请号:US12200171

    申请日:2008-08-28

    IPC分类号: H01L33/00 H01L21/00

    摘要: A semiconductor device is disclosed. The semiconductor device comprises a light-emitting diode chip disposed in a cavity of a semiconductor substrate. At least two isolated outer wiring layers are disposed on the bottom surface of the semiconductor substrate and are electrically connected to the light-emitting diode chip, serving as input terminals. A lens module is adhered to the top surface of the semiconductor substrate to cap the cavity, in which the lens module comprises a molded lens and a transparent conductive layer coated with a fluorescent material under the molded lens. A method for fabricating the semiconductor devices is also disclosed.

    摘要翻译: 公开了一种半导体器件。 半导体器件包括设置在半导体衬底的空腔中的发光二极管芯片。 至少两个隔离的外部布线层设置在半导体衬底的底表面上,并且与用作输入端子的发光二极管芯片电连接。 透镜模块粘附到半导体衬底的顶表面以盖住空腔,其中透镜模块包括模制透镜和在模制透镜下方涂覆有荧光材料的透明导电层。 还公开了一种用于制造半导体器件的方法。

    LIGHT-EMITTING DIODE DEVICE AND METHOD FOR FABRICATING THE SAME
    2.
    发明申请
    LIGHT-EMITTING DIODE DEVICE AND METHOD FOR FABRICATING THE SAME 有权
    发光二极管装置及其制造方法

    公开(公告)号:US20100051982A1

    公开(公告)日:2010-03-04

    申请号:US12200171

    申请日:2008-08-28

    IPC分类号: H01L33/00

    摘要: A semiconductor device is disclosed. The semiconductor device comprises a light-emitting diode chip disposed in a cavity of a semiconductor substrate. At least two isolated outer wiring layers are disposed on the bottom surface of the semiconductor substrate and are electrically connected to the light-emitting diode chip, serving as input terminals. A lens module is adhered to the top surface of the semiconductor substrate to cap the cavity, in which the lens module comprises a molded lens and a transparent conductive layer coated with a fluorescent material under the molded lens. A method for fabricating the semiconductor devices is also disclosed.

    摘要翻译: 公开了一种半导体器件。 半导体器件包括设置在半导体衬底的空腔中的发光二极管芯片。 至少两个隔离的外部布线层设置在半导体衬底的底表面上,并且与用作输入端子的发光二极管芯片电连接。 透镜模块粘附到半导体衬底的顶表面以盖住空腔,其中透镜模块包括模制透镜和在模制透镜下方涂覆有荧光材料的透明导电层。 还公开了一种用于制造半导体器件的方法。

    Light-emitting diode device and method for fabricating the same
    3.
    发明授权
    Light-emitting diode device and method for fabricating the same 有权
    发光二极管装置及其制造方法

    公开(公告)号:US07928655B2

    公开(公告)日:2011-04-19

    申请号:US12267872

    申请日:2008-11-10

    IPC分类号: H05B33/04

    摘要: A light-emitting diode (LED) device is disclosed. The LED device includes a semiconductor substrate with a planar top surface, a light-emitting diode (LED) chip disposed over the top surface of the semiconductor substrate, at least two isolated outer wiring layers formed through the semiconductor substrate and electrically connected to the light-emitting diode chip, serving as input terminals, a transparent encapsulating layer with a substantially planar top surface formed over the semiconductor substrate, capping the LED chip and the at least two isolated outer wiring layers, and a lens module adhered to the substantially planar top surface of the transparent encapsulating layer to cap the light-emitting diode chip. In one embodiment, the lens module includes a fluorescent layer and a lens covering or covered by the fluorescent layer.

    摘要翻译: 公开了一种发光二极管(LED)装置。 LED装置包括:具有平面顶面的半导体基板,设置在半导体基板的上表面上的发光二极管(LED)芯片,至少两个隔离的外部布线层,形成在半导体基板上并电连接到该光 用作输入端子的透明封装层,形成在所述半导体衬底上方的基本上平坦的顶表面,对所述LED芯片和所述至少两个隔离的外部布线层进行封盖;以及透镜模块,其粘附到所述基本平坦的顶部 透明封装层的表面覆盖发光二极管芯片。 在一个实施例中,透镜模块包括荧光层和覆盖或被荧光层覆盖的透镜。

    Method of fabricating isolation structures for CMOS image sensor chip scale packages
    4.
    发明授权
    Method of fabricating isolation structures for CMOS image sensor chip scale packages 有权
    制造CMOS图像传感器芯片级封装的隔离结构的方法

    公开(公告)号:US07833810B2

    公开(公告)日:2010-11-16

    申请号:US12493758

    申请日:2009-06-29

    IPC分类号: H01L21/00 H01L23/544

    摘要: Isolation structure for CMOS image sensor device chip scale packages and fabrication methods thereof. A CMOS image sensor chip scale package includes a transparent substrate configured as a support structure for the package. The transparent substrate includes a first cutting edge and a second cutting edge. A CMOS image sensor die with a die circuitry is mounted on the transparent substrate. An encapsulant is disposed on the substrate encapsulating the CMOS image sensor die. A connection extends from the die circuitry to a plurality of terminal contacts for the package on the encapsulant, wherein the connection is exposed by the first cutting edge. An isolation structure is disposed on the first cutting edge passivating the exposed connection and co-planed with the second cutting edge.

    摘要翻译: CMOS图像传感器芯片级封装的隔离结构及其制造方法。 CMOS图像传感器芯片级封装包括被配置为用于封装的支撑结构的透明衬底。 透明基板包括第一切削刃和第二切削刃。 具有裸片电路的CMOS图像传感器芯片安装在透明基板上。 密封剂设置在封装有CMOS图像传感器芯片的基板上。 连接从管芯电路延伸到密封剂上的封装的多个端子触头,其中连接由第一切削刃暴露。 隔离结构设置在第一切削刃上,钝化暴露的连接并与第二切削刃共同设计。

    Isolation structures for CMOS image sensor chip scale packages
    5.
    发明授权
    Isolation structures for CMOS image sensor chip scale packages 有权
    CMOS图像传感器芯片级封装的隔离结构

    公开(公告)号:US07569409B2

    公开(公告)日:2009-08-04

    申请号:US11649242

    申请日:2007-01-04

    IPC分类号: H01L21/00 H01L23/544

    摘要: Isolation structure for CMOS image sensor device chip scale packages and fabrication methods thereof. A CMOS image sensor chip scale package includes a transparent substrate configured as a support structure for the package. The transparent substrate includes a first cutting edge and a second cutting edge. A CMOS image sensor die with a die circuitry is mounted on the transparent substrate. An encapsulant is disposed on the substrate encapsulating the CMOS image sensor die. A connection extends from the die circuitry to a plurality of terminal contacts for the package on the encapsulant, wherein the connection is exposed by the first cutting edge. An isolation structure is disposed on the first cutting edge passivating the exposed connection and co-planed with the second cutting edge.

    摘要翻译: CMOS图像传感器芯片级封装的隔离结构及其制造方法。 CMOS图像传感器芯片级封装包括被配置为用于封装的支撑结构的透明衬底。 透明基板包括第一切削刃和第二切削刃。 具有裸片电路的CMOS图像传感器芯片安装在透明基板上。 密封剂设置在封装有CMOS图像传感器芯片的基板上。 连接从管芯电路延伸到密封剂上的封装的多个端子触头,其中连接由第一切削刃暴露。 隔离结构设置在第一切削刃上,钝化暴露的连接并与第二切削刃共同设计。

    Isolation structures for CMOS image sensor chip scale packages
    9.
    发明申请
    Isolation structures for CMOS image sensor chip scale packages 有权
    CMOS图像传感器芯片级封装的隔离结构

    公开(公告)号:US20080164553A1

    公开(公告)日:2008-07-10

    申请号:US11649242

    申请日:2007-01-04

    IPC分类号: H01L31/0203 H01L31/18

    摘要: Isolation structure for CMOS image sensor device chip scale packages and fabrication methods thereof. A CMOS image sensor chip scale package includes a transparent substrate configured as a support structure for the package. The transparent substrate includes a first cutting edge and a second cutting edge. A CMOS image sensor die with a die circuitry is mounted on the transparent substrate. An encapsulant is disposed on the substrate encapsulating the CMOS image sensor die. A connection extends from the die circuitry to a plurality of terminal contacts for the package on the encapsulant, wherein the connection is exposed by the first cutting edge. An isolation structure is disposed on the first cutting edge passivating the exposed connection and co-planed with the second cutting edge.

    摘要翻译: CMOS图像传感器芯片级封装的隔离结构及其制造方法。 CMOS图像传感器芯片级封装包括被配置为用于封装的支撑结构的透明衬底。 透明基板包括第一切削刃和第二切削刃。 具有裸片电路的CMOS图像传感器芯片安装在透明基板上。 密封剂设置在封装有CMOS图像传感器芯片的基板上。 连接从管芯电路延伸到密封剂上的封装的多个端子触头,其中连接由第一切削刃暴露。 隔离结构设置在第一切削刃上,钝化暴露的连接并与第二切削刃共同设计。