公开(公告)号：US6165879A

公开(公告)日：2000-12-26

申请号：US426979

申请日：1999-10-26

申请人： Tzung-Han Lee ,  Hsi-Chien Lin

发明人： Tzung-Han Lee ,  Hsi-Chien Lin

IPC分类号： H01L21/60 ,  H01L21/3205

CPC分类号： H01L21/76897

摘要： The invention is related to a method for increasing margin precision of a self-aligned contact. A semiconductor has at least a gate electrode and source/drain, and a gate spacer is formed on the sidewall of the gate electrode. A first silicon oxide layer is then formed on the semiconductor substrate. A hard mask layer is formed on the first silicon oxide layer. A second silicon oxide layer is then deposited over the hard mask layer. A chemical mechanical polishing is then performed to remove the second silicon oxide layer so that the hard mask layer is planarized. Thereafter, the hard mask layer and the first silicon oxide layer is etched to form a gap region on the first silicon oxide layer. A polysilicon layer is then deposited over the entire substrate including the gap region and the hard mask layer. Thereafter, the polysilicon layer is etched back to form a polysilicon spacer. Finally, the gap region of the first silicon oxide layer is etched to form a self-aligned contact.

摘要翻译： 本发明涉及一种用于增加自对准接触的裕量精度的方法。 半导体至少具有栅电极和源极/漏极，并且栅极间隔物形成在栅电极的侧壁上。 然后在半导体衬底上形成第一氧化硅层。 在第一氧化硅层上形成硬掩模层。 然后在硬掩模层上沉积第二氧化硅层。 然后执行化学机械抛光以除去第二氧化硅层，使得硬掩模层被平坦化。 此后，蚀刻硬掩模层和第一氧化硅层，以在第一氧化硅层上形成间隙区域。 然后在包括间隙区域和硬掩模层的整个基板上沉积多晶硅层。 此后，多晶硅层被回蚀以形成多晶硅间隔物。 最后，蚀刻第一氧化硅层的间隙区域以形成自对准接触。

公开(公告)号：US20120002148A1

公开(公告)日：2012-01-05

申请号：US12869756

申请日：2010-08-27

申请人： Chia-Hsuan Pai ,  Te-Sheng Chen ,  Te-Wei Chan ,  Wen-Hao Hsu ,  Hsi-Chien Lin ,  Shih-Chi Tsai ,  Chung-Yi Chiu

发明人： Chia-Hsuan Pai ,  Te-Sheng Chen ,  Te-Wei Chan ,  Wen-Hao Hsu ,  Hsi-Chien Lin ,  Shih-Chi Tsai ,  Chung-Yi Chiu

IPC分类号： G02F1/1335

CPC分类号： G02F1/133711 ,  G02F1/133707 ,  G02F2001/13775

摘要： A liquid crystal display panel including an active device array substrate, an opposite substrate, and a liquid crystal layer is provided. The active device array substrate includes a plurality of pixel electrodes and each of the pixel electrodes includes a plurality of sets of stripe patterns extending along different directions. Each of the stripe patterns has a width of L and a space between two neighboring stripe patterns is S. The opposite substrate is disposed over the active device array substrate. The liquid crystal layer is disposed between the active device array substrate and the opposite substrate. A cell gap between the active device array substrate and the opposite substrate is d, birefringence of the liquid crystal layer is Δn, and dielectric anisotropy of the liquid crystal layer is Δ∈, wherein S, d, Δn, and Δ∈ comply with the inequality: S/|Δ∈|≦2.8×Δn×d.

摘要翻译： 提供了包括有源器件阵列基板，相对基板和液晶层的液晶显示面板。 有源器件阵列衬底包括多个像素电极，并且每个像素电极包括沿着不同方向延伸的多组条纹图案。 每个条纹图案具有L的宽度，并且两个相邻条纹图案之间的间隔为S.相对的衬底设置在有源器件阵列衬底上。 液晶层设置在有源器件阵列衬底和相对衬底之间。 有源器件阵列基板和相对基板之间的单元间隙为d，液晶层的双折射为＆Dgr; n，液晶层的介电各向异性为＆Dgr;∈，其中S，d，＆Dgr; n和 ＆Dgr;∈符合不等式：S / |＆Dgr;∈|＆nlE; 2.8×＆Dgr; n×d。

公开(公告)号：US08592006B2

公开(公告)日：2013-11-26

申请号：US12787105

申请日：2010-05-25

申请人： Chung-Ching Hsieh ,  Yang-Chu Lin ,  Hsi-Chien Lin ,  Te-Sheng Chen

发明人： Chung-Ching Hsieh ,  Yang-Chu Lin ,  Hsi-Chien Lin ,  Te-Sheng Chen

IPC分类号： C09K19/54 ,  C09K19/52 ,  C09K19/12 ,  C09K19/20 ,  C07C21/18 ,  C07C22/08

CPC分类号： C09K19/56 ,  C07C69/618 ,  C07C69/736 ,  C07C69/94 ,  C09K19/08 ,  C09K19/12 ,  C09K19/18 ,  C09K19/2007 ,  C09K19/3003 ,  C09K2019/0407 ,  C09K2019/0448 ,  C09K2019/123 ,  C09K2019/301 ,  C09K2219/03 ,  Y10T428/10

摘要： A polymerizable monomer adopted to a display panel is represented as following chemical formula: wherein, m≧0; “Z” is selected from oxygen, sulfur, carbonyl, caroboxyl, methyoxy, methylthio, thio, ethenylcarbonyl, carbonylethenyl, difluoromethoxy, difluoro methylthio, ethyl, difluoroethane, 1,2 difluoroethane, vinylene, difluoroethenylene, ethynyl, or single bond. “X1” and “X2” are independently selected from oxygen, sulfur, methyoxy, carbonyl, caroboxyl, -carbamoyl, methylthio, ethenylcarbonyl, carbonylethenyl, or single bond. “Sp1” and “Sp2” are independently a spacer or single bond. “P1” and “P2” are independently a polymerizable group.

摘要翻译： 采用显示面板的可聚合单体表示如下化学式：其中，m> = 0; “Z”选自氧，硫，羰基，羧基，甲氧基，甲硫基，硫代，乙烯基羰基，碳亚乙基，二氟甲氧基，二氟甲硫基，乙基​​，二氟乙烷，1,2-二氟乙烷，亚乙烯基，二氟亚乙烯基，乙炔基或单键。 “X1”和“X2”独立地选自氧，硫，甲氧基，羰基，羧基， - 氨基甲酰基，甲硫基，乙烯基羰基，碳亚乙基或单键。 “Sp1”和“Sp2”独立地为间隔基或单键。 “P1”和“P2”独立地是可聚合基团。

公开(公告)号：US20130003011A1

公开(公告)日：2013-01-03

申请号：US13400163

申请日：2012-02-20

申请人： Tsai-Fu Tsai ,  Shih-Ming Chen ,  Yen-Hei Chiang ,  Chih-Ho Chiu ,  Hsi-Chien Lin

发明人： Tsai-Fu Tsai ,  Shih-Ming Chen ,  Yen-Hei Chiang ,  Chih-Ho Chiu ,  Hsi-Chien Lin

IPC分类号： G02F1/13 ,  B29D11/00

CPC分类号： G02F1/133526 ,  G02B3/0031 ,  G02B5/3016 ,  G02B27/2214 ,  G02F1/133784 ,  G02F1/13471 ,  G02F1/29

摘要： A lens film and a manufacturing method thereof are disclosed. The lens film manufacturing method includes the steps of: forming an alignment film on a glass substrate; rubbing the alignment film along a rubbing direction; dispersing a liquid crystal polymer (LCP) material between the alignment film of the glass substrate and a lens mold; rolling the lens mold along a rolling direction to make the LCP material to form a lens film. A plurality of liquid crystal molecules of the lens film is affected by the alignment film to align along the rubbing direction. The lens film and a base panel having a polarization direction are operated in a LCD apparatus. The angle between the rubbing direction and the polarization direction is less than 15°.

摘要翻译： 公开了透镜膜及其制造方法。 透镜膜制造方法包括以下步骤：在玻璃基板上形成取向膜; 沿着摩擦方向摩擦取向膜; 将液晶聚合物（LCP）材料分散在玻璃基板的取向膜和透镜模具之间; 沿着滚动方向滚动镜片模具以使LCP材料形成透镜膜。 透镜膜的多个液晶分子受到取向膜的影响，沿着摩擦方向排列。 透镜膜和具有偏振方向的基板在LCD装置中操作。 摩擦方向与偏振方向之间的角度小于15°。

公开(公告)号：US07470992B2

公开(公告)日：2008-12-30

申请号：US11421773

申请日：2006-06-02

申请人： Kong-Beng Thei ,  Chun-Lung Cheng ,  Hsi-Chien Lin ,  Li-Don Chen ,  Tung-Lung Lai ,  Chi-Lung Lin

发明人： Kong-Beng Thei ,  Chun-Lung Cheng ,  Hsi-Chien Lin ,  Li-Don Chen ,  Tung-Lung Lai ,  Chi-Lung Lin

IPC分类号： H01L29/40

CPC分类号： H01L21/76846 ,  H01L21/76849 ,  H01L21/76877 ,  H01L23/53223 ,  H01L2924/0002 ,  H01L2924/00

摘要： A barrier layer stack. The barrier layer stack includes a semiconductor process wafer comprising an exposed conductive region, a first barrier layer stack comprising at least one TiN and one Ti layers overlying and contacting the conductive region, wherein the TiN layer is contacted with the Ti layer, and an overlying aluminum alloy layer in contact with the first barrier layer stack.

摘要翻译： 阻挡层堆叠。 阻挡层堆叠包括包括暴露的导电区域的半导体工艺晶片，包括至少一个TiN的第一势垒层堆叠和覆盖并接触导电区域的一个Ti层，其中TiN层与Ti层接触，并且覆盖 铝合金层与第一阻挡层堆叠接触。

公开(公告)号：US20110080551A1

公开(公告)日：2011-04-07

申请号：US12787105

申请日：2010-05-25

申请人： Chung-Ching Hsieh ,  Yang-Chu Lin ,  Hsi-Chien Lin ,  Te-Sheng Chen

发明人： Chung-Ching Hsieh ,  Yang-Chu Lin ,  Hsi-Chien Lin ,  Te-Sheng Chen

IPC分类号： C09K19/54 ,  C07C69/76 ,  C07C69/52 ,  C09K19/52 ,  C09K19/30

CPC分类号： C09K19/56 ,  C07C69/618 ,  C07C69/736 ,  C07C69/94 ,  C09K19/08 ,  C09K19/12 ,  C09K19/18 ,  C09K19/2007 ,  C09K19/3003 ,  C09K2019/0407 ,  C09K2019/0448 ,  C09K2019/123 ,  C09K2019/301 ,  C09K2219/03 ,  Y10T428/10

摘要： A polymerizable monomer adopted to a display panel is represented as following chemical formula: wherein, m≧0; “Z” is selected from oxygen, sulfur, carbonyl, caroboxyl, methyoxy, methylthio, thio, ethenylcarbonyl, carbonylethenyl, difluoromethoxy, difluoro methylthio, ethyl, difluoroethane, 1,2 difluoroethane, vinylene, difluoroethenylene, ethynyl, or single bond. “X1” and “X2” are independently selected from oxygen, sulfur, methyoxy, carbonyl, caroboxyl, -carbamoyl, methylthio, ethenylcarbonyl, carbonylethenyl, or single bond. “Sp1” and “Sp2” are independently a spacer or single bond. “P1” and “P2” are independently a polymerizable group.

摘要翻译： 采用显示面板的可聚合单体表示如下化学式：其中m≥0; “Z”选自氧，硫，羰基，羧基，甲氧基，甲硫基，硫代，乙烯基羰基，碳亚乙基，二氟甲氧基，二氟甲硫基，乙基​​，二氟乙烷，1,2-二氟乙烷，亚乙烯基，二氟亚乙烯基，乙炔基或单键。 “X1”和“X2”独立地选自氧，硫，甲氧基，羰基，羧基， - 氨基甲酰基，甲硫基，乙烯基羰基，碳乙烯基或单键。 “Sp1”和“Sp2”独立地为间隔基或单键。 “P1”和“P2”独立地是可聚合基团。

公开(公告)号：US08836134B2

公开(公告)日：2014-09-16

申请号：US13738082

申请日：2013-01-10

申请人： Po-Shen Lin ,  Chuan-Jin Shiu ,  Bing-Siang Chen ,  Chen-Han Chiang ,  Chien-Hui Chen ,  Hsi-Chien Lin ,  Yen-Shih Ho

发明人： Po-Shen Lin ,  Chuan-Jin Shiu ,  Bing-Siang Chen ,  Chen-Han Chiang ,  Chien-Hui Chen ,  Hsi-Chien Lin ,  Yen-Shih Ho

IPC分类号： H01L23/48 ,  H01L21/00

CPC分类号： H01L21/78 ,  B81C1/00888 ,  H01L21/561 ,  H01L23/12 ,  H01L23/3114 ,  H01L23/562 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/1461 ,  H01L2924/16235 ,  H01L2924/00

摘要： A method of fabricating a semiconductor stacked package is provided. A singulation process is performed on a wafer and a substrate, on which the wafer is stacked. A portion of the wafer on a cutting region is removed, to form a stress concentrated region on an edge of a chip of the wafer. The wafer and the substrate are then cut, and a stress is forced to be concentrated on the edge of the chip of the wafer. As a result, the edge of the chip is warpaged. Therefore, the stress is prevented from extending to the inside of the chip. A semiconductor stacked package is also provided.

摘要翻译： 提供一种制造半导体堆叠封装的方法。 在晶片和基板上进行单晶化处理，晶片和晶片被堆叠在其上。 去除切割区域上的晶片的一部分，以在晶片的芯片的边缘上形成应力集中区域。 然后切割晶片和基板，并且迫使应力集中在晶片的芯片的边缘上。 结果，芯片的边缘变形。 因此，防止了应力延伸到芯片的内部。 还提供半导体堆叠封装。

公开(公告)号：US20060261478A1

公开(公告)日：2006-11-23

申请号：US11421773

申请日：2006-06-02

申请人： Kong-Beng Thei ,  Chun-Lung Cheng ,  Hsi-Chien Lin ,  Li-Don Chen ,  Tung-Lung Lai ,  Chi-Lung Lin

发明人： Kong-Beng Thei ,  Chun-Lung Cheng ,  Hsi-Chien Lin ,  Li-Don Chen ,  Tung-Lung Lai ,  Chi-Lung Lin

IPC分类号： H01L23/52 ,  H01L21/4763

CPC分类号： H01L21/76846 ,  H01L21/76849 ,  H01L21/76877 ,  H01L23/53223 ,  H01L2924/0002 ,  H01L2924/00

摘要： A barrier layer stack. The barrier layer stack includes a semiconductor process wafer comprising an exposed conductive region, a first barrier layer stack comprising at least one TiN and one Ti layers overlying and contacting the conductive region, wherein the TiN layer is contacted with the Ti layer, and an overlying aluminum alloy layer in contact with the first barrier layer stack.

摘要翻译： 阻挡层堆叠。 阻挡层堆叠包括包括暴露的导电区域的半导体工艺晶片，包括至少一个TiN的第一势垒层堆叠和覆盖并接触导电区域的一个Ti层，其中TiN层与Ti层接触，并且覆盖 铝合金层与第一阻挡层堆叠接触。

公开(公告)号：US08920884B2

公开(公告)日：2014-12-30

申请号：US13214231

申请日：2011-08-21

申请人： Shih-Wei Yeh ,  Te-Sheng Chen ,  Chih-Ho Chiu ,  Hsi-Chien Lin

发明人： Shih-Wei Yeh ,  Te-Sheng Chen ,  Chih-Ho Chiu ,  Hsi-Chien Lin

IPC分类号： C09K19/32 ,  C09K19/12 ,  G02F1/1337 ,  C09K19/04 ,  C09K19/54

CPC分类号： C09K19/322 ,  C09K19/12 ,  C09K2019/0448 ,  C09K2019/548 ,  G02F1/133711 ,  G02F2001/133715

摘要： A method for fabricating a polymer stabilized alignment liquid crystal display panel including: filling a liquid crystal layer between a first substrate and a second substrate, the liquid crystal layer including liquid crystal molecules, monomer with single functional group and monomer with multiple functional groups; polymerizing the monomer with single functional groups to form two alignment layers over inner surfaces of the first substrate and the second substrate; and polymerizing the monomer with multiple functional groups to form a polymer capable of pre-tilting the liquid crystal molecules.

摘要翻译： 一种制造聚合物稳定取向液晶显示面板的方法，包括：在第一基板和第二基板之间填充液晶层，液晶层包括液晶分子，具有单官能团的单体和具有多个官能团的单体; 用单个官能团聚合单体以在第一基底和第二基底的内表面上形成两个取向层; 并且用多个官能团聚合单体以形成能够预倾斜液晶分子的聚合物。

公开(公告)号：US08581386B2

公开(公告)日：2013-11-12

申请号：US13350690

申请日：2012-01-13

申请人： Yu-Lin Yen ,  Shih-Ming Chen ,  Hsi-Chien Lin ,  Yu-Lung Huang ,  Tsang-Yu Liu

发明人： Yu-Lin Yen ,  Shih-Ming Chen ,  Hsi-Chien Lin ,  Yu-Lung Huang ,  Tsang-Yu Liu

IPC分类号： H01L23/04 ,  H01L23/12

CPC分类号： H01L31/0203 ,  H01L23/3114 ,  H01L23/3171 ,  H01L23/481 ,  H01L27/14618 ,  H01L27/14627 ,  H01L27/14683 ,  H01L27/14685 ,  H01L31/048 ,  H01L2224/16 ,  H01L2924/1461 ,  Y02E10/50 ,  H01L2924/00

摘要： An embodiment of the invention provides a chip package, which includes: a semiconductor substrate having a device region and a non-device region neighboring the device region; a package layer disposed on the semiconductor substrate; a spacing layer disposed between the semiconductor substrate and the package layer and surrounding the device region and the non-device region; a ring structure disposed between the semiconductor substrate and the package layer, and between the spacing layer and the device region, and surrounding a portion of the non-device region; and an auxiliary pattern including a hollow pattern formed in the spacing layer or the ring structure, a material pattern located between the spacing layer and the device region, or combinations thereof.

摘要翻译： 本发明的一个实施例提供了一种芯片封装，其包括：半导体衬底，具有与器件区域相邻的器件区域和非器件区域; 封装层，设置在所述半导体衬底上; 间隔层，设置在所述半导体衬底和所述封装层之间并且围绕所述器件区域和所述非器件区域; 设置在所述半导体衬底和所述封装层之间以及所述间隔层和所述器件区域之间并围绕所述非器件区域的一部分的环形结构; 以及包括形成在间隔层或环结构中的中空图案的辅助图案，位于间隔层和器件区域之间的材料图案，或其组合。