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    IMAGE SENSOR CHIP PACKAGE AND METHOD FOR FORMING THE SAME
    3.
    发明申请
    IMAGE SENSOR CHIP PACKAGE AND METHOD FOR FORMING THE SAME 有权
    图像传感器芯片封装及其形成方法

    公开(公告)号：US20120049307A1

    公开(公告)日：2012-03-01

    申请号：US13217999

    申请日：2011-08-25

    申请人： Yu-Lung HUANG ,  Tzu-Hsiang HUNG ,  Yen-Shih HO

    发明人： Yu-Lung HUANG ,  Tzu-Hsiang HUNG ,  Yen-Shih HO

    IPC分类号： H01L31/0232 ,  H01L31/18

    CPC分类号： H01L31/1876 ,  H01L27/14618 ,  H01L27/14687 ,  H01L2224/13 ,  H01L2224/94

    摘要： A method for forming an image sensor chip package includes: providing a substrate having predetermined scribe lines defined thereon, wherein the predetermined scribe lines define device regions and each of the device regions has at least a device formed therein; disposing a support substrate on a first surface of the substrate; forming at least a spacer layer between the support substrate and the substrate, wherein the spacer layer covers the predetermined scribe lines; forming a package layer on a second surface of the substrate; forming conducting structures on the second surface of the substrate, wherein the conducting structures are electrically connected to the corresponding device in corresponding one of the device regions, respectively; and dicing along the predetermined scribe lines such that the support substrate is removed from the substrate and the substrate is separated into a plurality of individual image sensor chip packages.

    摘要翻译： 一种用于形成图像传感器芯片封装的方法，包括：提供具有限定在其上的预定划线的基板，其中，所述预定划线限定器件区域，并且每个器件区域至少具有形成在其中的器件; 将支撑基板设置在所述基板的第一表面上; 在所述支撑基板和所述基板之间形成至少间隔层，其中所述间隔层覆盖所述预定划线; 在所述基板的第二表面上形成封装层; 在所述衬底的第二表面上形成导电结构，其中所述导电结构分别在相应的一个所述器件区域中电连接到相应的器件; 并且沿着预定的划线切割，使得支撑基板从基板移除，并且基板被分离成多个单独的图像传感器芯片封装。

    CHIP PACKAGE
    5.
    发明申请
    CHIP PACKAGE 有权
    芯片包装

    公开(公告)号：US20120112329A1

    公开(公告)日：2012-05-10

    申请号：US13350690

    申请日：2012-01-13

    申请人： Yu-Lin YEN ,  Shih-Ming CHEN ,  Hsi-Chien LIN ,  Yu-Lung HUANG ,  Tsang-Yu LIU

    发明人： Yu-Lin YEN ,  Shih-Ming CHEN ,  Hsi-Chien LIN ,  Yu-Lung HUANG ,  Tsang-Yu LIU

    IPC分类号： H01L23/495

    CPC分类号： H01L31/0203 ,  H01L23/3114 ,  H01L23/3171 ,  H01L23/481 ,  H01L27/14618 ,  H01L27/14627 ,  H01L27/14683 ,  H01L27/14685 ,  H01L31/048 ,  H01L2224/16 ,  H01L2924/1461 ,  Y02E10/50 ,  H01L2924/00

    摘要： An embodiment of the invention provides a chip package, which includes: a semiconductor substrate having a device region and a non-device region neighboring the device region; a package layer disposed on the semiconductor substrate; a spacing layer disposed between the semiconductor substrate and the package layer and surrounding the device region and the non-device region; a ring structure disposed between the semiconductor substrate and the package layer, and between the spacing layer and the device region, and surrounding a portion of the non-device region; and an auxiliary pattern including a hollow pattern formed in the spacing layer or the ring structure, a material pattern located between the spacing layer and the device region, or combinations thereof.

    摘要翻译： 本发明的一个实施例提供了一种芯片封装，其包括：半导体衬底，具有与器件区域相邻的器件区域和非器件区域; 封装层，设置在所述半导体衬底上; 间隔层，设置在所述半导体衬底和所述封装层之间并且围绕所述器件区域和所述非器件区域; 设置在所述半导体衬底和所述封装层之间以及所述间隔层和所述器件区域之间并围绕所述非器件区域的一部分的环形结构; 以及包括形成在间隔层或环结构中的中空图案的辅助图案，位于间隔层和器件区域之间的材料图案，或其组合。

    METHOD OF USING POWER SUPPLY TO PERFORM FAR-END MONITORING OF ELECTRONIC SYSTEM
    6.
    发明申请
    METHOD OF USING POWER SUPPLY TO PERFORM FAR-END MONITORING OF ELECTRONIC SYSTEM 审中-公开
    使用电源进行电子系统末端监控的方法

    公开(公告)号：US20110145620A1

    公开(公告)日：2011-06-16

    申请号：US12638483

    申请日：2009-12-15

    申请人： Tsun-Te SHIH ,  Yu-Yuan Chang ,  Yi-Hua Wang ,  Yu-Lung Huang ,  Chia-Lun Liu ,  Tsung-Chun Chen

    发明人： Tsun-Te SHIH ,  Yu-Yuan Chang ,  Yi-Hua Wang ,  Yu-Lung Huang ,  Chia-Lun Liu ,  Tsung-Chun Chen

    IPC分类号： G06F1/28

    CPC分类号： G06F1/28 ,  G06F11/0736 ,  G06F11/076 ,  G06F11/0784 ,  G06F11/3006 ,  G06F11/3062

    摘要： The present invention discloses a method of using a power supply to perform far-end monitoring of an electronic system. The electronic system has at least one power supply. The power supply has a signal integration unit receiving working parameters of the electronic system and a communication unit transmitting the working parameters to a communication network. The method of the present invention comprises steps: setting warning conditions, collecting working parameters, performing judgment, and performing far-end warning. The warning conditions are defined and stored in the signal integration unit. The signal integration unit collects the working parameters of the electronic system persistently. When determining that at least one of the working parameter meets the warning conditions, the signal integration unit generates a warning signal. The communication unit receives the warning signal and transmits the warning signal to the communication network.

    摘要翻译： 本发明公开了一种使用电源对电子系统进行远端监视的方法。 电子系统具有至少一个电源。 电源具有接收电子系统的工作参数的信号集成单元和将工作参数发送到通信网络的通信单元。 本发明的方法包括步骤：设置警告条件，收集工作参数，执行判断和执行远端警告。 警告条件被定义并存储在信号集成单元中。 信号集成单元持续收集电子系统的工作参数。 当确定工作参数中的至少一个满足警告条件时，信号积分单元产生警告信号。 通信单元接收警告信号并将通知网络发送警告信号。

    Chip package
    7.
    发明授权
    Chip package 有权
    芯片封装

    公开(公告)号：US08581386B2

    公开(公告)日：2013-11-12

    申请号：US13350690

    申请日：2012-01-13

    申请人： Yu-Lin Yen ,  Shih-Ming Chen ,  Hsi-Chien Lin ,  Yu-Lung Huang ,  Tsang-Yu Liu

    发明人： Yu-Lin Yen ,  Shih-Ming Chen ,  Hsi-Chien Lin ,  Yu-Lung Huang ,  Tsang-Yu Liu

    IPC分类号： H01L23/04 ,  H01L23/12

    CPC分类号： H01L31/0203 ,  H01L23/3114 ,  H01L23/3171 ,  H01L23/481 ,  H01L27/14618 ,  H01L27/14627 ,  H01L27/14683 ,  H01L27/14685 ,  H01L31/048 ,  H01L2224/16 ,  H01L2924/1461 ,  Y02E10/50 ,  H01L2924/00

    摘要： An embodiment of the invention provides a chip package, which includes: a semiconductor substrate having a device region and a non-device region neighboring the device region; a package layer disposed on the semiconductor substrate; a spacing layer disposed between the semiconductor substrate and the package layer and surrounding the device region and the non-device region; a ring structure disposed between the semiconductor substrate and the package layer, and between the spacing layer and the device region, and surrounding a portion of the non-device region; and an auxiliary pattern including a hollow pattern formed in the spacing layer or the ring structure, a material pattern located between the spacing layer and the device region, or combinations thereof.

    摘要翻译： 本发明的一个实施例提供了一种芯片封装，其包括：半导体衬底，具有与器件区域相邻的器件区域和非器件区域; 封装层，设置在所述半导体衬底上; 间隔层，设置在所述半导体衬底和所述封装层之间并且围绕所述器件区域和所述非器件区域; 设置在所述半导体衬底和所述封装层之间以及所述间隔层和所述器件区域之间并围绕所述非器件区域的一部分的环形结构; 以及包括形成在间隔层或环结构中的中空图案的辅助图案，位于间隔层和器件区域之间的材料图案，或其组合。

    Chip package and method for forming the same
    8.
    发明授权
    Chip package and method for forming the same 有权
    芯片封装及其形成方法

    公开(公告)号：US08508028B2

    公开(公告)日：2013-08-13

    申请号：US13184443

    申请日：2011-07-15

    申请人： Yu-Lung Huang ,  Yu-Ting Huang

    发明人： Yu-Lung Huang ,  Yu-Ting Huang

    IPC分类号： H01L23/06 ,  H01L23/48 ,  H01L23/04

    CPC分类号： H01L31/0203 ,  B81B7/0077 ,  H01L23/10 ,  H01L24/97 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2924/01005 ,  H01L2924/01021 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2924/00

    摘要： According to an embodiment, a chip package is provided, which includes: a substrate having a first surface and a second surface; a device region formed in the substrate; a passivation layer formed overlying the first surface of the substrate; at least a polymer planarization layer formed overlying the passivation layer; a package substrate disposed overlying the first surface of the substrate; and a spacer layer disposed between the package substrate and the passivation layer, wherein the spacer layer and the package substrate surround a cavity overlying the substrate, wherein the polymer planar layer does not extends to an outer edge of the spacer layer.

    摘要翻译： 根据实施例，提供一种芯片封装，其包括：具有第一表面和第二表面的基板; 形成在所述基板中的器件区域; 形成在衬底的第一表面上的钝化层; 至少形成在所述钝化层上的聚合物平坦化层; 封装基板，设置在所述基板的第一表面上方; 以及间隔层，其设置在所述封装衬底和所述钝化层之间，其中所述间隔层和所述封装衬底围绕覆盖所述衬底的空腔，其中所述聚合物平面层不延伸到所述间隔层的外边缘。

    CHIP PACKAGE AND METHOD FOR FORMING THE SAME
    9.
    发明申请
    CHIP PACKAGE AND METHOD FOR FORMING THE SAME 有权
    芯片包装及其形成方法

    公开(公告)号：US20120012988A1

    公开(公告)日：2012-01-19

    申请号：US13184443

    申请日：2011-07-15

    申请人： Yu-Lung HUANG ,  Yu-Ting HUANG

    发明人： Yu-Lung HUANG ,  Yu-Ting HUANG

    IPC分类号： H01L23/58 ,  H01L21/78

    CPC分类号： H01L31/0203 ,  B81B7/0077 ,  H01L23/10 ,  H01L24/97 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2924/01005 ,  H01L2924/01021 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2924/00

    摘要： According to an embodiment, a chip package is provided, which includes: a substrate having a first surface and a second surface; a device region formed in the substrate; a passivation layer formed overlying the first surface of the substrate; at least a polymer planarization layer formed overlying the passivation layer; a package substrate disposed overlying the first surface of the substrate; and a spacer layer disposed between the package substrate and the passivation layer, wherein the spacer layer and the package substrate surround a cavity overlying the substrate, wherein the polymer planar layer does not extends to an outer edge of the spacer layer.

    摘要翻译： 根据实施例，提供一种芯片封装，其包括：具有第一表面和第二表面的基板; 形成在所述基板中的器件区域; 形成在衬底的第一表面上的钝化层; 至少形成在所述钝化层上的聚合物平坦化层; 封装基板，设置在所述基板的第一表面上方; 以及间隔层，其设置在所述封装衬底和所述钝化层之间，其中所述间隔层和所述封装衬底围绕覆盖所述衬底的空腔，其中所述聚合物平面层不延伸到所述间隔层的外边缘。