公开(公告)号：US06873173B2

公开(公告)日：2005-03-29

申请号：US10220449

申请日：2001-03-05

申请人： Ute Kollmer ,  Ulrich Schaper ,  Carsten Linnenbank ,  Roland Thewes

发明人： Ute Kollmer ,  Ulrich Schaper ,  Carsten Linnenbank ,  Roland Thewes

IPC分类号： G01R31/26 ,  G01R31/27 ,  G01R31/30 ,  G11C29/50

CPC分类号： G11C29/028 ,  G01R31/2621 ,  G01R31/275 ,  G01R31/3004 ,  G11C29/50 ,  G11C2029/5004

摘要： The invention relates to a test circuit configuration. Every gate terminal of a transistor to be tested is coupled to a gate voltage source in such a manner that the gate voltage can be measured and adjusted individually on every gate terminal. The source terminal of every transistor to be tested can be coupled to the source voltage source in such a manner that the source voltage can be measured and adjusted individually on every source terminal.

摘要翻译： 本发明涉及一种测试电路结构。 要测试的晶体管的每个栅极端子以这样的方式耦合到栅极电压源，使得可以在每个栅极端子上单独地测量和调整栅极电压。 要测试的每个晶体管的源极端子可以以这样的方式耦合到源极电压源，使得可以在每个源极端子上单独测量和调节源极电压。

公开(公告)号：US06831474B2

公开(公告)日：2004-12-14

申请号：US10203179

申请日：2002-12-30

申请人： Ute Kollmer ,  Carsten Linnenbank ,  Ulrich Schaper ,  Roland Thewes

发明人： Ute Kollmer ,  Carsten Linnenbank ,  Ulrich Schaper ,  Roland Thewes

IPC分类号： G01R3128

CPC分类号： G01R31/275 ,  G01R31/2851

摘要： An apparatus and method for testing a plurality of electrical components that are coupled to one another. Further, an electrical selection unit, coupled to the electrical components to be tested, is provided for selecting at least one electrical component to be tested. A parasitic voltage drop in the testing circuit can be at least partially compensated using a control element coupled to the electrical components to be tested. The invention makes it possible, for testing of electrical components on a wafer over a large distance, i.e., several millimeters, to permit automated compensation of interference influences which occur as a result of the lines coupling or connecting the components to be tested.

摘要翻译： 一种用于测试彼此耦合的多个电气部件的装置和方法。 此外，提供耦合到要测试的电气部件的电选择单元，用于选择至少一个要测试的电气部件。 可以使用耦合到要测试的电气部件的控制元件来至少部分地补偿测试电路中的寄生电压降。 本发明使得可以在大范围（即几毫米）上测试晶片上的电气部件，以允许自动补偿由于线路耦合或连接待测组件的结果而发生的干扰影响。

公开(公告)号：US06870373B2

公开(公告)日：2005-03-22

申请号：US10236889

申请日：2002-09-06

申请人： Ute Kollmer ,  Stephan Sauter ,  Carsten Linnenbank ,  Roland Thewes

发明人： Ute Kollmer ,  Stephan Sauter ,  Carsten Linnenbank ,  Roland Thewes

IPC分类号： G11C7/06 ,  G11C11/405 ,  G11C11/4091 ,  G01R31/11 ,  G01R27/26

CPC分类号： G11C7/06 ,  G11C11/405 ,  G11C11/4091 ,  G11C2207/063

摘要： A circuit configuration for assessing capacitances in a matrix, which has a number of rows with at least one capacitance in at least one dimension, includes a test arm connected to first electrodes of each of the capacitances to be assessed and by which two different potentials can be applied to the first electrodes, a measurement arm connected to second electrodes of each of the capacitances to be assessed and that has a first measurement path and a second measurement path connected to a common potential. The first measurement path has an instrument for assessing the capacitances and the first and second measurement paths can be connected to the second electrodes. The circuit configuration has a drive device that connects each of the capacitances to be assessed individually to the two different potentials.

摘要翻译： 用于评估在至少一维中具有至少一个电容的行数的矩阵中的电容的电路配置包括连接到要评估的每个电容的第一电极的测试臂，并且两个不同的电位可以被 施加到第一电极，测量臂连接到要评估的每个电容的第二电极，并且具有连接到公共电位的第一测量路径和第二测量路径。 第一测量路径具有用于评估电容的仪器，并且第一和第二测量路径可以连接到第二电极。 电路配置具有驱动装置，其将要被分别评估的每个电容连接到两个不同的电位。

公开(公告)号：US6097661A

公开(公告)日：2000-08-01

申请号：US161004

申请日：1998-09-25

申请人： Roland Thewes ,  Doris Schmitt-Landsiedel ,  Paul-Werner von Basse ,  Michael Bollu ,  Ute Kollmer ,  Andreas Luck, deceased ,  by Manfred Luck, legal representative ,  by Inge Booken, legal representative

发明人： Roland Thewes ,  Doris Schmitt-Landsiedel ,  Paul-Werner von Basse ,  Michael Bollu ,  Ute Kollmer ,  Andreas Luck, deceased ,  by Manfred Luck, legal representative ,  by Inge Booken, legal representative

IPC分类号： G11C19/28 ,  G11C7/10 ,  G11C8/04 ,  G11C7/00

CPC分类号： G11C7/1018 ,  G11C8/04

摘要： In the pointer circuit, only one static memory (1) is respectively individually allocated to each output ( . . . , A.sub.n-1, A.sub.n, A.sub.n+1, . . . ), of which each respectively has a pair of mutually complementary memory terminals (Q, Q). The two terminals are in two stored logical states ("1," "0") differing from one another. A memory terminal (Q) of each memory is connected with the output allocated to this memory. The memories are controlled by clock signals. This results in advantageous surface requirement and power loss low, as well as high speed.

摘要翻译： 在指针电路中，只有一个静态存储器（1）分别分别分配给每个输出（...，An-1，An，An + 1，...），其中每个分别具有一对相互补充的存储器 端子（Q，+ E，ovs Q + EE）。 两个终端处于彼此不同的两个存储的逻辑状态（“1”，“0”）。 每个存储器的存储器端子（Q）与分配给该存储器的输出端连接。 存储器由时钟信号控制。 这导致有利的表面要求和功率损耗低以及高速度。

公开(公告)号：US09111593B2

公开(公告)日：2015-08-18

申请号：US13456057

申请日：2012-04-25

申请人： Richard Ferrant ,  Roland Thewes

发明人： Richard Ferrant ,  Roland Thewes

IPC分类号： G11C7/00 ,  G11C7/06 ,  G11C7/12 ,  G11C11/4091 ,  G11C11/4094

CPC分类号： G11C7/065 ,  G11C7/12 ,  G11C11/4091 ,  G11C11/4094

摘要： The invention relates to a differential sense amplifier for sensing data stored in a plurality of memory cells of a memory cell array, including a first CMOS inverter having an output connected to a first bit line and an input connected to a second bit line complementary to the first bit line, and a second CMOS inverter having an output connected to the second bit line and an input connected to the first bit line (BL). Each CMOS inverter includes a pull-up transistor and a pull-down transistor, with the sense amplifier having a pair of precharge transistors arranged to be respectively coupled to the first and second bit lines, to precharge the first and second bit lines to a precharge voltage. The precharge transistors are constituted by the pull-up transistors or by the pull-down transistors.

摘要翻译： 本发明涉及用于感测存储在存储单元阵列的多个存储器单元中的数据的差分读出放大器，包括具有连接到第一位线的输出的第一CMOS反相器和连接到与第一位线互补的第二位线的输入 第一位线和第二CMOS反相器，其具有连接到第二位线的输出和连接到第一位线（BL）的输入。 每个CMOS反相器包括一个上拉晶体管和一个下拉晶体管，其中读出放大器具有一对分别耦合到第一和第二位线的预充电晶体管，以将第一和第二位线预充电到预充电 电压。 预充电晶体管由上拉晶体管或下拉晶体管构成。

公开(公告)号：US20090322404A1

公开(公告)日：2009-12-31

申请号：US12403837

申请日：2009-03-13

申请人： Roland Thewes ,  Ralf Brederlow

发明人： Roland Thewes ,  Ralf Brederlow

IPC分类号： G06F7/556

CPC分类号： G01K7/01

摘要： The invention relates to an arrangement comprising a logarithmizing unit and a subtracting unit, wherein the subtracting unit has an output at which a voltage value linearly proportional to the temperature can be tapped off.

摘要翻译： 本发明涉及一种包括对数单元和减法单元的装置，其中减法单元具有与温度成线性比例的电压值可以被分接的输出。

公开(公告)号：US20090040803A1

公开(公告)日：2009-02-12

申请号：US12186085

申请日：2008-08-05

申请人： Helmut Schneider ,  Roland Thewes

发明人： Helmut Schneider ,  Roland Thewes

IPC分类号： G11C5/02 ,  G11C7/00

CPC分类号： G11C11/4097 ,  G11C11/4091 ,  G11C11/4094 ,  G11C11/4099 ,  G11C2207/005

摘要： A semiconductor memory having read amplifier strips having a plurality of read amplifiers and having memory cell fields which have a plurality of memory cells connected to bit lines is disclosed. The read amplifier strips include at least two outer read amplifier strips between which the remaining read amplifier strips and the memory cell fields are arranged, wherein adjacent to at least one of the outer read amplifier strips, a reference circuit field is arranged, which has reference lines and reference circuit elements connected thereto, and wherein the reference lines are shorter than the bit lines of the memory cell fields.

摘要翻译： 公开了一种具有多个读取放大器的读取放大器条带并且具有连接到位线的多个存储器单元的存储单元场的半导体存储器。 读取放大器条带包括至少两个外部读取放大器条带，其间布置剩余的读取放大器条带和存储器单元区域，其中与至少一个外部读取放大器条带相邻，配置参考电路字段，其具有参考 线路和参考电路元件，并且其中参考线比存储器单元场的位线短。

公开(公告)号：US07432068B2

公开(公告)日：2008-10-07

申请号：US10239007

申请日：2001-03-29

申请人： Alexander Frey ,  Roland Thewes

发明人： Alexander Frey ,  Roland Thewes

IPC分类号： G01N33/53

CPC分类号： G01N27/3276

摘要： The invention relates to a first electrode that is provided with a holding area for holding probe molecules which can bind macro-molecular biopolymers. The first electrode and/or a second electrode is/are divided into a plurality of electrode segments that are electrically insulated from one another. The randomly selected electrode segments, independently from one another, can be electrically coupled in such a way that an effective electrode surface can be adjusted in the size thereof according to the selected electrode segments.

摘要翻译： 本发明涉及一种第一电极，其具有用于保持能够结合大分子生物聚合物的探针分子的保持区域。 第一电极和/或第二电极被分成彼此电绝缘的多个电极段。 随机选择的电极段彼此独立地可以以这样的方式电耦合，使得根据所选择的电极段可以调整有效电极表面的尺寸。

公开(公告)号：US07429001B2

公开(公告)日：2008-09-30

申请号：US10504376

申请日：2003-02-12

申请人： Ralf Brederlow ,  Christian Pacha ,  Roland Thewes ,  Werner Weber

发明人： Ralf Brederlow ,  Christian Pacha ,  Roland Thewes ,  Werner Weber

IPC分类号： G06K19/06 ,  G06K7/08 ,  H04Q5/22

CPC分类号： G06K7/10336 ,  G06K7/086 ,  G06K19/067

摘要： The invention relates to a label identification system comprised of a transmitting-receiving unit and of identification labels on which the identification information is stored in the form of a digital identification information word. The provision of a circuit on the identification label in the form of a circuit arrangement, which is prefabricated using a polymer technique and on which the identification information is subsequently placed by the offset printing of conductor tracks, enables the provision of an identification label involving a minimal consumption of energy during inexpensive mass production. The bulk of the identification information processing is transferred to the transmitting-receiving unit.

摘要翻译： 本发明涉及一种标签识别系统，包括发送接收单元和识别标签，识别信息以数字识别信息字的形式存储在其上。 使用聚合物技术预制的电路装置形式的识别标签上的电路的提供，并且随后通过导体迹线的胶印印刷识别信息，能够提供涉及 在廉价大规模生产中能量消耗最小化。 识别信息处理的大部分被传送到发送 - 接收单元。

公开(公告)号：US20070085582A1

公开(公告)日：2007-04-19

申请号：US10562458

申请日：2004-06-30

申请人： Ralf Brederlow ,  Sylvain Briole ,  Christian Pacha ,  Roland Thewes ,  Werner Weber

发明人： Ralf Brederlow ,  Sylvain Briole ,  Christian Pacha ,  Roland Thewes ,  Werner Weber

IPC分类号： H03K7/08

CPC分类号： G06K19/0723

摘要： The invention relates to an electronic component that can be operated by means of an alternating voltage. Said component includes at least one input, at least one output and a pair of electronic sub-components with an identical function. The input(s) of the electronic component is/are coupled to a respective input of the electronic sub-components with an identical function and the output(s) of the electronic component is/are coupled to a respective output of said electronic sub-components. In addition, the electronic component is configured in such a way that at least one output only one output signal of the first sub-component of the pair of functionally identical electronic components can be picked up during a first half-wave of an alternating voltage, whereas only one output signal of the second sub-component of the pair of functionally identical electronic can be picked up during the second half-wave of the alternating voltage.

摘要翻译： 本发明涉及可以通过交流电压操作的电子部件。 所述组件包括具有相同功能的至少一个输入，至少一个输出和一对电子子部件。 电子部件的输入端以相同的功能耦合到电子子部件的相应输入端，并且电子部件的输出耦合到所述电子部件的相应输出端， 组件。 此外，电子部件被配置为使得在交流电压的第一半波期间可以拾取一对功能相同的电子部件中的第一子部件的至少一个输出信号的一个输出信号， 而一对功能相同的电子对的第二子分量的一个输出信号可以在交流电压的第二个半波期间被拾取。