公开(公告)号：US20130032084A1

公开(公告)日：2013-02-07

申请号：US13483002

申请日：2012-05-29

申请人： Visweswaren Sivaramakrishnan ,  Tirunelveli S. Ravi ,  Quoc Vinh Truong ,  Jean R. Vatus ,  Visweswaren Sivaramakrishnan

发明人： Visweswaren Sivaramakrishnan ,  Tirunelveli S. Ravi ,  Andrzej Kaszuba ,  Quoc Vinh Truong ,  Jean R. Vatus

IPC分类号： C30B25/14 ,  C30B25/12

CPC分类号： C30B25/14 ,  C30B25/105 ,  C30B25/12 ,  C30B25/165 ,  C30B25/20 ,  C30B29/06 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/0262 ,  H01L31/1804

摘要： A system for depositing thin single crystal silicon wafers by epitaxial deposition in a silicon precursor depletion mode with cross-flow deposition may include: a substrate carrier with low total heat capacity, high emissivity and small volume; a lamp module with rapid heat-up, efficient heat production, and spatial control over heating; and a manifold designed for cross-flow processing. Furthermore, the substrate carrier may include heat reflectors to control heat loss from the edges of the carrier and/or heat chokes to thermally isolate the carrier from the manifolds, allowing independent temperature control of the manifolds. The carrier and substrates may be configured for deposition on both sides of the substrates—the substrates having release layers on both sides and the carriers being configured to have equal process gas flow over both surfaces of the substrate. High volume may be addressed by a deposition system comprising multiple mini-batch reactors.

摘要翻译： 通过在具有交叉流沉积的硅前体耗尽模式中通过外延沉积沉积薄单晶硅晶片的系统可以包括：具有低总热容量，高发射率和小体积的基板载体; 具有快速升温，高效热量生产和加热空间控制的灯模块; 以及设计用于交叉流处理的歧管。 此外，衬底载体可以包括热反射器，以控制从载体和/或热扼流器的边缘的热损失，以将载体与歧管热隔离，允许对歧管进行独立的温度控制。 载体和基底可以被配置用于在基底的两侧上沉积 - 在两侧上具有释放层的基底和载体构造成在基底的两个表面上具有相等的工艺气流。 高体积可以由包括多个微型间歇反应器的沉积系统来解决。

公开(公告)号：US09255346B2

公开(公告)日：2016-02-09

申请号：US13483002

申请日：2012-05-29

申请人： Visweswaren Sivaramakrishnan ,  Tirunelveli S. Ravi ,  Andrzej Kaszuba ,  Bozena Kaszuba ,  Quoc Vinh Truong ,  Jean R. Vatus

发明人： Visweswaren Sivaramakrishnan ,  Tirunelveli S. Ravi ,  Andrzej Kaszuba ,  Quoc Vinh Truong ,  Jean R. Vatus

IPC分类号： C30B21/02 ,  C30B29/06 ,  C30B25/16 ,  H01L21/02

CPC分类号： C30B25/14 ,  C30B25/105 ,  C30B25/12 ,  C30B25/165 ,  C30B25/20 ,  C30B29/06 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/0262 ,  H01L31/1804

摘要： A system for depositing thin single crystal silicon wafers by epitaxial deposition in a silicon precursor depletion mode with cross-flow deposition may include: a substrate carrier with low total heat capacity, high emissivity and small volume; a lamp module with rapid heat-up, efficient heat production, and spatial control over heating; and a manifold designed for cross-flow processing. Furthermore, the substrate carrier may include heat reflectors to control heat loss from the edges of the carrier and/or heat chokes to thermally isolate the carrier from the manifolds, allowing independent temperature control of the manifolds. The carrier and substrates may be configured for deposition on both sides of the substrates—the substrates having release layers on both sides and the carriers being configured to have equal process gas flow over both surfaces of the substrate. High volume may be addressed by a deposition system comprising multiple mini-batch reactors.

摘要翻译： 通过在具有交叉流沉积的硅前体耗尽模式中通过外延沉积沉积薄单晶硅晶片的系统可以包括：具有低总热容量，高发射率和小体积的基板载体; 具有快速升温，高效热量生产和加热空间控制的灯模块; 以及设计用于交叉流处理的歧管。 此外，衬底载体可以包括热反射器，以控制从载体和/或热扼流器的边缘的热损失，以将载体与歧管热隔离，允许对歧管进行独立的温度控制。 载体和基底可以被配置用于在基底的两侧上沉积 - 在两侧上具有释放层的基底和载体构造成在基底的两个表面上具有相等的工艺气流。 高体积可以由包括多个微型间歇反应器的沉积系统来解决。

公开(公告)号：US20100215872A1

公开(公告)日：2010-08-26

申请号：US12392448

申请日：2009-02-25

申请人： Visweswaren Sivaramakrishnan ,  Kedarnath Sangam ,  Tirunelveli S. Ravi ,  Andrzej Kaszuba ,  Quoc Vinh Truong

发明人： Visweswaren Sivaramakrishnan ,  Kedarnath Sangam ,  Tirunelveli S. Ravi ,  Andrzej Kaszuba ,  Quoc Vinh Truong

IPC分类号： C23C16/56

CPC分类号： C23C16/481 ,  C23C16/0209 ,  C23C16/455 ,  C23C16/4582 ,  C23C16/46 ,  C23C16/463 ,  C23C16/54 ,  C30B25/105 ,  C30B25/12 ,  C30B29/06

摘要： An epitaxial reactor enabling simultaneous deposition of thin films on a multiplicity of wafers is disclosed. During deposition, a number of wafers are contained within a wafer sleeve comprising a number of wafer carrier plates spaced closely apart to minimize the process volume. Process gases flow preferentially into the interior volume of the wafer sleeve, which is heated by one or more lamp modules. Purge gases flow outside the wafer sleeve within a reactor chamber to minimize wall deposition. In addition, sequencing of the illumination of the individual lamps in the lamp module may further improve the linearity of variation in deposition rates within the wafer sleeve. To improve uniformity, the direction of process gas flow may be varied in a cross-flow configuration. Combining lamp sequencing with cross-flow processing in a multiple reactor system enables high throughput deposition with good film uniformities and efficient use of process gases.

摘要翻译： 公开了一种能够在多个晶片上同时沉积薄膜的外延反应器。 在沉积期间，许多晶片被包含在晶片套筒内，其包括间隔开的多个晶片承载板，以最小化处理体积。 工艺气体优先流入由一个或多个灯模块加热的晶片套筒的内部容积。 吹扫气体在反应器室内的晶片套筒外部流动，以最小化壁沉积。 此外，灯模组中各灯的照明顺序可以进一步提高晶片套筒内沉积速率变化的线性。 为了改善均匀性，工艺气体流动的方向可以在横流构型中变化。 将灯排序与多反应器系统中的交叉流处理相结合，可实现高通量沉积，具有良好的膜均匀性和有效利用工艺气体。

公开(公告)号：US20100263587A1

公开(公告)日：2010-10-21

申请号：US12713116

申请日：2010-02-25

申请人： Visweswaren Sivaramakrishnan ,  Kedarnath Sangam ,  Tirunelveli S. Ravi ,  Andrzej Kaszuba ,  Quoc Vinh Truong

发明人： Visweswaren Sivaramakrishnan ,  Kedarnath Sangam ,  Tirunelveli S. Ravi ,  Andrzej Kaszuba ,  Quoc Vinh Truong

IPC分类号： C30B25/10 ,  C30B25/08

CPC分类号： C30B25/12 ,  C30B25/08 ,  C30B25/105 ,  C30B35/005

摘要： An epitaxial reactor enabling simultaneous deposition of thin films on a multiplicity of wafers is disclosed. During deposition, a number of wafers are contained within a wafer sleeve comprising a number of wafer carrier plates spaced closely apart to minimize the process volume. Process gases flow preferentially into the interior volume of the wafer sleeve, which is heated by one or more lamp modules. Purge gases flow outside the wafer sleeve within a reactor chamber to minimize deposition on the walls of the chamber. In addition, sequencing of the illumination of the individual lamps in the lamp module may further improve the linearity of variation in deposition rates within the wafer sleeve. To improve uniformity, the direction of process gas flow may be varied in a cross-flow configuration. Combining lamp sequencing with cross-flow processing in a multiple reactor system enables high throughput deposition with good film uniformities and efficient use of process gases.

摘要翻译： 公开了一种能够在多个晶片上同时沉积薄膜的外延反应器。 在沉积期间，许多晶片被包含在晶片套筒内，其包括间隔开的多个晶片承载板，以最小化处理体积。 工艺气体优先流入由一个或多个灯模块加热的晶片套筒的内部容积。 吹扫气体在反应器室内的晶片套筒外部流动，以最小化腔室壁上的沉积。 此外，灯模组中各灯的照明顺序可以进一步提高晶片套筒内沉积速率变化的线性。 为了改善均匀性，工艺气体流动的方向可以在横流构型中变化。 将灯排序与多反应器系统中的交叉流处理相结合，可实现高通量沉积，具有良好的膜均匀性和有效利用工艺气体。

公开(公告)号：US08673081B2

公开(公告)日：2014-03-18

申请号：US12713116

申请日：2010-02-25

申请人： Visweswaren Sivaramakrishnan ,  Kedarnath Sangam ,  Tirunelveli S. Ravi ,  Andrzej Kaszuba ,  Quoc Vinh Truong

发明人： Visweswaren Sivaramakrishnan ,  Kedarnath Sangam ,  Tirunelveli S. Ravi ,  Andrzej Kaszuba ,  Quoc Vinh Truong

IPC分类号： C30B25/10 ,  C30B25/08

CPC分类号： C30B25/12 ,  C30B25/08 ,  C30B25/105 ,  C30B35/005

摘要： An epitaxial reactor enabling simultaneous deposition of thin films on a multiplicity of wafers is disclosed. During deposition, a number of wafers are contained within a wafer sleeve comprising a number of wafer carrier plates spaced closely apart to minimize the process volume. Process gases flow preferentially into the interior volume of the wafer sleeve, which is heated by one or more lamp modules. Purge gases flow outside the wafer sleeve within a reactor chamber to minimize deposition on the walls of the chamber. In addition, sequencing of the illumination of the individual lamps in the lamp module may further improve the linearity of variation in deposition rates within the wafer sleeve. To improve uniformity, the direction of process gas flow may be varied in a cross-flow configuration. Combining lamp sequencing with cross-flow processing in a multiple reactor system enables high throughput deposition with good film uniformities and efficient use of process gases.

摘要翻译： 公开了一种能够在多个晶片上同时沉积薄膜的外延反应器。 在沉积期间，许多晶片被包含在晶片套筒内，其包括间隔开的多个晶片承载板，以最小化处理体积。 工艺气体优先流入由一个或多个灯模块加热的晶片套筒的内部容积。 吹扫气体在反应器室内的晶片套筒外部流动，以最小化腔室壁上的沉积。 此外，灯模组中各灯的照明顺序可以进一步提高晶片套筒内沉积速率变化的线性。 为了改善均匀性，工艺气体流动的方向可以在横流构型中变化。 将灯排序与多反应器系统中的交叉流处理相结合，可实现高通量沉积，具有良好的膜均匀性和有效利用工艺气体。

公开(公告)号：US08298629B2

公开(公告)日：2012-10-30

申请号：US12392448

申请日：2009-02-25

申请人： Visweswaren Sivaramakrishnan ,  Kedarnath Sangam ,  Tirunelveli S. Ravi ,  Andrzej Kaszuba ,  Quoc Vinh Truong

发明人： Visweswaren Sivaramakrishnan ,  Kedarnath Sangam ,  Tirunelveli S. Ravi ,  Andrzej Kaszuba ,  Quoc Vinh Truong

IPC分类号： C23C8/00 ,  C23C16/00

CPC分类号： C23C16/481 ,  C23C16/0209 ,  C23C16/455 ,  C23C16/4582 ,  C23C16/46 ,  C23C16/463 ,  C23C16/54 ,  C30B25/105 ,  C30B25/12 ,  C30B29/06

摘要： An epitaxial reactor enabling simultaneous deposition of thin films on a multiplicity of wafers is disclosed. During deposition, a number of wafers are contained within a wafer sleeve comprising a number of wafer carrier plates spaced closely apart to minimize the process volume. Process gases flow preferentially into the interior volume of the wafer sleeve, which is heated by one or more lamp modules. Purge gases flow outside the wafer sleeve within a reactor chamber to minimize wall deposition. In addition, sequencing of the illumination of the individual lamps in the lamp module may further improve the linearity of variation in deposition rates within the wafer sleeve. To improve uniformity, the direction of process gas flow may be varied in a cross-flow configuration. Combining lamp sequencing with cross-flow processing in a multiple reactor system enables high throughput deposition with good film uniformities and efficient use of process gases.

摘要翻译： 公开了一种能够在多个晶片上同时沉积薄膜的外延反应器。 在沉积期间，许多晶片被包含在晶片套筒内，其包括间隔开的多个晶片承载板，以最小化处理体积。 工艺气体优先流入由一个或多个灯模块加热的晶片套筒的内部容积。 吹扫气体在反应器室内的晶片套筒外部流动，以最小化壁沉积。 此外，灯模组中各灯的照明顺序可以进一步提高晶片套筒内沉积速率变化的线性。 为了改善均匀性，工艺气体流动的方向可以在横流构型中变化。 将灯排序与多反应器系统中的交叉流处理相结合，可实现高通量沉积，具有良好的膜均匀性和有效利用工艺气体。

公开(公告)号：US6132517A

公开(公告)日：2000-10-17

申请号：US804505

申请日：1997-02-21

申请人： Visweswaren Sivaramakrishnan ,  Tirunelveli S. Ravi ,  Kramadhati V. Ravi

发明人： Visweswaren Sivaramakrishnan ,  Tirunelveli S. Ravi ,  Kramadhati V. Ravi

IPC分类号： H01L21/677 ,  C23C14/56 ,  C23C16/458 ,  H01L21/02 ,  H01L21/205 ,  H01L21/683 ,  C23C16/00

CPC分类号： H01L21/6831 ,  C23C14/568 ,  C23C16/4586

摘要： A dual wafer processing apparatus (4) includes a chamber housing (14) defining an interior and having upper, lower and central portions (18, 20, 16). An electrostatic chuck (34) has electrostatic chucking surfaces (38, 40) on opposite sides. The chuck is rotatably mounted within the chamber housing so that the chucking surfaces face the upper and lower portions of the chamber housing. After a wafer (36) is positioned on a chucking surface, electrostatic forces are used to maintain the wafer secured to the chucking surface. The chuck is then rotated 180.degree. to permit placement of a second wafer on the second chucking surface. Processing of the two wafers occurs simultaneously. Electrostatic chucking surfaces could be replaced by mechanical wafer clamps.

摘要翻译： 双晶片处理设备（4）包括限定内部并具有上部，下部和中心部分（18,20,16）的腔室壳体（14）。 静电吸盘（34）在相对侧具有静电吸附表面（38,40）。 卡盘可旋转地安装在腔室壳体内，使得卡盘表面面对腔室壳体的上部和下部。 在将晶片（36）定位在卡盘表面上之后，使用静电力来保持晶片固定在卡盘表面上。 然后将卡盘旋转180°以允许将第二晶片放置在第二卡盘表面上。 两个晶片的处理同时发生。 静电吸盘表面可以用机械晶片夹来代替。

公开(公告)号：US08900399B2

公开(公告)日：2014-12-02

申请号：US13050807

申请日：2011-03-17

申请人： Tirunelveli S. Ravi ,  Ananda H. Kumar ,  Ashish Asthana ,  Kyle Ross Tantiwong ,  Visweswaren Sivaramakrishnan

发明人： Tirunelveli S. Ravi ,  Ananda H. Kumar ,  Ashish Asthana ,  Kyle Ross Tantiwong ,  Visweswaren Sivaramakrishnan

IPC分类号： C23F1/00 ,  H01L31/18 ,  H01L31/048 ,  H01L31/068

CPC分类号： H01L31/1876 ,  H01L21/68728 ,  H01L31/048 ,  H01L31/068 ,  H01L31/1804 ,  H01L31/1892 ,  Y02E10/50 ,  Y02E10/547 ,  Y02P70/521

摘要： An anodic etching system for simultaneously etching a multiplicity of substrates comprises: an etching tank for containing therein an etchant solution; a power supply connected between a first electrode and a second electrode, the first electrode and the second electrode being immersible in the etchant solution and positioned at opposite ends of the tank; and a plurality of support plates serially arranged between the first electrode and the second electrode and sealed to walls of the tank, wherein each of the plurality of support plates is configured to support at least one of the multiplicity of substrates, and wherein any consecutive pair of the plurality of support plates defines an isolated volume of the tank for containing a portion of the etchant solution. The plurality of support plates may be susceptors configured for holding the multiplicity of substrates in a chemical vapor deposition tool.

摘要翻译： 用于同时蚀刻多个基板的阳极蚀刻系统包括：用于在其中容纳蚀刻剂溶液的蚀刻槽; 连接在第一电极和第二电极之间的电源，所述第一电极和所述第二电极浸入所述蚀刻液中并位于所述槽的相对端; 以及多个支撑板，其串联地布置在所述第一电极和所述第二电极之间并且密封到所述罐的壁，其中所述多个支撑板中的每一个被配置为支撑所述多个基板中的至少一个，并且其中， 所述多个支撑板限定了用于容纳蚀刻剂溶液的一部分的罐的隔离体积。 多个支撑板可以是构造成用于将多个基板保持在化学气相沉积工具中的基座。

公开(公告)号：US20110300715A1

公开(公告)日：2011-12-08

申请号：US13050807

申请日：2011-03-17

申请人： Tirunelveli S. Ravi ,  Ananda H. Kumar ,  Ashish Asthana ,  Visweswaren Sivaramakrishnan

发明人： Tirunelveli S. Ravi ,  Ananda H. Kumar ,  Ashish Asthana ,  Visweswaren Sivaramakrishnan

IPC分类号： H01L21/306 ,  C25F7/00 ,  C25F3/02

CPC分类号： H01L31/1876 ,  H01L21/68728 ,  H01L31/048 ,  H01L31/068 ,  H01L31/1804 ,  H01L31/1892 ,  Y02E10/50 ,  Y02E10/547 ,  Y02P70/521

摘要： A method for fabricating a photovoltaic (PV) cell panel wherein all PV cells are formed simultaneously on a two-dimensional array of monocrystalline silicon mother wafers affixed to a susceptor is disclosed. Porous silicon separation layers are anodized in the surfaces of the mother wafers. The porous film is then smoothed to form a suitable surface for epitaxial film growth. An epitaxial reactor is used to grow n- and p-type films forming the PV cell structures. Contacts to the n- and p-layers are deposited, followed by gluing of a glass layer to the PV cell array. The porous silicon film is then separated by exfoliation in a peeling motion across all the cells attached together above, followed by attaching a strengthening layer on the PV cell array. The array of mother wafers may be reused multiple times, thereby reducing materials costs for the completed solar panels.

摘要翻译： 公开了一种制造光伏（PV）电池板的方法，其中所有PV电池同时形成在固定在基座上的单晶硅母晶片的二维阵列上。 在母晶片的表面上阳极氧化多孔硅分离层。 然后使多孔膜平滑以形成用于外延膜生长的合适表面。 使用外延反应器来生长形成PV电池结构的n型和p型膜。 与n层和p层的接触被沉积，然后将玻璃层粘合到PV电池阵列上。 然后通过剥离运动将多孔硅膜分离穿过所有附着在上面的细胞，随后在PV电池阵列上附着一层强化层。 母晶片的阵列可以重复使用多次，从而减少完成的太阳能电池板的材料成本。

公开(公告)号：US08481357B2

公开(公告)日：2013-07-09

申请号：US12766765

申请日：2010-04-23

申请人： Ananda H. Kumar ,  Tirunelveli S. Ravi ,  Vidyut Gopal

发明人： Ananda H. Kumar ,  Tirunelveli S. Ravi ,  Vidyut Gopal

IPC分类号： H01L21/00

CPC分类号： H01L31/02167 ,  C03C3/091 ,  C03C3/097 ,  C03C8/08 ,  C03C8/14 ,  H01L31/02168 ,  H01L31/022425 ,  H01L31/02363 ,  H01L31/028 ,  H01L31/048 ,  H01L31/0682 ,  H01L31/072 ,  H01L31/0725 ,  H01L31/0747 ,  H01L31/1804 ,  H01L31/1896 ,  Y02E10/547 ,  Y02P70/521

摘要： A method for fabricating a photovoltaic (PV) cell panel wherein all PV cells are formed simultaneously on a two-dimensional array of monocrystalline silicon mother wafers affixed to a susceptor is disclosed. Porous silicon separation layers are anodized in the surfaces of the mother wafers. The porous film is then smoothed to form a suitable surface for epitaxial film growth. An epitaxial reactor is used to grow n- and p-type films forming the PV cell structures. A glass/ceramic handling layer is then formed on the PV cell structures. The PV cell structures with handling layers are then exfoliated from the mother wafer. The array of mother wafers may be reused multiple times, thereby reducing materials costs for the completed solar panels. The glass/ceramic handling layers provide structural integrity to the thin epitaxial solar cells during the separation process and subsequent handling.

摘要翻译： 公开了一种制造光伏（PV）电池板的方法，其中所有PV电池同时形成在固定在基座上的单晶硅母晶片的二维阵列上。 在母晶片的表面上阳极氧化多孔硅分离层。 然后使多孔膜平滑以形成用于外延膜生长的合适表面。 使用外延反应器来生长形成PV电池结构的n型和p型膜。 然后在PV电池结构上形成玻璃/陶瓷处理层。 然后将具有处理层的PV电池结构从母晶片剥离。 母晶片的阵列可以重复使用多次，从而减少完成的太阳能电池板的材料成本。 玻璃/陶瓷处理层在分离过程和后续处理期间为薄的外延太阳能电池提供结构完整性。