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1.
公开(公告)号:US11688673B2
公开(公告)日:2023-06-27
申请号:US17314160
申请日:2021-05-07
申请人: WOLFSPEED, INC.
发明人: Marvin Marbell , Arthur Pun , Jeremy Fisher , Ulf Andre , Alexander Komposch
IPC分类号: H01L23/498 , H01L23/66
CPC分类号: H01L23/49811 , H01L23/66 , H01L2223/6611 , H01L2223/6644
摘要: An RF transistor package includes a metal submount; a transistor die mounted to the metal submount; and a surface mount IPD component mounted to the metal submount. The surface mount IPD component includes a dielectric substrate that includes a top surface and a bottom surface and at least a first pad and a second pad arranged on a top surface of the surface mount IPD component; at least one surface mount device includes a first terminal and a second terminal, the first terminal of the surface mount device mounted to the first pad and the second terminal mounted to the second pad; at least one of the first terminal and the second terminal being configured to be isolated from the metal submount by the dielectric substrate; and at least one wire bond bonded to the at least one of the first pad and the second pad.
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公开(公告)号:US20230019230A1
公开(公告)日:2023-01-19
申请号:US17935509
申请日:2022-09-26
申请人: Wolfspeed, Inc.
发明人: Sung Chul Joo , Alexander Komposch , Brian William Condie , Benjamin Law , Jae Hyung Jeremiah Park
IPC分类号: H01L23/00
摘要: A semiconductor device package includes a substrate, a silicon (Si) or silicon carbide (SiC) semiconductor die, and a metal layer on a surface of the semiconductor die. The metal layer includes a bonding surface that is attached to a surface of the substrate by a die attach material. The bonding surface includes opposing edges that extend along a perimeter of the semiconductor die, and one or more non-orthogonal corners that are configured to reduce stress at an interface between the bonding surface and the die attach material. Related devices and fabrication methods are also discussed.
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3.
公开(公告)号:US20230421119A1
公开(公告)日:2023-12-28
申请号:US17849206
申请日:2022-06-24
申请人: Wolfspeed, Inc.
发明人: Alexander Komposch , Eng Wah Woo , Soon Lee Liew , Kok Meng Kam
CPC分类号: H03F3/245 , H03F3/195 , H01L23/66 , H03F1/523 , H03F2200/447 , H03F2200/451 , H01L2223/6655 , H01L2223/6611 , H01L23/36
摘要: A semiconductor device package includes an interconnect structure with a first surface having at least one die thereon and a second surface that is opposite the first surface and is configured to be coupled to an external device. A protective structure on the first surface of the interconnect structure exposes a heat dissipating surface facing away from the interconnect structure in one or more directions. Related devices and fabrication methods are also discussed.
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公开(公告)号:US11533024B2
公开(公告)日:2022-12-20
申请号:US16911757
申请日:2020-06-25
申请人: Wolfspeed, Inc.
发明人: Kwangmo Chris Lim , Basim Noori , Qianli Mu , Marvin Marbell , Scott Sheppard , Alexander Komposch
IPC分类号: H01L23/047 , H03F3/19 , H01L23/367 , H01L23/66 , H01L23/00 , H01L25/16 , H03F1/02 , H03F1/56
摘要: RF transistor amplifiers include an RF transistor amplifier die having a Group III nitride-based semiconductor layer structure and a plurality of gate terminals, a plurality of drain terminals, and at least one source terminal that are each on an upper surface of the semiconductor layer structure, an interconnect structure on an upper surface of the RF transistor amplifier die, and a coupling element between the RF transistor amplifier die and the interconnect structure that electrically connects the gate terminals, the drain terminals and the source terminal to the interconnect structure.
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公开(公告)号:US11356070B2
公开(公告)日:2022-06-07
申请号:US16888957
申请日:2020-06-01
申请人: Wolfspeed, Inc.
发明人: Kwangmo Chris Lim , Basim Noori , Qianli Mu , Marvin Marbell , Scott Sheppard , Alexander Komposch
摘要: RF transistor amplifiers include an RF transistor amplifier die having a semiconductor layer structure, a coupling element on an upper surface of the semiconductor layer structure, and an interconnect structure on an upper surface of the coupling element so that the RF transistor amplifier die and the interconnect structure are in a stacked arrangement. The coupling element includes a first shielded transmission line structure.
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公开(公告)号:US12051669B2
公开(公告)日:2024-07-30
申请号:US17494909
申请日:2021-10-06
申请人: Wolfspeed, Inc.
IPC分类号: H01L23/00 , H01L21/768 , H01L23/48
CPC分类号: H01L24/29 , H01L21/76898 , H01L23/481 , H01L24/05 , H01L24/27 , H01L2224/02372 , H01L2224/02381 , H01L2224/05569 , H01L2224/2745 , H01L2224/29025 , H01L2224/29084 , H01L2224/29111 , H01L2224/29139 , H01L2224/29144 , H01L2224/29147 , H01L2224/29155 , H01L2224/29164 , H01L2224/29166 , H01L2224/29169 , H01L2224/29184 , H01L2924/10272 , H01L2924/13064 , H01L2924/13091
摘要: A semiconductor device package includes a package substrate having a die attach region, a silicon carbide (SiC) substrate having a first surface including a semiconductor device layer thereon and a second surface that is opposite the first surface, and a die attach metal stack. The die attach metal stack includes a sputtered die attach material layer that attaches the second surface of the SiC substrate to the die attach region of the package substrate, where the sputtered die attach material layer comprises a void percent of about 15% or less. The sputtered die attach material layer may be formed using a sputter gas including at least one of krypton (Kr), xenon (Xe), or radon (Rn). The die attach metal stack may further include a metal interlayer that prevent contacts with a first barrier metal layer during a phase transition of the die attach material layer.
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公开(公告)号:US20230253359A1
公开(公告)日:2023-08-10
申请号:US17665191
申请日:2022-02-04
申请人: Wolfspeed, Inc.
CPC分类号: H01L24/29 , H01L29/2003 , H01L29/1608 , H01L29/7786
摘要: A semiconductor die includes a silicon carbide (SiC) substrate and a metal stack. The SiC substrate has a first surface including a semiconductor layer thereon and a second surface that is opposite the first surface. The metal stack has an upper surface that attaches to the second surface of the SiC substrate and a lower surface that is opposite the upper surface. The metal stack includes a eutectic solder layer and a noble metal layer on the eutectic solder layer. The noble metal layer comprises a final metal layer on the lower surface.
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公开(公告)号:US20230162991A1
公开(公告)日:2023-05-25
申请号:US17532027
申请日:2021-11-22
申请人: Wolfspeed, Inc.
IPC分类号: H01L21/56 , H01L23/31 , H01L23/495
CPC分类号: H01L21/565 , H01L23/3114 , H01L23/49541
摘要: A package mold according to some embodiments includes a first mold body and a second mold body, a mold cavity in the first mold body, a gate in a first side of the mold cavity for supplying liquid mold compound into the mold cavity, a longitudinal vent for releasing gas from the mold cavity in a second side of the mold cavity opposite the first side of the mold cavity, and a transverse vent for releasing gas from the mold cavity in a third side of the mold cavity that extends between the first and second sides of the mold cavity. Methods of packaging an electronic device using the package mold and resulting packaged devices are also disclosed.
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公开(公告)号:US11437362B2
公开(公告)日:2022-09-06
申请号:US16589624
申请日:2019-10-01
申请人: Wolfspeed, Inc.
IPC分类号: H01L23/495 , H01L25/00 , H01L23/66 , H01L23/36 , H01L23/538 , H01L25/065
摘要: A multi-cavity package includes a single metal flange having first and second opposing main surfaces. The multi-cavity package also includes a circuit board attached to the first main surface of the single metal flange. The circuit board includes a first surface facing the single metal flange, and a second surface facing away from the first surface. The circuit board also includes a plurality of openings exposing different regions of the first main surface of the single metal flange. The circuit board also includes a lateral extension that overhangs the single metal flange. A corresponding method of manufacturing is also provided.
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公开(公告)号:US11367696B2
公开(公告)日:2022-06-21
申请号:US16737188
申请日:2020-01-08
申请人: Wolfspeed, Inc.
发明人: Simon Ward , Richard Wilson , Alexander Komposch
摘要: RF amplifiers are provided that include a submount such as a thermally conductive flange. A dielectric substrate is mounted on an upper surface of the submount, the dielectric substrate having a first outer sidewall, a second outer sidewall that is opposite and substantially parallel to the first outer sidewall, and an interior opening. An RF amplifier die is mounted on the submount within the interior opening of the dielectric substrate, where a longitudinal axis of the RF amplifier die defines a first axis. The RF amplifier die is positioned so that a first angle defined by the intersection of the first axis with the first outer sidewall is between 5° and 45°. The dielectric substrate may be a ceramic substrate or a dielectric layer of a printed circuit board.
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