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公开(公告)号:US11881464B2
公开(公告)日:2024-01-23
申请号:US17210674
申请日:2021-03-24
Applicant: Wolfspeed, Inc.
Inventor: Basim Noori , Marvin Marbell , Kwangmo Chris Lim , Qianli Mu
IPC: H01L23/66 , H01L23/538 , H01L25/065 , H01L29/16 , H03F3/193 , H03F3/195 , H03F3/213
CPC classification number: H01L23/66 , H01L23/5384 , H01L23/5386 , H01L25/0657 , H01L29/1608 , H03F3/193 , H03F3/195 , H03F3/213 , H01L2223/6611 , H01L2223/6655
Abstract: A radio frequency (RF) power amplifier device package includes a substrate and a first die attached to the substrate at a bottom surface of the first die. The first die includes top gate or drain contacts on a top surface of the first die opposite the bottom surface. At least one of the top gate or drain contacts is electrically connected to a respective bottom gate or drain contact on the bottom surface of the first die by a respective conductive via structure. An integrated interconnect structure, which is on the first die opposite the substrate, includes a first contact pad on the top gate contact or the top drain contact of the first die, and at least one second contact pad connected to a package lead, a contact of a second die, impedance matching circuitry, and/or harmonic termination circuitry.
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公开(公告)号:US11533024B2
公开(公告)日:2022-12-20
申请号:US16911757
申请日:2020-06-25
Applicant: Wolfspeed, Inc.
Inventor: Kwangmo Chris Lim , Basim Noori , Qianli Mu , Marvin Marbell , Scott Sheppard , Alexander Komposch
IPC: H01L23/047 , H03F3/19 , H01L23/367 , H01L23/66 , H01L23/00 , H01L25/16 , H03F1/02 , H03F1/56
Abstract: RF transistor amplifiers include an RF transistor amplifier die having a Group III nitride-based semiconductor layer structure and a plurality of gate terminals, a plurality of drain terminals, and at least one source terminal that are each on an upper surface of the semiconductor layer structure, an interconnect structure on an upper surface of the RF transistor amplifier die, and a coupling element between the RF transistor amplifier die and the interconnect structure that electrically connects the gate terminals, the drain terminals and the source terminal to the interconnect structure.
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公开(公告)号:US11356070B2
公开(公告)日:2022-06-07
申请号:US16888957
申请日:2020-06-01
Applicant: Wolfspeed, Inc.
Inventor: Kwangmo Chris Lim , Basim Noori , Qianli Mu , Marvin Marbell , Scott Sheppard , Alexander Komposch
Abstract: RF transistor amplifiers include an RF transistor amplifier die having a semiconductor layer structure, a coupling element on an upper surface of the semiconductor layer structure, and an interconnect structure on an upper surface of the coupling element so that the RF transistor amplifier die and the interconnect structure are in a stacked arrangement. The coupling element includes a first shielded transmission line structure.
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4.
公开(公告)号:US11936342B2
公开(公告)日:2024-03-19
申请号:US17313567
申请日:2021-05-06
Applicant: Wolfspeed, Inc.
Inventor: Marvin Marbell , Jonathan Chang , Haedong Jang , Qianli Mu , Michael LeFevre , Jeremy Fisher , Basim Noori
IPC: H03F1/02 , H01L23/498 , H01L23/66 , H03F1/56
CPC classification number: H03F1/0288 , H01L23/49838 , H01L23/66 , H03F1/565 , H01L2223/6611 , H01L2223/6655
Abstract: A semiconductor device package includes a plurality of input leads and an output lead, a plurality of transistor amplifier dies having inputs respectively coupled to the plurality of input leads, and a combination circuit configured to combine output signals received from the plurality of transistor amplifier dies and output a combined signal to the output lead.
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5.
公开(公告)号:US20240088838A1
公开(公告)日:2024-03-14
申请号:US18517065
申请日:2023-11-22
Applicant: Wolfspeed, Inc.
Inventor: Basim Noori , Marvin Marbell , Qianli Mu , Kwangmo Chris Lim , Michael E. Watts , Mario Bokatius , Jangheon Kim
IPC: H03F1/56 , H01L23/00 , H01L23/48 , H01L23/498 , H01L29/778 , H03F3/193
CPC classification number: H03F1/565 , H01L23/481 , H01L23/49822 , H01L24/08 , H01L29/778 , H03F3/193 , H01L2224/08225 , H03F2200/222 , H03F2200/387 , H03F2200/451
Abstract: RF transistor amplifiers include a Group III nitride-based RF transistor amplifier die that includes a semiconductor layer structure, a conductive source via that is connected to a source region of the Group III nitride-based RF transistor amplifier die, the conductive source via extending through the semiconductor layer structure, and an additional conductive via that extends through the semiconductor layer structure. A first end of the additional conductive via is connected to a first external circuit and a second end of the additional conductive via that is opposite the first end is connected to a first matching circuit.
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公开(公告)号:US11749726B2
公开(公告)日:2023-09-05
申请号:US17325666
申请日:2021-05-20
Applicant: Wolfspeed, Inc.
Inventor: Kyle Bothe , Jeremy Fisher , Matt King , Jia Guo , Qianli Mu , Scott Sheppard
IPC: H01L29/40 , H01L29/66 , H01L29/20 , H01L29/778
CPC classification number: H01L29/404 , H01L29/2003 , H01L29/402 , H01L29/66462 , H01L29/778 , H01L29/7786
Abstract: A transistor device includes a semiconductor layer, source and drain contacts on the semiconductor layer, a gate contact on the semiconductor layer between the source and drain contacts, and a field plate over the semiconductor layer between the gate contact and the drain contact. The transistor device includes a first electrical connection between the field plate and the source contact that is outside an active region of the transistor device, and a second electrical connection between the field plate and the source contact.
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公开(公告)号:US20230040260A1
公开(公告)日:2023-02-09
申请号:US17395035
申请日:2021-08-05
Applicant: Wolfspeed, Inc.
Inventor: Young-Youl Song , Zulhazmi A. Mokhti , John Wood , Qianli Mu , Jeremy Fisher
Abstract: A circuit includes a field effect transistor (FET), a reference transistor having an output coupled to an output of the FET, an active bias circuit coupled to the reference transistor and configured to generate an input signal for the reference transistor in response to a change in drain current of the reference transistor due to carrier trapping and to apply the input signal to an input of the reference transistor, and a summing node coupled to an input of the FET and to the input of the reference transistor. The summing node adds the input signal to an input signal of the FET to compensate the carrier trapping effect.
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公开(公告)号:US20240266348A1
公开(公告)日:2024-08-08
申请号:US18105586
申请日:2023-02-03
Applicant: Wolfspeed, Inc.
Inventor: Fabian Radulescu , Basim Noori , Scott Sheppard , Qianli Mu , Jeremy Fisher , Dan Namishia
IPC: H01L27/085 , H01L23/00 , H01L23/528
CPC classification number: H01L27/085 , H01L23/528 , H01L24/06 , H01L24/13 , H01L24/16 , H01L2224/0603 , H01L2224/0615 , H01L2224/13014 , H01L2224/13147 , H01L2224/1403 , H01L2224/14051 , H01L2224/1415 , H01L2224/16227
Abstract: A transistor device includes a substrate and a plurality of transistor unit cells arranged in parallel on the substrate. Each of the transistor unit cells includes a source contact, a drain contact, and a gate finger between the source contact and the drain contact. The gate finger extends in a first direction and has a first end and a second end. The transistor device further includes a first solder bump on the transistor device that is within a periphery of the active region of the device and is electrically connected to the gate finger of a first one of the unit cells at a feed point that is between the first end and the second end of the gate finger.
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9.
公开(公告)号:US20240071962A1
公开(公告)日:2024-02-29
申请号:US18502334
申请日:2023-11-06
Applicant: Wolfspeed, Inc.
Inventor: Basim Noori , Marvin Marbell , Kwangmo Chris Lim , Qianli Mu
IPC: H01L23/66 , H01L23/538 , H01L25/065 , H01L29/16 , H03F3/193 , H03F3/195 , H03F3/213
CPC classification number: H01L23/66 , H01L23/5384 , H01L23/5386 , H01L25/0657 , H01L29/1608 , H03F3/193 , H03F3/195 , H03F3/213 , H01L2223/6611 , H01L2223/6655
Abstract: A radio frequency (RF) power amplifier device package includes a substrate and a first die attached to the substrate at a bottom surface of the first die. The first die includes top gate or drain contacts on a top surface of the first die opposite the bottom surface. At least one of the top gate or drain contacts is electrically connected to a respective bottom gate or drain contact on the bottom surface of the first die by a respective conductive via structure. An integrated interconnect structure, which is on the first die opposite the substrate, includes a first contact pad on the top gate contact or the top drain contact of the first die, and at least one second contact pad connected to a package lead, a contact of a second die, impedance matching circuitry, and/or harmonic termination circuitry.
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10.
公开(公告)号:US11742304B2
公开(公告)日:2023-08-29
申请号:US17379420
申请日:2021-07-19
Applicant: Wolfspeed, Inc.
Inventor: Frank Trang , Qianli Mu , Haedong Jang , Zulhazmi Mokhti
IPC: H01L23/66 , H01L23/00 , H01L29/423 , H01L23/482
CPC classification number: H01L23/66 , H01L23/4824 , H01L24/09 , H01L24/49 , H01L29/42356 , H01L2223/6611
Abstract: A multi-cell transistor includes a semiconductor structure, a plurality of unit cell transistors that are electrically connected in parallel, each unit cell transistor extending in a first direction in the semiconductor structure, wherein the unit cell transistors are spaced apart from each other along a second direction, and an isolation structure that is positioned between a first group of the unit cell transistors and a second group of the unit cell transistors and that extends above the semiconductor structure.
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