Prioritization of out-of-order data transfers on shared data bus
    1.
    发明授权
    Prioritization of out-of-order data transfers on shared data bus 有权
    共享数据总线上无序数据传输的优先级

    公开(公告)号:US07392353B2

    公开(公告)日:2008-06-24

    申请号:US11004199

    申请日:2004-12-03

    IPC分类号: G06F13/18 G06F9/312

    CPC分类号: G06F13/1626

    摘要: Uncontested priority is provided to out-of-order data transfers over in-order data transfers on a data bus shared by a plurality of memory requesters. By always granting priority to out-of-order transfers such as deferred read data transfers over in-order transfers such as write and/or cache-to-cache data transfers, it is assured that no newer command or transaction ever negatively affects the latency of an older command or transaction.

    摘要翻译: 无条件优先级被提供给由多个存储器请求者共享的数据总线上的按顺序数据传输的无序数据传输。 通过总是优先处理诸如写入和/或缓存到高速缓存数据传输之类的按顺序传输的延迟读取数据传输的无序传输,确保没有较新的命令或事务对延迟产生负面影响 的旧命令或事务。

    Early return indication for read exclusive requests in shared memory architecture
    2.
    发明授权
    Early return indication for read exclusive requests in shared memory architecture 有权
    在共享内存架构中读取独占请求的早期返回指示

    公开(公告)号:US07536514B2

    公开(公告)日:2009-05-19

    申请号:US11225655

    申请日:2005-09-13

    IPC分类号: G06F12/06

    CPC分类号: G06F13/1663 G06F12/0817

    摘要: An early return indication is used to notify a first communications interface, prior to a response being received from any of a plurality of sources coupled to a second communications interface, that the return data can be used by the first communications interface when it is received thereby from a source of the return data if the source has an exclusive copy of the return data. By doing so, the first communications interface can often prepare for forwarding the return data over its associated communication link such that the data can be forwarded with little or no latency once the data is retrieved from its source, and may be able to initiate the return of data over the communication link prior to all responses being received from the other sources. The early return indication may also serves as an early coherency indication in that the first communications interface is no longer required to wait for updating of a coherency directory to complete prior to forwarding the return data over the communication link.

    摘要翻译: 早期返回指示用于在从与第二通信接口耦合的多个源中的任一个接收到响应之前通知第一通信接口,使得第一通信接口在接收时可以由第一通信接口使用返回数据 来自返回数据的源,如果源具有返回数据的排他副本。 通过这样做,第一通信接口通常可以准备通过其相关联的通信链路转发返回数据,使得一旦数据从源中检索出来,数据可以很少或没有等待时间转发,并且可能能够启动返回 在从其他来源接收到所有响应之前通过通信链路的数据。 早期返回指示还可以用作早期一致性指示,因为在通过通信链路转发返回数据之前,第一通信接口不再需要等待更新相干性目录来完成。

    Early coherency indication for return data in shared memory architecture
    3.
    发明授权
    Early coherency indication for return data in shared memory architecture 失效
    共享内存架构中返回数据的早期一致性指示

    公开(公告)号:US08010682B2

    公开(公告)日:2011-08-30

    申请号:US11023706

    申请日:2004-12-28

    IPC分类号: G06F15/16 G06F13/00

    CPC分类号: G06F12/0817 G06F2212/507

    摘要: In a shared memory architecture, early coherency indication is used to notify a communications interface, prior to the data for a memory request is returned, and prior to updating a coherency directory in response to the memory request, that the return data can be used by the communications interface when it is received thereby from a source of the return data. By doing so, the communications interface can often begin forwarding the return data over its associated communication link with little or no latency once the data is retrieved from its source. In addition, the communications interface is often no longer required to wait for updating of the coherency directory to complete prior to forwarding the return data over the communication link. As such, the overall latency for handling the memory request is typically reduced.

    摘要翻译: 在共享存储器架构中,早期一致性指示用于在返回存储器请求的数据之前以及在响应于存储器请求更新一致性目录之前通知通信接口,返回数据可以由 当从返回数据的来源接收通信接口时。 通过这样做,一旦数据从其源中检索,通信接口通常可以在几乎没有或没有延迟的情况下开始转发其相关联的通信链路上的返回数据。 此外,通常不需要通信接口在通过通信链路转发返回数据之前等待更新相干性目录来完成。 因此,处理存储器请求的总体延迟通常减少。

    Prioritization of out-of-order data transfers on shared data bus
    4.
    发明授权
    Prioritization of out-of-order data transfers on shared data bus 有权
    共享数据总线上无序数据传输的优先级

    公开(公告)号:US07890708B2

    公开(公告)日:2011-02-15

    申请号:US12029630

    申请日:2008-02-12

    IPC分类号: G06F12/00

    CPC分类号: G06F13/1626

    摘要: Uncontested priority is provided to out-of-order data transfers over in-order data transfers on a data bus shared by a plurality of memory requesters. By always granting priority to out-of-order transfers such as deferred read data transfers over in-order transfers such as write and/or cache-to-cache data transfers, it is assured that no newer command or transaction ever negatively affects the latency of an older command or transaction.

    摘要翻译: 无条件优先级被提供给由多个存储器请求者共享的数据总线上的按顺序数据传输的无序数据传输。 通过总是优先处理诸如写入和/或缓存到高速缓存数据传输之类的按顺序传输的延迟读取数据传输的无序传输,确保没有较新的命令或事务对延迟产生负面影响 的旧命令或事务。

    PRIORITIZATION OF OUT-OF-ORDER DATA TRANSFERS ON SHARED DATA BUS
    5.
    发明申请
    PRIORITIZATION OF OUT-OF-ORDER DATA TRANSFERS ON SHARED DATA BUS 有权
    共享数据总线上超出数据传输的优先级

    公开(公告)号:US20080140893A1

    公开(公告)日:2008-06-12

    申请号:US12029630

    申请日:2008-02-12

    IPC分类号: G06F13/36 G06F12/08

    CPC分类号: G06F13/1626

    摘要: Uncontested priority is provided to out-of-order data transfers over in-order data transfers on a data bus shared by a plurality of memory requesters. By always granting priority to out-of-order transfers such as deferred read data transfers over in-order transfers such as write and/or cache-to-cache data transfers, it is assured that no newer command or transaction ever negatively affects the latency of an older command or transaction.

    摘要翻译: 无条件优先级被提供给由多个存储器请求者共享的数据总线上的按顺序数据传输的无序数据传输。 通过总是优先处理诸如写入和/或缓存到高速缓存数据传输之类的按顺序传输的延迟读取数据传输的无序传输,确保没有较新的命令或事务对延迟产生负面影响 的旧命令或事务。

    Reducing Memory Fetch Latency Using Next Fetch Hint
    6.
    发明申请
    Reducing Memory Fetch Latency Using Next Fetch Hint 审中-公开
    使用下一个提取提示减少内存提取延迟

    公开(公告)号:US20090271578A1

    公开(公告)日:2009-10-29

    申请号:US12108019

    申请日:2008-04-23

    IPC分类号: G06F12/00

    摘要: In one aspect, a processor is provided. The processor may include logic, coupled to the processor, and to issue a currently issued memory fetch over a processor bus. The currently issued memory fetch may include a next fetch hint that may include information about a next memory fetch.

    摘要翻译: 在一个方面,提供一种处理器。 处理器可以包括耦合到处理器的逻辑,并且通过处理器总线发布当前发布的存储器提取。 当前发行的存储器提取可以包括可以包括关于下一个存储器提取的信息的下一个提取提示。

    Early header CRC in data response packets with variable gap count
    7.
    发明申请
    Early header CRC in data response packets with variable gap count 审中-公开
    数据响应报文中的早期报头CRC可变间隙计数

    公开(公告)号:US20090268736A1

    公开(公告)日:2009-10-29

    申请号:US12108637

    申请日:2008-04-24

    IPC分类号: H04L12/56

    摘要: A method is provided for processing commands issued by a processor over a bus. The method includes the steps of (1) transmitting the command to a remote node to obtain access to data required to complete the command; (2) receiving from the remote node a response packet including a header and a header CRC; (3) validating the response packet based on the header CRC; and (4) before receiving the data required to complete the command, arranging to return the data to the processor over the bus.

    摘要翻译: 提供了一种处理由总线发出的命令的方法。 该方法包括以下步骤:(1)将命令发送到远程节点以获得对完成命令所需的数据的访问; (2)从远程节点接收包括报头和报头CRC的响应分组; (3)基于报头CRC验证响应分组; 和(4)在接收完成命令所需的数据之前,安排通过总线将数据返回到处理器。

    Early header CRC in data response packets with variable gap count
    10.
    发明申请
    Early header CRC in data response packets with variable gap count 审中-公开
    数据响应报文中的早期报头CRC可变间隙计数

    公开(公告)号:US20090271532A1

    公开(公告)日:2009-10-29

    申请号:US12108744

    申请日:2008-04-24

    IPC分类号: G06F13/14

    CPC分类号: G06F11/1004

    摘要: A method is provided for processing a command issued by a processor over a bus. The method includes (1) transmitting the command to a remote node to obtain access to data required to complete the command; (2) receiving from the remote node a response packet including a header and a header CRC; (3) validating the response packet including the header and the header CRC; (4) loading a timer to run until data required to complete the command is received or the timer expires; and (5) before receiving the data required to complete the command, arranging to return the data to the processor over the bus.

    摘要翻译: 提供了一种用于处理由总线发出的处理器的命令的方法。 该方法包括(1)将命令发送到远程节点以获得完成命令所需的数据; (2)从远程节点接收包括报头和报头CRC的响应分组; (3)验证包括报头和报头CRC的响应报文; (4)加载定时器运行,直到接收完成命令所需的数据或定时器到期; 和(5)在接收完成命令所需的数据之前,安排通过总线将数据返回给处理器。