Non-volatile semiconductor memory device

    公开(公告)号:US10032512B2

    公开(公告)日:2018-07-24

    申请号:US15641329

    申请日:2017-07-05

    Abstract: A non-volatile semiconductor memory device includes a memory array 20, including a plurality of memory elements; a selection part, selecting the memory elements of the memory array based on address data; a mode selection part 30, selecting any one of a RAM mode and a flash mode, where the RAM mode is a mode adapted to overwrite data of the memory element according to writing data, and the flash mode is a mode adapted to overwrite data of the memory element when the writing data is a first value and prohibit overwrite when the writing data is a second value; and a write control part, writing the writing data to the selected memory element according to the RAM mode or the flash mode selected by the mode selection part 30.

    Write method for resistive memory

    公开(公告)号:US11520526B2

    公开(公告)日:2022-12-06

    申请号:US17337003

    申请日:2021-06-02

    Abstract: A write method for a resistive memory including a storage array, a control circuit and an access circuit is provided. The control circuit receives an external command to activate the access circuit to access the storage array. The write method includes determining whether the external command is ready to perform a write operation for the storage array; generating a first operation voltage group to the access circuit when the external command does not perform the write operation for the storage array; reading a count value of a block that corresponds to a write address when the external command performs the write operation for the storage array, wherein the count value indicates the number of times that the block corresponding to the write address performs the write operation; and generating a second operation voltage group to the access circuit according to the count value of the block.

    DATA SENSING APPARATUS
    3.
    发明申请

    公开(公告)号:US20170365336A1

    公开(公告)日:2017-12-21

    申请号:US15185037

    申请日:2016-06-17

    Abstract: A data sensing apparatus adapted for sensing read-out data of a memory apparatus includes a sensing reference voltage generator, a sensing reference current generator, and a sense amplifier. The sensing reference voltage generator receives a reference voltage, generates a reference current according to the reference voltage and a control signal, and generates a sensing reference voltage according to the reference current. The sensing reference current generator receives the sensing reference voltage, and generates a sensing reference current according to the sensing reference voltage and the control signal. The sense amplifier receives the sensing reference current and a read-out current from the selected memory cell, and senses a current difference between the sensing reference current and the read-out current to generate the read-out data.

    Memory storage apparatus with dynamic data repair mechanism and method of dynamic data repair thereof

    公开(公告)号:US11010245B2

    公开(公告)日:2021-05-18

    申请号:US16455769

    申请日:2019-06-28

    Abstract: The disclosure is directed to a memory storage apparatus having a dynamic data repair mechanism. The memory storage apparatus includes a connection interface; a memory array; and a memory control circuit configured at least to: receive, from the connection interface, a write command which includes a user data and an address of the user data; encode the user data as a codeword which includes the user data and parity bits; write the codeword, in a first memory location of the memory array, as a written codeword; perform a read procedure of the written codeword to determine whether the written codeword is erroneously written; and store a redundant codeword of the user data in a second memory location in response to having determined that the written codeword is erroneously written.

    MEMORY STORAGE APPARATUS WITH DYNAMIC DATA REPAIR MECHANISM AND METHOD OF DYNAMIC DATA REPAIR THEREOF

    公开(公告)号:US20190391874A1

    公开(公告)日:2019-12-26

    申请号:US16455769

    申请日:2019-06-28

    Abstract: The disclosure is directed to a memory storage apparatus having a dynamic data repair mechanism. The memory storage apparatus includes a connection interface; a memory array; and a memory control circuit configured at least to: receive, from the connection interface, a write command which includes a user data and an address of the user data; encode the user data as a codeword which includes the user data and parity bits; write the codeword, in a first memory location of the memory array, as a written codeword; perform a read procedure of the written codeword to determine whether the written codeword is erroneously written; and store a redundant codeword of the user data in a second memory location in response to having determined that the written codeword is erroneously written.

    Resistive memory
    7.
    发明授权

    公开(公告)号:US11055021B2

    公开(公告)日:2021-07-06

    申请号:US16353339

    申请日:2019-03-14

    Abstract: A resistive memory including a storage array, a storage circuit, a control circuit, a voltage generation circuit and an access circuit is provided. The storage array includes a plurality of blocks. Each block includes a plurality of memory cells. The storage circuit stores a plurality of count values. Each of the count values indicates the number of times that a corresponding block performs a write operation. The control circuit generates a control signal according to the count values when an external command is a write command. The voltage generation circuit provides an operation voltage group according to the control signal. The access circuit accesses the storage array according to the operation voltage group.

    Encoding method and a memory storage apparatus using the same

    公开(公告)号:US10372535B2

    公开(公告)日:2019-08-06

    申请号:US15688865

    申请日:2017-08-29

    Abstract: An encoding method for a memory storage apparatus adopting a Lien ECC scheme is provided. The memory storage apparatus comprises an ECC encoder using a Lien Code. The encoding method includes: receiving a first data or a second data which is one's complement of the first data; and performing an encoding operation based on the Lien Code by the ECC encoder. The encoding operation includes: if the first data is received, generating a first codeword according to the first data; and if the second data is received, generating a second codeword which is one's complement of the first codeword according to the second data. In addition, a memory storage apparatus using the encoding method based on the Lien Code is also provided.

    NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
    9.
    发明申请

    公开(公告)号:US20180012655A1

    公开(公告)日:2018-01-11

    申请号:US15641329

    申请日:2017-07-05

    Abstract: A non-volatile semiconductor memory device includes a memory array 20, including a plurality of memory elements; a selection part, selecting the memory elements of the memory array based on address data; a mode selection part 30, selecting any one of a RAM mode and a flash mode, where the RAM mode is a mode adapted to overwrite data of the memory element according to writing data, and the flash mode is a mode adapted to overwrite data of the memory element when the writing data is a first value and prohibit overwrite when the writing data is a second value; and a write control part, writing the writing data to the selected memory element according to the RAM mode or the flash mode selected by the mode selection part 30.

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