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公开(公告)号：US11520526B2
公开(公告)日：2022-12-06
申请号：US17337003
申请日：2021-06-02
发明人： Ping-Kun Wang , Shao-Ching Liao , Chien-Min Wu , Chia Hua Ho , Frederick Chen , He-Hsuan Chao , Seow-Fong Lim
摘要： A write method for a resistive memory including a storage array, a control circuit and an access circuit is provided. The control circuit receives an external command to activate the access circuit to access the storage array. The write method includes determining whether the external command is ready to perform a write operation for the storage array; generating a first operation voltage group to the access circuit when the external command does not perform the write operation for the storage array; reading a count value of a block that corresponds to a write address when the external command performs the write operation for the storage array, wherein the count value indicates the number of times that the block corresponding to the write address performs the write operation; and generating a second operation voltage group to the access circuit according to the count value of the block.
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公开(公告)号：US20190221260A1
公开(公告)日：2019-07-18
申请号：US16181372
申请日：2018-11-06
发明人： Ping-Kun Wang , Shao-Ching Liao , Yu-Ting Chen , Ming-Che Lin , Chien-Min Wu , Chia-Hua Ho
IPC分类号： G11C13/00
CPC分类号： G11C13/0038 , G11C13/0004 , G11C13/004 , G11C13/0064 , G11C2013/0045
摘要： A power on reset method for a resistive memory storage device is provided and includes performing a forming procedure on a memory cell of the resistive memory storage device. The forming procedure includes applying at least one forming voltage and at least one reset voltage to the memory cell. The forming procedure further includes a thermal step. The step of applying at least one reset voltage to the memory cell may be preformed before or after the thermal step. After one forming voltage is applied, if the memory cell passes verification, the next forming voltage is not applied to the memory cell. After the thermal step, if the memory cell passes verification, the next forming voltage is not applied to the memory cell. In addition, after one reset voltage is applied, if the memory cell passes verification, the next reset voltage is not applied to the memory cell.
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公开(公告)号：US09865348B2
公开(公告)日：2018-01-09
申请号：US15244308
申请日：2016-08-23
发明人： Chien-Min Wu
CPC分类号： G11C13/0069 , G11C29/4401 , G11C29/70 , G11C2013/0083
摘要： A memory driving device and a method thereof applied for a RRAM array are provided. The memory driving device includes a voltage generator, a current detector, and a controller. The voltage generator generates a write voltage. An RRAM cell of the RRAM array is selected according to a selection signal for receiving the program voltage to generate a program current. The current detector detects the program current. The controller executes a driving procedure which includes: obtaining a voltage distribution for the program voltage; determining the initial voltage and the maximum voltage of the program voltage according to the voltage distribution; gradually increasing the program voltage from the initial voltage to the maximum voltage; determining whether the program current exceeds the reference current; and selecting another RRAM cell when the write current exceeds the reference current.
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公开(公告)号：US20220076744A1
公开(公告)日：2022-03-10
申请号：US17012077
申请日：2020-09-04
发明人： Frederick Chen , Ping-Kun Wang , Kuang-Chih Hsieh , Chien-Min Wu , Meng-Hung Lin
摘要： A memory device includes: a resistive switching layer, a conductive pillar, a barrier layer, a word line, a plurality of resistive layers, and a plurality of bit lines. The resistive switching layer is shaped as a cup and has an inner surface to define an opening. The conductive pillar is disposed in the opening. The barrier layer is disposed between the resistive switching layer and the conductive pillar. The word line is electrically connected to the conductive pillar. The resistive layers are respectively distributed on an outer surface of the resistive switching layer. The bit lines are electrically connected to the resistive layers, respectively.
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公开(公告)号：US10658036B2
公开(公告)日：2020-05-19
申请号：US16045749
申请日：2018-07-26
发明人： Shao-Ching Liao , Ping-Kun Wang , Ming-Che Lin , Min-Chih Wei , Chia-Hua Ho , Chien-Min Wu
摘要： A forming method of a resistive memory device is provided. The forming method includes: conducting a forming procedure to apply a forming voltage to the resistive memory device such that the resistive memory device changes from a high resistive state to a low resistive state and measuring a first current of the resistive memory device; performing a thermal step on the resistive memory device and measuring a second current of the resistive memory device; and comparing the second current to the first current and determining to apply a first voltage signal or a second voltage signal to the resistive memory device or to finish the forming procedure according to a comparison result of the first current and the second current. In addition, a memory storage apparatus including a resistive memory device is also provided.
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公开(公告)号：US11289157B1
公开(公告)日：2022-03-29
申请号：US17012077
申请日：2020-09-04
发明人： Frederick Chen , Ping-Kun Wang , Kuang-Chih Hsieh , Chien-Min Wu , Meng-Hung Lin
摘要： A memory device includes: a resistive switching layer, a conductive pillar, a barrier layer, a word line, a plurality of resistive layers, and a plurality of bit lines. The resistive switching layer is shaped as a cup and has an inner surface to define an opening. The conductive pillar is disposed in the opening. The barrier layer is disposed between the resistive switching layer and the conductive pillar. The word line is electrically connected to the conductive pillar. The resistive layers are respectively distributed on an outer surface of the resistive switching layer. The bit lines are electrically connected to the resistive layers, respectively.
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公开(公告)号：US11055021B2
公开(公告)日：2021-07-06
申请号：US16353339
申请日：2019-03-14
发明人： Ping-Kun Wang , Shao-Ching Liao , Chien-Min Wu , Chia Hua Ho , Frederick Chen , He-Hsuan Chao , Seow-Fong Lim
摘要： A resistive memory including a storage array, a storage circuit, a control circuit, a voltage generation circuit and an access circuit is provided. The storage array includes a plurality of blocks. Each block includes a plurality of memory cells. The storage circuit stores a plurality of count values. Each of the count values indicates the number of times that a corresponding block performs a write operation. The control circuit generates a control signal according to the count values when an external command is a write command. The voltage generation circuit provides an operation voltage group according to the control signal. The access circuit accesses the storage array according to the operation voltage group.
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公开(公告)号：US20210005255A1
公开(公告)日：2021-01-07
申请号：US16460995
申请日：2019-07-02
发明人： He-Hsuan Chao , Ping-Kun Wang , Seow Fong Lim , Norio Hattori , Chien-Min Wu , Chih-Hua Hung
IPC分类号： G11C13/00
摘要： A resistive memory and a method for writing data thereof are provided. The method for writing data includes: receiving a write-in data and generating an inverted write-in data; reading a current data in a plurality of selected memory cells; comparing the current data with the write-in data and the inverted write-in data; selecting the write-in data or the inverted write-in data to generate a final data according to a comparison result; and writing the final data into the selected memory cells.
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公开(公告)号：US10770167B1
公开(公告)日：2020-09-08
申请号：US16281063
申请日：2019-02-20
发明人： Ping-Kun Wang , Ming-Che Lin , Chien-Min Wu , He-Hsuan Chao , Chih-Cheng Fu , Shao-Ching Liao
摘要： A memory storage apparatus and a forming method of a resistive memory device thereof are provided. A test forming voltage is applied to a redundant resistive memory device and a corresponding test current is read. A forming voltage applied to a main memory cell block is determined according to the test forming voltage, the test current, a forming current-voltage characteristic data and a target forming current.
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公开(公告)号：US20200265914A1
公开(公告)日：2020-08-20
申请号：US16281063
申请日：2019-02-20
发明人： Ping-Kun Wang , Ming-Che Lin , Chien-Min Wu , He-Hsuan Chao , Chih-Cheng Fu , Shao-Ching Liao
摘要： A memory storage apparatus and a forming method of a resistive memory device thereof are provided. A test forming voltage is applied to a redundant resistive memory device and a corresponding test current is read. A forming voltage applied to a main memory cell block is determined according to the test forming voltage, the test current, a forming current-voltage characteristic data and a target forming current.
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