Systems and Methods for Managing Data in a System for Hibernation States
    1.
    发明申请
    Systems and Methods for Managing Data in a System for Hibernation States 有权
    用于管理休眠状态的系统中的数据的系统和方法

    公开(公告)号:US20140245040A1

    公开(公告)日:2014-08-28

    申请号:US13780834

    申请日:2013-02-28

    IPC分类号: G06F1/32

    摘要: The present application is directed to systems and methods for managing data in a system for hibernation states. In one implementation, a memory device comprises a controller memory, a main memory, a buffer to the main memory and a controller comprising a processor. The processor is configured to manage data storage in conjunction with hibernation of the memory device. The processor is in communication with the controller memory, the main memory and the buffer, and is configured to read data from the controller memory; write at least a portion of the data read from the controller memory into the buffer prior to the memory device entering a hibernation state; and after writing the at least a portion of the data read from the controller memory into the buffer and prior to the memory device entering the hibernation state, reduce an amount of power provided to the buffer of the to a reduced power level.

    摘要翻译: 本申请涉及用于管理用于休眠状态的系统中的数据的系统和方法。 在一个实现中,存储器件包括控制器存储器,主存储器,到主存储器的缓冲器和包括处理器的控制器。 处理器被配置为结合存储器设备的休眠来管理数据存储。 处理器与控制器存储器,主存储器和缓冲器通信,并被配置为从控制器存储器读取数据; 在存储器件进入休眠状态之前将从控制器存储器读取的数据的至少一部分写入缓冲器; 并且在将从控制器存储器读取的数据的至少一部分写入缓冲器之后并且在存储器件进入休眠状态之前,将提供给缓冲器的功率量减少到降低的功率电平。

    Systems and methods for managing data in a system for hibernation states
    2.
    发明授权
    Systems and methods for managing data in a system for hibernation states 有权
    用于管理休眠状态的系统中的数据的系统和方法

    公开(公告)号:US09239610B2

    公开(公告)日:2016-01-19

    申请号:US13780834

    申请日:2013-02-28

    IPC分类号: G06F1/00 G06F1/32 G06F1/26

    摘要: The present application is directed to systems and methods for managing data in a system for hibernation states. In one implementation, a memory device comprises a controller memory, a main memory, a buffer to the main memory and a controller comprising a processor. The processor is configured to manage data storage in conjunction with hibernation of the memory device. The processor is in communication with the controller memory, the main memory and the buffer, and is configured to read data from the controller memory; write at least a portion of the data read from the controller memory into the buffer prior to the memory device entering a hibernation state; and after writing the at least a portion of the data read from the controller memory into the buffer and prior to the memory device entering the hibernation state, reduce an amount of power provided to the buffer of the to a reduced power level.

    摘要翻译: 本申请涉及用于管理用于休眠状态的系统中的数据的系统和方法。 在一个实现中,存储器件包括控制器存储器,主存储器,到主存储器的缓冲器和包括处理器的控制器。 处理器被配置为结合存储器设备的休眠来管理数据存储。 处理器与控制器存储器,主存储器和缓冲器通信,并被配置为从控制器存储器读取数据; 在存储器件进入休眠状态之前将从控制器存储器读取的数据的至少一部分写入缓冲器; 并且在将从控制器存储器读取的数据的至少一部分写入缓冲器之后并且在存储器件进入休眠状态之前,将提供给缓冲器的功率量减少到降低的功率电平。

    Systems and methods of storing data
    3.
    发明授权
    Systems and methods of storing data 有权
    存储数据的系统和方法

    公开(公告)号:US09318166B2

    公开(公告)日:2016-04-19

    申请号:US13329788

    申请日:2011-12-19

    摘要: A method of reading data in a data storage device with a controller and a memory includes generating, in the memory, a set of bits corresponding to a particular storage element of the memory. The set of bits indicates a group of threshold voltage intervals. A threshold voltage of the particular storage element corresponds to one of the threshold voltage intervals within the group. At least one threshold voltage interval within the group is separated from another threshold voltage interval within the group by an intervening threshold voltage interval that is not within the group. The method also includes sending the set of bits to the controller. The set of bits includes a first hard bit that corresponds to a value read from the particular storage element and a first soft bit that corresponds to a reliability measure.

    摘要翻译: 利用控制器和存储器在数据存储装置中读取数据的方法包括在存储器中生成与存储器的特定存储元件相对应的一组位。 这组位指示一组阈值电压间隔。 特定存储元件的阈值电压对应于组内的阈值电压间隔之一。 组内的至少一个阈值电压间隔与组内的另一个阈值电压间隔分开,不在组内的中间阈值电压间隔。 该方法还包括将该组位发送到控制器。 所述位组包括对应于从特定存储元件读取的值的第一硬比特和对应于可靠性度量的第一软比特。

    Storage module and low-complexity methods for assessing the health of a flash memory device
    4.
    发明授权
    Storage module and low-complexity methods for assessing the health of a flash memory device 有权
    存储模块和用于评估闪存设备运行状况的低复杂度方法

    公开(公告)号:US09152488B2

    公开(公告)日:2015-10-06

    申请号:US13926709

    申请日:2013-06-25

    摘要: A storage module and low-complexity methods for assessing the health of a flash memory device are disclosed. In one embodiment, data is written to a subset of memory cells in a memory of a storage module. Error statistics for the subset of memory cells are determined, and cell error rate parameters for the memory are estimated by fitting the determined error statistics for the subset of memory cells with a parametric statistical model. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

    摘要翻译: 公开了一种存储模块和用于评估闪存设备的健康状况的低复杂度方法。 在一个实施例中,将数据写入存储模块的存储器中的存储器单元的子集。 确定存储器单元子集的错误统计,并且通过使用参数统计模型拟合用于存储器单元子集的确定的误差统计来估计存储器的单元错误率参数。 其他实施例是可能的,并且每个实施例可以单独使用或组合使用。

    Systems and methods of storing data
    5.
    发明授权
    Systems and methods of storing data 有权
    存储数据的系统和方法

    公开(公告)号:US09032269B2

    公开(公告)日:2015-05-12

    申请号:US13329819

    申请日:2011-12-19

    摘要: A method of writing data includes receiving data pages to be stored in a data storage device and generating codewords corresponding to the received data pages. The codewords are stored to physical pages of a first memory portion of the data storage device. A first portion of a particular codeword that corresponds to a particular data page is stored at a first physical page of the first memory portion. A second portion of the particular codeword is stored at a second physical page of the first memory portion. The codewords are copied from the physical pages of the first memory portion to a physical page of a second memory portion of the data storage device.

    摘要翻译: 一种写入数据的方法包括接收要存储在数据存储装置中的数据页,并产生与接收的数据页对应的码字。 码字被存储到数据存储设备的第一存储器部分的物理页面。 对应于特定数据页的特定码字的第一部分存储在第一存储器部分的第一物理页面。 特定码字的第二部分被存储在第一存储器部分的第二物理页面上。 将码字从第一存储器部分的物理页面复制到数据存储设备的第二存储器部分的物理页面。

    Storage Module and Low-Complexity Methods for Assessing the Health of a Flash Memory Device
    6.
    发明申请
    Storage Module and Low-Complexity Methods for Assessing the Health of a Flash Memory Device 有权
    存储模块和用于评估闪存设备运行状况的低复杂度方法

    公开(公告)号:US20140380106A1

    公开(公告)日:2014-12-25

    申请号:US13926709

    申请日:2013-06-25

    IPC分类号: G06F11/07

    摘要: A storage module and low-complexity methods for assessing the health of a flash memory device are disclosed. In one embodiment, data is written to a subset of memory cells in a memory of a storage module. Error statistics for the subset of memory cells are determined, and cell error rate parameters for the memory are estimated by fitting the determined error statistics for the subset of memory cells with a parametric statistical model. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

    摘要翻译: 公开了一种存储模块和用于评估闪存设备的健康状况的低复杂度方法。 在一个实施例中,将数据写入存储模块的存储器中的存储器单元的子集。 确定存储器单元子集的错误统计,并且通过使用参数统计模型拟合用于存储器单元子集的确定的误差统计来估计存储器的单元错误率参数。 其他实施例是可能的,并且每个实施例可以单独使用或组合使用。

    Flash memory with random partition
    7.
    发明授权
    Flash memory with random partition 有权
    闪存与随机分区

    公开(公告)号:US08910017B2

    公开(公告)日:2014-12-09

    申请号:US13539969

    申请日:2012-07-02

    IPC分类号: G11C29/00 G06F11/10 H03M13/35

    摘要: A system and method for partitioning data in long term memory of a flash memory device is disclosed. The method may include the steps of identifying a type of data that has been received and routing the data to one of at least two partitions in the long term memory array. One partition of the flash memory device may be optimized for random data while another is optimized for sequential data. The method includes identifying the type of data and routing the data to the appropriate partition. Data may be analyzed and routed upon receipt or initially stored in a default partition and later analyzed and routed to another partition. The partition for random data may be configured for storing data using a first level of ECC protection while the second may be configured for storing data using a second, stronger level of ECC protection.

    摘要翻译: 公开了一种用于在闪存设备的长期存储器中分区数据的系统和方法。 该方法可以包括以下步骤:识别已经接收的数据类型,并将数据路由到长期存储器阵列中的至少两个分区中的一个。 闪存器件的一个分区可以针对随机数据进行优化,而另一个对顺序数据进行优化。 该方法包括识别数据类型并将数据路由到适当的分区。 数据可以在接收时被分析和路由,或者最初存储在默认分区中,并且随后被分析并被路由到另一个分区。 用于随机数据的分区可以被配置为使用第一级ECC保护来存储数据,而第二层可以被配置为使用第二更强级别的ECC保护来存储数据。

    Method and device for multi phase error-correction
    8.
    发明授权
    Method and device for multi phase error-correction 有权
    多相纠错方法和装置

    公开(公告)号:US08832518B2

    公开(公告)日:2014-09-09

    申请号:US12034718

    申请日:2008-02-21

    IPC分类号: H03M13/00

    摘要: Data bits to be encoded are split into a plurality of subgroups. Each subgroup is encoded separately to generate a corresponding codeword. Selected subsets are removed from the corresponding codewords, leaving behind shortened codewords, and are many-to-one transformed to condensed bits. The final codeword is a combination of the shortened codewords and the condensed bits. A representation of the final codeword is decoded by being partitioned to a selected subset and a plurality of remaining subsets. Each remaining subset is decoded separately. A subset whose decoding is terminated is decoded again, at least in part according to the selected subset. If the encoding and decoding are systematic then the selected subsets are of parity bits.

    摘要翻译: 要编码的数据位被分割成多个子组。 每个子组被分别编码以产生相应的码字。 所选择的子集从相应的码字中移除,留下缩短的码字,并且被多对一地转换成浓缩比特。 最终码字是缩短的码字和浓缩比特的组合。 最终码字的表示被分割成选定的子集和多个剩余子集。 每个剩余子集被单独解码。 解码终止的子集至少部分地根据所选择的子集被再次解码。 如果编码和解码是系统的,则所选择的子集是奇偶校验位。

    Probabilistic error correction in multi-bit-per-cell flash memory
    9.
    发明授权
    Probabilistic error correction in multi-bit-per-cell flash memory 失效
    多比特单元闪存中的概率误差校正

    公开(公告)号:US08650462B2

    公开(公告)日:2014-02-11

    申请号:US12401634

    申请日:2009-03-11

    IPC分类号: G11C29/00 H03M13/00

    摘要: Data that are stored in cells of a multi-bit-per cell memory, according to a systematic or non-systematic ECC, are read and corrected (systematic ECC) or recovered (non-systematic ECC) in accordance with estimated probabilities that one or more of the read bits are erroneous. In one method of the present invention, the estimates are a priori. In another method of the present invention, the estimates are based only on aspects of the read bits that include significances or bit pages of the read bits. In a third method of the present invention, the estimates are based only on values of the read bits. Not all the estimates are equal.

    摘要翻译: 根据系统或非系统ECC存储在多比特单元存储器的单元中的数据根据​​估计的概率被读取和校正(系统ECC)或恢复(非系统ECC) 更多的读取位是错误的。 在本发明的一种方法中,估计是先验的。 在本发明的另一种方法中,估计仅基于包括读位的重要性或位页的读位的方面。 在本发明的第三种方法中,估计仅基于读位的值。 并不是所有的估计是相等的。

    Multi-phase ECC encoding using algebraic codes
    10.
    发明授权
    Multi-phase ECC encoding using algebraic codes 有权
    使用代数代码的多阶段ECC编码

    公开(公告)号:US08645789B2

    公开(公告)日:2014-02-04

    申请号:US13335534

    申请日:2011-12-22

    IPC分类号: H03M13/00

    CPC分类号: G06F11/1012

    摘要: A method includes a first encoding operation associated with a first algebraic error correcting code generating a first set of first parity bits corresponding to a first set of information bits and a second set of first parity bits corresponding to a second set of information bits. A second encoding operation associated with a second algebraic error correcting code generates a first set of second parity bits corresponding to the first set of information bits and a second set of second parity bits corresponding to the second set of information bits. A third encoding operation generates a set of joint parity bits. The first set of information bits, the second set of information bits, the first set of first parity bits, the second set of first parity bits, and the joint parity bits may be stored in a data storage device as a single codeword.

    摘要翻译: 一种方法包括与第一代数纠错码相关联的第一编码操作,所述第一代数纠错码产生对应于第一组信息比特的第一奇偶校验位的第一组,以及与第二组信息比特对应的第二奇偶校验位组。 与第二代数纠错码相关联的第二编码操作产生对应于第一组信息比特的第一组第二奇偶校验位和对应于第二组信息比特的第二奇偶校验位组。 第三编码操作产生一组联合奇偶校验位。 第一组信息位,第二组信息位,第一组第一奇偶校验位,第二组第一奇偶校验位和联合奇偶校验位可以作为单个码字存储在数据存储设备中。