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公开(公告)号：US20090115548A1
公开(公告)日：2009-05-07
申请号：US12088173
申请日：2006-08-29
申请人： Yasuhiro Hamada , Keiichi Ohata , Kenichi Maruhashi , Takao Morimoto , Masaharu Itou , Shuuya Kishimoto
发明人： Yasuhiro Hamada , Keiichi Ohata , Kenichi Maruhashi , Takao Morimoto , Masaharu Itou , Shuuya Kishimoto
CPC分类号： H01P5/10
摘要： A balun circuit includes a first CPW line 11, a second CPW line 12a, and a third CPW line 12b that serve as signal input/output ports; a first CPS line 14a that is a differential transmission line, the first CPS line 14a relaying the first CPW line 11 to the second CPW line 12a; a second CPS line 14b that is a differential transmission line, the second CPS line 14b relaying the first CPW line 11 to the third CPW line 12b; and at least one connection section that connects grounded conductors of each of the first CPW line 11, the second CPW line 12a, and the third CPW line 12b.
摘要翻译： 平衡 - 不平衡转换电路包括用作信号输入/输出端口的第一CPW线11，第二CPW线12a和第三CPW线12b; 作为差分传输线的第一CPS线14a，将第一CPW线11中继到第二CPW线12a的第一CPS线14a; 作为差分传输线的第二CPS线14b，将第一CPW线11中继到第三CPW线12b的第二CPS线14b; 以及至少一个连接部分，其连接第一CPW线11，第二CPW线12a和第三CPW线12b中的每一个的接地导体。
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公开(公告)号：US07710216B2
公开(公告)日：2010-05-04
申请号：US12088173
申请日：2006-08-29
申请人： Yasuhiro Hamada , Keiichi Ohata , Kenichi Maruhashi , Takao Morimoto , Masaharu Itou , Shuuya Kishimoto
发明人： Yasuhiro Hamada , Keiichi Ohata , Kenichi Maruhashi , Takao Morimoto , Masaharu Itou , Shuuya Kishimoto
CPC分类号： H01P5/10
摘要： A balun circuit includes a first CPW line 11, a second CPW line 12a, and a third CPW line 12b that serve as signal input/output ports; a first CPS line 14a that is a differential transmission line, the first CPS line 14a relaying the first CPW line 11 to the second CPW line 12a; a second CPS line 14b that is a differential transmission line, the second CPS line 14b relaying the first CPW line 11 to the third CPW line 12b; and at least one connection section that connects grounded conductors of each of the first CPW line 11, the second CPW line 12a, and the third CPW line 12b.
摘要翻译： 平衡 - 不平衡转换电路包括用作信号输入/输出端口的第一CPW线11，第二CPW线12a和第三CPW线12b; 作为差分传输线的第一CPS线14a，将第一CPW线11中继到第二CPW线12a的第一CPS线14a; 作为差分传输线的第二CPS线14b，将第一CPW线11中继到第三CPW线12b的第二CPS线14b; 以及至少一个连接部分，其连接第一CPW线11，第二CPW线12a和第三CPW线12b中的每一个的接地导体。
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公开(公告)号：US20090238206A1
公开(公告)日：2009-09-24
申请号：US11910572
申请日：2006-03-30
申请人： Yasuhiro Hamada , Keiichi Ohata , Kenichi Maruhashi , Takao Morimoto , Masaharu Ito , Shuya Kishimoto
发明人： Yasuhiro Hamada , Keiichi Ohata , Kenichi Maruhashi , Takao Morimoto , Masaharu Ito , Shuya Kishimoto
IPC分类号： H04J3/22
CPC分类号： H04L5/143 , H04B1/50 , H04J3/1694 , H04L5/0037
摘要： The present invention intends to improve communication efficiency between two communication apparatuses each engaged in the communication by full duplex communication method by using a surplus band of the one to transmission band of the other. A first bandwidth required by a first communication apparatus (A) at data transmission and a second bandwidth required by a second communication apparatus (B) at data transmission are presumed. Next, the first bandwidth presumed as mentioned is compared to a first bandwidth used which the first communication apparatus (A) currently uses and at the same time, the second bandwidth presumed as mentioned is compared to a second bandwidth used which the second communication apparatus (B) currently uses. The first bandwidth and the second bandwidth are then adjusted, and a third bandwidth which the first communication apparatus (A) uses at data transmission and a fourth bandwidth which the second communication apparatus (B) uses are determined.
摘要翻译： 本发明旨在通过使用一个对另一个的传输频带的剩余频带来提高通过全双工通信方式进行通信的两个通信装置之间的通信效率。 推测第一通信装置（A）在数据传输时所需的第一带宽和第二通信装置（B）在数据传输时所需的第二带宽。 接下来，将所提到的假定的第一带宽与当前使用的第一通信装置（A）所使用的第一带宽进行比较，并且同时将假定的所述第二带宽与第二通信装置（ B）目前使用。 然后调整第一带宽和第二带宽，并确定第一通信装置（A）在数据传输时使用的第三带宽和第二通信装置（B）使用的第四带宽。
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公开(公告)号：US08045580B2
公开(公告)日：2011-10-25
申请号：US11910572
申请日：2006-03-30
申请人： Yasuhiro Hamada , Keiichi Ohata , Kenichi Maruhashi , Takao Morimoto , Masaharu Ito , Shuya Kishimoto
发明人： Yasuhiro Hamada , Keiichi Ohata , Kenichi Maruhashi , Takao Morimoto , Masaharu Ito , Shuya Kishimoto
IPC分类号： H04J3/16
CPC分类号： H04L5/143 , H04B1/50 , H04J3/1694 , H04L5/0037
摘要： The present invention intends to improve communication efficiency between two communication apparatuses each engaged in the communication by full duplex communication method by using a surplus band of the one to transmission band of the other. A first bandwidth required by a first communication apparatus (A) at data transmission and a second bandwidth required by a second communication apparatus (B) at data transmission are presumed. Next, the first bandwidth presumed as mentioned is compared to a first bandwidth used which the first communication apparatus (A) currently uses and at the same time, the second bandwidth presumed as mentioned is compared to a second bandwidth used which the second communication apparatus (B) currently uses. The first bandwidth and the second bandwidth are then adjusted, and a third bandwidth which the first communication apparatus (A) uses at data transmission and a fourth bandwidth which the second communication apparatus (B) uses are determined.
摘要翻译： 本发明旨在通过使用一个对另一个的传输频带的剩余频带来提高通过全双工通信方式进行通信的两个通信装置之间的通信效率。 推测第一通信装置（A）在数据传输时所需的第一带宽和第二通信装置（B）在数据传输时所需的第二带宽。 接下来，将所提到的假定的第一带宽与当前使用的第一通信装置（A）所使用的第一带宽进行比较，并且同时将假定的所述第二带宽与第二通信装置（ B）目前使用。 然后调整第一带宽和第二带宽，并确定第一通信装置（A）在数据传输时使用的第三带宽和第二通信装置（B）使用的第四带宽。
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公开(公告)号：US20060044055A1
公开(公告)日：2006-03-02
申请号：US10537661
申请日：2003-12-04
IPC分类号： H03K5/00
CPC分类号： H03H7/03 , H03B5/1852 , H03H7/1725 , H03H7/1733 , H03H11/28
摘要： A negative resistance circuit having a transistor and a plurality of distributed constant lines respectively connected to the three terminals of the transistor further comprises an inductive element or a capacitive element connected between the output terminal of the negative resistance circuit and the ground potential. The negative resistance is adjusted through the inductance of the inductive element or the capacitance of the capacitive element.
摘要翻译： 具有分别连接到晶体管的三个端子的晶体管和多个分布常数线路的负电阻电路还包括连接在负电阻电路的输出端子和地电位之间的电感元件或电容元件。 通过电感元件的电感或电容元件的电容来调整负电阻。
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公开(公告)号：US06320543B1
公开(公告)日：2001-11-20
申请号：US09528061
申请日：2000-03-17
申请人： Keiichi Ohata , Kenichi Maruhashi , Masaharu Ito
发明人： Keiichi Ohata , Kenichi Maruhashi , Masaharu Ito
IPC分类号： H01Q138
CPC分类号： H01Q1/38 , H01L2223/6677 , H01L2224/16 , H01L2224/16225 , H01L2224/16227 , H01L2224/48091 , H01L2224/48137 , H01L2224/4823 , H01L2924/01019 , H01L2924/01079 , H01L2924/09701 , H01L2924/13062 , H01L2924/14 , H01L2924/1423 , H01L2924/15153 , H01L2924/1517 , H01L2924/16152 , H01L2924/19041 , H01L2924/30107 , H01Q9/0407 , H01Q23/00 , H01L2924/00014 , H01L2924/00
摘要： The present invention provides a microwave and millimeter wave circuit apparatus having a reduced size and which can be produced easily, improving productivity. The microwave and millimeter wave circuit apparatus includes: a grounding conductive layer 4 grounded; a first dielectric layer 5 formed on this grounding conductive layer 4; a signal line selectively formed on this first dielectric layer 5; a second dielectric layer 7 covering at least a portion of the signal line 6; a cavity 2 formed in this second dielectric layer 7 and extending to the signal line 6; a monolithic microwave integrated circuit 1 arranged in the cavity 2 and connected to the signal line 6; and an antenna connected to the signal line 6.
摘要翻译： 本发明提供一种微波和毫米波电路装置，其具有尺寸减小并且可以容易地制造，从而提高生产率。 微波和毫米波电路装置包括：接地导电层4接地; 形成在该接地导电层4上的第一电介质层5; 选择性地形成在该第一电介质层5上的信号线; 覆盖信号线6的至少一部分的第二电介质层7; 形成在该第二电介质层7中并延伸到信号线6的空腔2; 布置在空腔2中并连接到信号线6的单片微波集成电路1; 和连接到信号线6的天线。
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7.发明授权Dielectric waveguide filter with inductive windows and coplanar line coupling 有权具有感应窗和共面线耦合的介质波导滤波器公开(公告)号：US07196598B2
公开(公告)日：2007-03-27
申请号：US10332348
申请日：2001-07-06
申请人： Kenichi Maruhashi , Masaharu Ito , Keiichi Ohata
发明人： Kenichi Maruhashi , Masaharu Ito , Keiichi Ohata
IPC分类号： H01P1/028
CPC分类号： H01P1/2088
摘要： The present invention provides a filter exhibiting excellent filter characteristics and having less number of stages. A dielectric substrate (1) has one surface connected to a top conductor (2) and an opposite surface connected to a bottom conductor (3). A pair of rows of via-holes connecting together the top conductor (2) and the bottom conductor (3) are formed along the signal transfer direction. A slit (6) is formed in a portion of the top conductor (2) overlying the central resonator among a plurality of resonators. The slit (6) extends in a direction perpendicular to the signal transfer direction. Slits (7, 8) are formed in each of portions of the top conductor (2) overlying resonators disposed at both ends. A coplanar waveguide (9) mounted on the top conductor (2) is connected to the slit (7).
摘要翻译： 本发明提供了具有优异的过滤特性并且具有较少级数的过滤器。 电介质基板（1）具有连接到顶部导体（2）的一个表面和连接到底部导体（3）的相反表面。 沿着信号传送方向形成一对连接在一起的顶部导体（2）和底部导体（3）的通孔。 在多个谐振器中的覆盖中心谐振器的顶部导体（2）的一部分中形成狭缝（6）。 狭缝（6）沿垂直于信号传送方向的方向延伸。 在位于两端的谐振器的顶部导体（2）的每个部分中形成狭缝（7,8）。 安装在顶部导体（2）上的共面波导（9）连接到狭缝（7）。
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公开(公告)号：US07170373B2
公开(公告)日：2007-01-30
申请号：US10502782
申请日：2003-01-31
申请人： Masaharu Ito , Kenichi Maruhashi , Keiichi Ohata
发明人： Masaharu Ito , Kenichi Maruhashi , Keiichi Ohata
CPC分类号： H01P1/2088 , H01P5/107
摘要： A conductive layer is formed on each of the upper and lower surfaces of a dielectric substrate, and the two conductive layers are connected by rows of via-holes that are formed which a spacing that is less than or equal to ½ of the wavelength in the dielectric substrate in the resonance frequency, whereby n stages of dielectric resonators and input/output waveguide structures are formed. If the number n of stages is assumed to be 3, the first-stage resonator and the second-stage resonator are coupled by an electromagnetic field by means of via-holes of a first spacing; the second-stage resonator and the third-stage resonator are coupled by an electromagnetic by means of via-holes of a second spacing, whereby a filter is formed. The input/output waveguide structure and the filter are coupled by an electromagnetic by means of via-holes of a fourth spacing. The first-stage resonator and the third-stage resonator are coupled by an electromagnetic field by means of via-holes of a third spacing.
摘要翻译： 在电介质基板的上表面和下表面的每一个上形成导电层，并且两个导电层通过形成的行的通孔连接，所述通孔的间隔小于或等于 电介质基板的谐振频率，从而形成n级介质谐振器和输入/输出波导结构。 如果假设n个级数为3，则第一级谐振器和第二级谐振器通过电磁场通过第一间隔的通孔耦合; 第二级谐振器和第三级谐振器借助于具有第二间隔的通孔的电磁耦合，从而形成滤波器。 输入/输出波导结构和滤波器通过第四间隔通孔的电磁耦合。 第一级谐振器和第三级谐振器通过第三间隔的通孔由电磁场耦合。
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公开(公告)号：US06903700B2
公开(公告)日：2005-06-07
申请号：US10133326
申请日：2002-04-29
CPC分类号： H01P5/185 , H01L2224/16225 , H01L2924/00014 , H01P5/187 , H01Q13/10 , H05K1/0237 , H05K1/0272 , H05K1/185 , H05K3/4614 , H05K3/4697 , H05K2201/0379 , H05K2201/0969 , H05K2201/10242 , H05K2201/10416 , H01L2224/0401
摘要： A high frequency circuit substrate comprises a first high frequency circuit substrate including at least a first dielectric material layer, a first conductor layer, a second dielectric material layer and a second conductor layer, which are laminated in the named order, the first conductor layer having a first slot formed therein, and the second conductor layer forming a transmission line, the first dielectric material layer having a first opening exposing the first slot at its bottom. The high frequency circuit substrate also comprises a second high frequency circuit substrate including at least a third dielectric material layer, a third conductor layer, a fourth dielectric material layer and a fourth conductor layer, which are laminated in the named order, the third conductor layer having a second slot formed therein, and the fourth conductor layer forming a transmission line, the third dielectric material layer having a second opening exposing the second slot at its bottom. The first high frequency circuit substrate and the first high frequency circuit substrate are bonded to each other in such a manner that the first dielectric material layer and the third dielectric material layer are faced to each other and the first slot and the second slot are electromagnetically coupled, by inserting one side and the other side of a conductor plate having a through hole into the first opening and the second opening, respectively.
摘要翻译： 高频电路基板包括第一高频电路基板，该第一高频电路基板至少包括第一电介质材料层，第一导体层，第二介电材料层和第二导体层，其按顺序层叠，所述第一导体层具有 形成在其中的第一槽，并且所述第二导体层形成传输线，所述第一介电材料层具有在其底部暴露所述第一槽的第一开口。 高频电路基板还包括第二高频电路基板，其包括按照所述顺序层压的至少第三电介质材料层，第三导体层，第四电介质层和第四导体层，第三导体层 具有形成在其中的第二槽，并且所述第四导体层形成传输线，所述第三介电材料层具有在其底部暴露所述第二槽的第二开口。 第一高频电路衬底和第一高频电路衬底彼此接合，使得第一电介质材料层和第三电介质材料层相互面对，并且第一槽和第二槽电磁耦合 通过将具有通孔的导体板的一侧和另一侧分别插入第一开口和第二开口中。
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公开(公告)号：US06674347B1
公开(公告)日：2004-01-06
申请号：US09533683
申请日：2000-03-23
申请人： Kenichi Maruhashi , Masaharu Ito , Keiichi Ohata
发明人： Kenichi Maruhashi , Masaharu Ito , Keiichi Ohata
IPC分类号： H01P308
CPC分类号： H01P3/003 , H05K1/0219 , H05K1/024 , H05K3/28 , H05K2201/0187 , H05K2201/0191 , H05K2201/09036
摘要： A multi-layer substrate comprises a first dielectric layer, a coplanar waveguide line formed on a first surface of the first dielectric layer, the coplanar waveguide line including a signal conductor and a pair of ground conductor layers positioned at opposite sides of the signal conductor, separately from the signal conductor, and a second dielectric layer formed to cover the coplanar waveguide line and the first dielectric layer and having an opening positioned at least on the signal conductor of the coplanar waveguide line. A thickness of the first dielectric layer is smaller than the value of c/{4f·(∈1−1)½}, where c is velocity of light, f is a frequency of a signal propagating in the signal line, and ∈1 is a dielectric constant of the first dielectric layer.
摘要翻译： 多层基板包括第一介电层，形成在第一介电层的第一表面上的共面波导线，包括信号导体的共面波导线和位于信号导体的相对侧的一对接地导体层， 以及形成为覆盖共面波导线和第一介电层并且具有至少位于共面波导线的信号导体上的开口的第二介电层。 第一介质层的厚度小于c / {4f（∈1-1）½>}的值，其中c是光速，f是在信号线中传播的信号的频率，以及 ∈1是第一介电层的介电常数。
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