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    METHOD OF MANUFACTURING SEMICONDUCTOR STORAGE DEVICE
    5.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR STORAGE DEVICE 有权
    制造半导体存储器件的方法

    公开(公告)号：US20090004833A1

    公开(公告)日：2009-01-01

    申请号：US12146802

    申请日：2008-06-26

    申请人： Takashi Suzuki ,  Hirokazu Ishida ,  Ichiro Mizushima ,  Yoshio Ozawa ,  Fumiki Aiso ,  Katsuyuki Sekine ,  Takashi Nakao ,  Yoshihiko Saito

    发明人： Takashi Suzuki ,  Hirokazu Ishida ,  Ichiro Mizushima ,  Yoshio Ozawa ,  Fumiki Aiso ,  Katsuyuki Sekine ,  Takashi Nakao ,  Yoshihiko Saito

    IPC分类号： H01L21/20

    CPC分类号： H01L27/115 ,  H01L21/76264 ,  H01L21/84 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/1203 ,  H01L29/66825

    摘要： A method of manufacturing a semiconductor storage device includes providing an opening portion in a plurality of positions in an insulating film formed on a silicon substrate, and thereafter forming an amorphous silicon film on the insulating film, in which the opening portions are formed, and in the opening portions. Then, trenches are formed to divide the amorphous silicon film, in the vicinity of a midpoint between adjacent opening portions, into a portion on one opening portion side and a portion on the other opening portion side. Next, the amorphous silicon film, in which the trenches are formed, is annealed and subjected to solid-phase crystallization to form a single crystal with the opening portions used as seeds, and thereby a silicon single-crystal layer is formed. Then, a memory cell array is formed on the silicon single-crystal layer.

    摘要翻译： 一种制造半导体存储装置的方法包括在形成在硅衬底上的绝缘膜中的多个位置提供开口部分，然后在其中形成开口部分的绝缘膜上形成非晶硅膜，并且在 开口部。 然后，形成沟槽，将相邻的开口部之间的中点附近的非晶硅膜分割成一个开口部侧的一部分和另一个开口部侧的一部分。 接着，对其中形成沟槽的非晶硅膜进行退火并进行固相结晶以形成具有用作晶种的开口部分的单晶，从而形成硅单晶层。 然后，在硅单晶层上形成存储单元阵列。

    Semiconductor device and manufacturing method thereof
    7.
    发明申请
    Semiconductor device and manufacturing method thereof 审中-公开
    半导体装置及其制造方法

    公开(公告)号：US20070254434A1

    公开(公告)日：2007-11-01

    申请号：US11819428

    申请日：2007-06-27

    申请人： Ichiro Mizushima ,  Yoshio Ozawa

    发明人： Ichiro Mizushima ,  Yoshio Ozawa

    IPC分类号： H01L21/336

    CPC分类号： H01L27/115 ,  G11C16/0483 ,  H01L27/11521 ,  H01L29/40114 ,  H01L29/66825 ,  H01L29/7881

    摘要： A semiconductor device includes a semiconductor substrate including an active area (AA) surrounded by an isolation insulating film, and a nonvolatile memory cell on the AA, the nonvolatile memory cell including a tunnel insulating film on the AA, a FG electrode on the tunnel insulating film, a CG electrode above the FG electrode, and an interelectrode insulating film between the FG electrode and the CG electrode, relating to a cross section in a channel width direction of the nonvolatile memory cell, dimension in the channel width direction of a top surface of the AA is shorter than dimension in the channel width direction of a bottom surface of the tunnel insulating film, and an area of a portion opposing the AA of the tunnel insulating film is smaller than an area of a portion opposing a top surface of the FG electrode of the interelectrode insulating film.

    摘要翻译： 一种半导体器件包括：半导体衬底，包括由隔离绝缘膜包围的有源区（AA）和在AA上的非易失性存储单元，非易失性存储单元包括AA上的隧道绝缘膜，隧道绝缘上的FG电极 薄膜，FG电极上方的CG电极以及FG电极和CG电极之间的电极间绝缘膜，涉及非易失性存储单元的沟道宽度方向上的横截面，顶表面的沟道宽度方向上的尺寸 的距离短于隧道绝缘膜的底面的沟道宽度方向上的尺寸，并且与隧道绝缘膜的AA相对的部分的面积小于与隧道绝缘膜的顶面相对的部分的面积 电极间绝缘膜的FG电极。

    Nonvolatile semiconductor memory device and method of manufacturing the same
    8.
    发明授权
    Nonvolatile semiconductor memory device and method of manufacturing the same 失效
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US08017989B2

    公开(公告)日：2011-09-13

    申请号：US12659703

    申请日：2010-03-17

    申请人： Yoshio Ozawa ,  Ichiro Mizushima ,  Takashi Nakao ,  Akihito Yamamoto ,  Takashi Suzuki ,  Masahiro Kiyotoshi

    发明人： Yoshio Ozawa ,  Ichiro Mizushima ,  Takashi Nakao ,  Akihito Yamamoto ,  Takashi Suzuki ,  Masahiro Kiyotoshi

    IPC分类号： H01L29/788

    CPC分类号： H01L27/115 ,  H01L21/84 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/1203

    摘要： A nonvolatile semiconductor memory device including a semiconductor substrate having a semiconductor layer and an insulating material provided on a surface thereof, a surface of the insulating material is covered with the semiconductor layer, and a plurality of memory cells provided on the semiconductor layer, the memory cells includes a first dielectric film provided by covering the surface of the semiconductor layer, a plurality of charge storage layers provided above the insulating material and on the first dielectric film, a plurality of second dielectric films provided on the each charge storage layer, a plurality of conductive layers provided on the each second dielectric film, and an impurity diffusion layer formed partially or overall at least above the insulating material and inside the semiconductor layer and at least a portion of a bottom end thereof being provided by an upper surface of the insulating material.

    摘要翻译： 一种非易失性半导体存储器件，包括具有半导体层和设置在其表面上的绝缘材料的半导体衬底，绝缘材料的表面被半导体层覆盖，并且设置在半导体层上的多个存储单元，存储器 电池包括通过覆盖半导体层的表面而提供的第一电介质膜，设置在绝缘材料上方和第一电介质膜上的多个电荷存储层，设置在每个电荷存储层上的多个第二电介质膜，多个 设置在每个第二电介质膜上的导电层，以及杂质扩散层，其部分或整体形成在绝缘材料的至少上方和半导体层的内部，并且其底端的至少一部分由绝缘体的上表面 材料。

    Method of manufacturing non-volatile semiconductor memory
    9.
    发明授权
    Method of manufacturing non-volatile semiconductor memory 失效
    制造非易失性半导体存储器的方法

    公开(公告)号：US07718483B2

    公开(公告)日：2010-05-18

    申请号：US11399655

    申请日：2006-04-07

    申请人： Ichiro Mizushima ,  Hajime Nagano ,  Yoshio Ozawa ,  Hisataka Meguro ,  Takashi Suzuki

    发明人： Ichiro Mizushima ,  Hajime Nagano ,  Yoshio Ozawa ,  Hisataka Meguro ,  Takashi Suzuki

    IPC分类号： H01L21/8238

    CPC分类号： H01L27/115 ,  H01L21/76229 ,  H01L27/1052 ,  H01L27/11521

    摘要： In a method for manufacturing a non-volatile semiconductor device according to this invention, steps are provided for forming a plurality of first semiconductor portions over a substrate; selectively growing a plurality of second semiconductor portions in contacting with said plurality of first semiconductor portions respectively; partially removing said plurality of second semiconductor portions to prepare a plurality of floating gates with substantially flat surfaces; forming an insulating layer over said plurality of floating gates; and forming a control gate over said insulating layer.

    摘要翻译： 在根据本发明的用于制造非易失性半导体器件的方法中，提供了用于在衬底上形成多个第一半导体部分的步骤; 选择性地生长与所述多个第一半导体部分接触的多个第二半导体部分; 部分地去除所述多个第二半导体部分以制备具有基本平坦表面的多个浮动栅极; 在所述多个浮动栅极上形成绝缘层; 以及在所述绝缘层上形成控制栅极。

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    10.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号：US20090011570A1

    公开(公告)日：2009-01-08

    申请号：US12146143

    申请日：2008-06-25

    申请人： Ichiro Mizushima ,  Yoshio Ozawa ,  Takashi Nakao ,  Akihito Yamamoto ,  Takashi Suzuki ,  Masahiro Kiyotoshi ,  Minako Inukai ,  Kaori Umezawa ,  Hiroaki Yamada

    发明人： Ichiro Mizushima ,  Yoshio Ozawa ,  Takashi Nakao ,  Akihito Yamamoto ,  Takashi Suzuki ,  Masahiro Kiyotoshi ,  Minako Inukai ,  Kaori Umezawa ,  Hiroaki Yamada

    IPC分类号： H01L21/76

    CPC分类号： H01L21/764

    摘要： A method of manufacturing a semiconductor device includes removing a part of a semiconductor substrate to form a protruding portion and a recess portion in a surface area of the semiconductor substrate, forming a first epitaxial semiconductor layer in the recess portion, forming a second epitaxial semiconductor layer on the protruding portion and the first epitaxial semiconductor layer, removing a first part of the second epitaxial semiconductor layer with a second part of the second epitaxial semiconductor layer left to expose a part of the first epitaxial semiconductor layer, and etching the first epitaxial semiconductor layer from the exposed part of the first epitaxial semiconductor layer to form a cavity under the second part of the second epitaxial semiconductor layer.

    摘要翻译： 一种制造半导体器件的方法包括：去除半导体衬底的一部分以在半导体衬底的表面区域中形成突出部分和凹陷部分，在凹部中形成第一外延半导体层，形成第二外延半导体层 在所述突出部分和所述第一外延半导体层上，用所述第二外延半导体层的第二部分去除所述第二外延半导体层的第一部分，以露出所述第一外延半导体层的一部分，并且蚀刻所述第一外延半导体层 从第一外延半导体层的暴露部分形成在第二外延半导体层的第二部分下面的空腔。