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    ELECTRONIC PACKAGE EVALUATION APPARATUS, ELECTRONIC PACKAGE OPTIMIZING APPARATUS, AND COMPUTER-READABLE RECORDING MEDIUM IN WHICH ELECTRONIC PACKAGE EVALUATION PROGRAM IS RECORDED
    1.
    发明申请
    ELECTRONIC PACKAGE EVALUATION APPARATUS, ELECTRONIC PACKAGE OPTIMIZING APPARATUS, AND COMPUTER-READABLE RECORDING MEDIUM IN WHICH ELECTRONIC PACKAGE EVALUATION PROGRAM IS RECORDED 有权
    电子包装评估装置，电子包装优化装置和电子包装评估程序记录的计算机可读记录介质

    公开(公告)号：US20080127011A1

    公开(公告)日：2008-05-29

    申请号：US11855681

    申请日：2007-09-14

    Applicant: Yoko KOBAYASHI ,  Hidehisa Sakai ,  Yoshiteru Ochi

    Inventor： Yoko KOBAYASHI ,  Hidehisa Sakai ,  Yoshiteru Ochi

    IPC: G06F17/50 ,  G06F19/00

    CPC classification number: G06F17/5018 ,  G06F2217/40

    Abstract: When reliability evaluation of the whole electronic package is performed, the time required for simulation is decreased, while solder connection parts, in particular, are accurately analyzed. The whole analysis model creating unit creates a solder connection part model which has the same volume, height, and connection area as the volume, height, and connection area of the solder connection part. By means of dividing the solder connection model into multiple meshes, the first mesh data for use in electronic package analysis is created.

    Abstract translation: 当执行整个电子封装的可靠性评估时，模拟所需的时间减少，特别是焊接连接部分被精确地分析。 整个分析模型创建单元产生与焊料连接部分的体积，高度和连接面积相同的体积，高度和连接面积的焊料连接部分模型。 通过将焊接连接模型划分为多个网格，创建用于电子包装分析的第一个网格数据。

    Electronic package evaluation apparatus, electronic package optimizing apparatus, and computer-readable recording medium in which electronic package evaluation program is recorded
    2.
    发明授权
    Electronic package evaluation apparatus, electronic package optimizing apparatus, and computer-readable recording medium in which electronic package evaluation program is recorded 有权
    电子封装评估装置，电子封装优化装置和记录有电子封装评估程序的计算机可读记录介质

    公开(公告)号：US07725866B2

    公开(公告)日：2010-05-25

    申请号：US11855681

    申请日：2007-09-14

    Applicant: Yoko Kobayashi ,  Hidehisa Sakai ,  Yoshiteru Ochi

    Inventor： Yoko Kobayashi ,  Hidehisa Sakai ,  Yoshiteru Ochi

    IPC: G06F17/50

    CPC classification number: G06F17/5018 ,  G06F2217/40

    Abstract: When reliability evaluation of the whole electronic package is performed, the time required for simulation is decreased, while solder connection parts, in particular, are accurately analyzed. The whole analysis model creating unit creates a solder connection part model which has the same volume, height, and connection area as the volume, height, and connection area of the solder connection part. By means of dividing the solder connection model into multiple meshes, the first mesh data for use in electronic package analysis is created.

    Abstract translation: 当执行整个电子封装的可靠性评估时，模拟所需的时间减少，特别是焊接连接部分被精确地分析。 整个分析模型创建单元产生与焊料连接部分的体积，高度和连接面积相同的体积，高度和连接面积的焊料连接部分模型。 通过将焊接连接模型划分为多个网格，创建用于电子包装分析的第一个网格数据。

    Method and apparatus for predicting board deformation, and computer product
    3.
    发明授权
    Method and apparatus for predicting board deformation, and computer product 有权
    预测板变形的方法和装置，以及计算机产品

    公开(公告)号：US07139678B2

    公开(公告)日：2006-11-21

    申请号：US11023689

    申请日：2004-12-29

    Applicant: Yoko Kobayashi ,  Hidehisa Sakai

    Inventor： Yoko Kobayashi ,  Hidehisa Sakai

    IPC: G06F17/00

    CPC classification number: H05K3/00 ,  G06F17/5018 ,  G06F2217/80 ,  H05K1/0271 ,  H05K2201/068 ,  H05K2203/162

    Abstract: An apparatus for predicting a deformation of a board includes a board dividing unit that divides the board into a plurality of areas based on wiring information on the board; and a deformation predicting unit that grasps a wiring pattern of an area macroscopically, calculates an equivalent physical property value equivalent to a modulus of longitudinal elasticity and a coefficient of thermal expansion by a finite element method, and predicts the deformation of the board based on the equivalent physical property value calculated for each of the areas divided by the board dividing unit.

    Abstract translation: 一种用于预测板的变形的装置，包括基于板上的布线信息将板划分为多个区域的板分割单元; 以及宏观地掌握区域的布线图案的变形预测单元，通过有限元法计算等效于纵向弹性模量和热膨胀系数的等效物理特性值，并且基于 为由板分割单元划分的每个区域计算出的等效物理属性值。

    Multi-scale analysis device
    6.
    发明授权
    Multi-scale analysis device 有权
    多尺度分析装置

    公开(公告)号：US07773814B2

    公开(公告)日：2010-08-10

    申请号：US11237936

    申请日：2005-09-29

    Applicant: Hidehisa Sakai

    Inventor： Hidehisa Sakai

    IPC: G06K9/68

    CPC classification number: G06F17/5018

    Abstract: The distortion of each node is calculated from the distortions of respective elements in the finite element analysis result of a global model of a structure, and a second-order coefficient of a quadratic function representing the displacement at each node of a micro model is calculated from distortions of respective nodes. In addition, a constant term and a first-order coefficient of the quadratic function are calculated from the displacements of the respective nodes of the global model. Then, the displacement at each boundary node of the micro model is calculated using the obtained quadratic function and a finite element analysis of the micro model is performed.

    Abstract translation: 从结构的全局模型的有限元分析结果中的各元素的失真计算每个节点的失真，并且从微模型的每个节点处的代表二次函数的二次系数被计算 各节点的失真。 另外，根据全局模型的各个节点的位移计算二次函数的常数项和一阶系数。 然后，使用获得的二次函数计算微模型的每个边界节点处的位移，并执行微模型的有限元分析。

    Crack growth evaluation apparatus, crack growth evaluation method, and recording medium recording crack growth evaluation program
    7.
    发明授权
    Crack growth evaluation apparatus, crack growth evaluation method, and recording medium recording crack growth evaluation program 有权
    裂纹生长评估装置，裂纹扩展评估方法和记录介质记录裂纹扩展评价程序

    公开(公告)号：US08190378B2

    公开(公告)日：2012-05-29

    申请号：US12289616

    申请日：2008-10-30

    Applicant: Hidehisa Sakai ,  Katsufumi Morimune ,  Masanori Motegi ,  Tsutomu Iikawa

    Inventor： Hidehisa Sakai ,  Katsufumi Morimune ,  Masanori Motegi ,  Tsutomu Iikawa

    IPC: G01B5/28

    CPC classification number: G01N3/32 ,  G01N2203/0016 ,  G01N2203/006 ,  G01N2203/0066 ,  G01N2203/0224

    Abstract: An element damage determination unit calculates a cumulative value of a damage value using a Manson-Coffin law for a plurality of finite elements of a continuum based on a result of a stress/distortion analyzing process, and determines whether or not the cumulative value of the damage value is equal to or exceeds a threshold. A calculation unit obtains first correspondence information indicating the correspondence between the number of cycles of a load and a growth rate of a crack occurring in the continuum based on the determination result. A Manson-Coffin law change unit changes a Manson-Coffin law based on the first correspondence information and second correspondence information indicating the correspondence between an actual measurement value of the number of cycles of a load applied to the continuum and an actual measurement value of the growth rate of a crack occurring in the continuum at that time.

    Abstract translation: 元件损坏确定单元基于应力/失真分析处理的结果，使用针对连续体的多个有限元素的曼森 - 棺子定律来计算损伤值的累积值，并且确定是否 损伤值等于或超过阈值。 计算单元基于确定结果，获得表示负荷循环次数与连续体发生的裂纹的生长速度之间的对应关系的第一对应信息。 曼森 - 棺子定律改变单元基于第一对应信息和第二对应信息来改变曼森 - 棺木定律，第二对应信息指示施加到连续体的负载的循环次数的实际测量值与实际测量值之间的对应关系 当时连续体发生裂缝的增长速度。

    Multi-scale analysis device
    9.
    发明申请
    Multi-scale analysis device 有权
    多尺度分析装置

    公开(公告)号：US20070005310A1

    公开(公告)日：2007-01-04

    申请号：US11237936

    申请日：2005-09-29

    Applicant: Hidehisa Sakai

    Inventor： Hidehisa Sakai

    IPC: G06F17/10

    CPC classification number: G06F17/5018

    Abstract: The distortion of each node is calculated from the distortions of respective elements in the finite element analysis result of a global model of a structure, and a second-order coefficient of a quadratic function representing the displacement at each node of a micro model is calculated from distortions of respective nodes. In addition, a constant term and a first-order coefficient of the quadratic function are calculated from the displacements of the respective nodes of the global model. Then, the displacement at each boundary node of the micro model is calculated using the obtained quadratic function and a finite element analysis of the micro model is performed.

    Abstract translation: 从结构的全局模型的有限元分析结果中的各元素的失真计算每个节点的失真，并且从微模型的每个节点处的代表二次函数的二次系数被计算 各节点的失真。 另外，根据全局模型的各个节点的位移计算二次函数的常数项和一阶系数。 然后，使用获得的二次函数计算微模型的每个边界节点处的位移，并执行微模型的有限元分析。

    SEMICONDUCTOR APPARATUS, SUBSTRATE DESIGN METHOD, AND SUBSTRATE DESIGN APPARATUS
    10.
    发明申请
    SEMICONDUCTOR APPARATUS, SUBSTRATE DESIGN METHOD, AND SUBSTRATE DESIGN APPARATUS 有权
    半导体设备，基板设计方法和基板设计设备

    公开(公告)号：US20100078810A1

    公开(公告)日：2010-04-01

    申请号：US12567893

    申请日：2009-09-28

    Applicant: Noriyuki Matsui ,  Hidehisa Sakai

    Inventor： Noriyuki Matsui ,  Hidehisa Sakai

    IPC: H01L23/498 ,  G06F17/50

    CPC classification number: H01L23/49816 ,  H01L23/3677 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/00

    Abstract: A semiconductor apparatus including: a substrate; and a semiconductor chip mounted on the substrate, wherein the substrate has plural holes, and the plural holes are provided such that the density on a substrate surface of the holes in a first area, which is an area of the substrate facing a semiconductor chip peripheral portion, is higher than the density on the substrate surface of the holes in an area excluding the first area on the substrate.

    Abstract translation: 一种半导体装置，包括：基板; 以及安装在所述基板上的半导体芯片，其中，所述基板具有多个孔，并且所述多个孔被设置为使得所述基板表面上的所述孔的密度在所述第一区域中，所述第一区域是面向半导体芯片周边的所述基板的区域 比基板上的第一区域以外的区域的孔的基板表面的密度高。

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