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1.发明申请Method of fabricating a transistor having a triple channel in a memory device 有权在存储器件中制造具有三通道的晶体管的方法公开(公告)号：US20060246671A1
公开(公告)日：2006-11-02
申请号：US11155833
申请日：2005-06-17
IPC分类号： H01L21/336 , H01L21/76
CPC分类号： H01L29/7851 , H01L27/105 , H01L27/1052 , H01L27/10876 , H01L27/10879 , H01L29/66621 , H01L29/66795
摘要： Disclosed is a method for fabricating a transistor of a memory device capable of preventing voids from being created when forming a low-resistant gate electrode. The method includes the steps of forming an active area by etching a semiconductor substrate, forming a field oxide layer in the semiconductor substrate and forming a recess by etching the field oxide layer. A gate insulation layer is formed along an upper surface of the active area and an exposed portion of the active area. A gate electrode is formed on the field oxide layer such that the gate electrode extends across an upper portion of the active area while being overlapped with a channel area and the recess. The first conductive layer to be patterned has the same thickness, so the low-resistant gate electrode is easily fabricated without forming the voids.
摘要翻译： 公开了一种制造存储器件的晶体管的方法，该方法能够防止在形成低电阻栅电极时产生空隙。 该方法包括以下步骤：通过蚀刻半导体衬底形成有源区，在半导体衬底中形成场氧化物层，并通过蚀刻场氧化物层形成凹陷。 栅极绝缘层沿有源区的上表面和有源区的暴露部分形成。 栅极电极形成在场氧化物层上，使得栅极电极延伸跨过有源区域的上部，同时与沟道区域和凹部重叠。 待图案化的第一导电层具有相同的厚度，因此在不形成空隙的情况下容易地制造低电阻栅电极。
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公开(公告)号：US20060244055A1
公开(公告)日：2006-11-02
申请号：US11201951
申请日：2005-08-10
IPC分类号： H01L29/94
CPC分类号： H01L27/10876 , H01L27/10823 , H01L27/10826 , H01L27/10873 , H01L27/10879 , H01L29/66621 , H01L29/66795 , H01L29/7851
摘要： A memory device includes an active area protruding from a semiconductor substrate. A recess is formed in the active area. A field oxide layer is formed on the semiconductor substrate. A gate electrode extends across the active area while being overlapped with the recess. A gate insulation layer is interposed between the gate electrode and the active area. Source and drain areas are formed in the active area. The transistor structure above defines a recessed transistor structure if it is sectioned along a source-drain line and defines a Fin transistor structure if it is sectioned along a gate line. The transistor structure ensures sufficient data retention time and improves the current drivability while lowering the back bias dependency of a threshold voltage.
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公开(公告)号：US20060211185A1
公开(公告)日：2006-09-21
申请号：US11154458
申请日：2005-06-16
CPC分类号： H01L21/823437 , H01L21/823412 , H01L21/823425 , H01L29/66537 , H01L29/6659 , H01L29/66621 , H01L29/7834
摘要： Disclosed herein is a method for manufacturing a transistor in a semiconductor device, which can improve the refresh characteristics of the device. The method comprises the steps of: providing a silicon substrate having active and field regions defined thereon; performing a first channel ion implantation process into the silicon substrate; sequentially forming a hard mask film and a photoresist pattern exposing a gate formation region on the substrate into which the first channel ion implantation process has been performed; performing a second channel ion implantation process into the substrate at a higher concentration than that of the first ion implantation process using the photoresist pattern as an ion implantation mask, so as to form doped regions in the substrate at the gate formation region and both sides adjacent thereto; etching a hard mask film using the photoresist pattern as an etch barrier; removing the photoresist pattern; etching the substrate using a portion of the hard mask film remaining after the etching as an etch barrier, so as to form a groove; removing the hard mask film remaining after the etching; forming a gate in the groove of the substrate from which the hard mask film has been removed; and forming source and drain regions on the substrate at both sides of the gate.
摘要翻译： 这里公开了一种用于制造半导体器件中的晶体管的方法，其可以提高器件的刷新特性。 该方法包括以下步骤：提供其上限定有活性和场区的硅衬底; 对硅衬底进行第一沟道离子注入工艺; 顺序地形成硬掩模膜和曝光已经进行了第一沟道离子注入工艺的衬底上的栅极形成区的光致抗蚀剂图案; 以比使用光致抗蚀剂图案作为离子注入掩模的第一离子注入工艺更高的浓度进行衬底中的第二沟道离子注入工艺，以便在栅极形成区域和两侧相邻的衬底中形成掺杂区域 到; 使用光致抗蚀剂图案蚀刻硬掩模膜作为蚀刻阻挡层; 去除光致抗蚀剂图案; 使用蚀刻后残留的硬掩模膜的一部分作为蚀刻阻挡层蚀刻基板，以形成凹槽; 去除蚀刻后残留的硬掩模膜; 在已经去除了硬掩模膜的基板的凹槽中形成栅极; 以及在栅极两侧的衬底上形成源区和漏区。
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公开(公告)号：US20070155033A1
公开(公告)日：2007-07-05
申请号：US11649914
申请日：2007-01-05
IPC分类号： H01L21/00
CPC分类号： B29C41/12 , B29C41/20 , B29C41/36 , B29C41/50 , B29L2011/00 , H01L33/52 , H01L2224/48091 , H01L2924/00014
摘要： A method of manufacturing an LED package. The method includes dispensing a transparent resilient resin on an LED package body and overturning an entire structure to form an LED lens integrally provided to the LED package body. This prevents extra processes and costs incurring from forming intermediate layers and obviates degradation in reliability and light extraction efficiency due to additional interfaces.
摘要翻译： 一种制造LED封装的方法。 该方法包括将透明弹性树脂分配在LED封装主体上并翻转整个结构以形成一体地提供到LED封装体的LED透镜。 这防止了由于附加界面而形成中间层而导致额外的工艺和成本，并且消除了可靠性和光提取效率的降低。
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5.发明申请Method of manufacturing barrier ribs for pdp by capillary molding of paste and paste compositions therefor 失效通过毛细管成型用于制造pdp隔壁的糊剂和糊剂组合物的方法公开(公告)号：US20060121815A1
公开(公告)日：2006-06-08
申请号：US10521196
申请日：2003-07-15
IPC分类号： H01J9/24
摘要： Disclosed is a method of manufacturing rear plate barrier ribs for Plasma Display Panel (PDP), which includes the steps of: forming barrier ribs by infiltrating the barrier rib forming paste into grooves of a mold by using the capillary phenomenon, and then sintering the paste. This method causes rare environmental pollution, enables to make barrier ribs having fine and complex shapes and reduces material costs required for the barrier rib. Thus, the method may improve quality of PDP and reduce manufacture costs of the rear plate.
摘要翻译： 公开了一种制造等离子体显示面板（PDP）的后板阻挡肋的方法，其包括以下步骤：通过使用毛细管现象将隔壁形成膏渗透到模具的凹槽中，然后烧结浆料 。 这种方法造成罕见的环境污染，能够形成具有精细和复杂形状的隔肋，并且减少隔壁所需的材料成本。 因此，该方法可以提高PDP的质量并降低后板的制造成本。
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公开(公告)号：US20070063214A1
公开(公告)日：2007-03-22
申请号：US11524278
申请日：2006-09-21
IPC分类号： H01L33/00
CPC分类号： H01L33/507 , H01L33/58
摘要： The invention relates to a light emitting diode package that can prevent deterioration of phosphor and a method of manufacturing the same. The light emitting diode package includes a package body having a recessed part, a light emitting diode chip mounted on a floor surface of the recessed part and a lens structure disposed on an upper surface of the package body, apart from the light emitting diode chip. Phosphor is dispersed in at least a part of the lens structure.
摘要翻译： 本发明涉及能够防止荧光体劣化的发光二极管封装及其制造方法。 发光二极管封装包括具有凹部的封装主体，安装在凹部的地板表面上的发光二极管芯片和设置在封装体的上表面上的透镜结构，与发光二极管芯片分开。 荧光体分散在透镜结构的至少一部分中。
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7.发明申请Method of manufacturing barrier ribs for pdp by etching of thick film using water-based solution and compositions therefor 审中-公开通过使用水溶液蚀刻厚膜及其组合物来制造pdp隔壁的方法公开(公告)号：US20050156522A1
公开(公告)日：2005-07-21
申请号：US10510036
申请日：2002-04-08
CPC分类号： H01J9/242 , H01J11/12 , H01J11/36 , H01J2211/366
摘要： Disclosed is a method of manufacturing barrier ribs for a Plasma Display Panel (PDP), which includes the steps of forming a thick film (or, “green tape”) for barrier ribs on a glass or metal substrate by using composition for forming the barrier ribs, which contains water soluble components and solvent soluble components together a binder; forming a protective pattern film partially soluble or insoluble to the water based solution on the thick film; etching the thick film into a barrier rib shape by using solution or mixed solution containing ceramic powder as an etching accelerator, and sintering the etched thick film. This method causes rare environmental pollution, enables to make barrier ribs having fine and complex shapes and reduces material costs required for the barrier rib. Thus, the method may improve quality of DPD and reduce manufacture costs of the rear plate.
摘要翻译： 公开了一种制造用于等离子体显示面板（PDP）的隔壁的方法，其包括以下步骤：通过使用用于形成屏障的组合物在玻璃或金属基板上形成用于隔壁的厚膜（或“生胶条”） 肋骨，其含有水溶性成分和溶剂可溶性成分在一起的粘合剂; 在厚膜上形成部分溶解或不溶于水基溶液的保护性图案膜; 通过使用含有陶瓷粉末作为蚀刻加速剂的溶液或混合溶液将厚膜蚀刻成隔壁形状，并烧结蚀刻的厚膜。 这种方法造成罕见的环境污染，能够形成具有精细和复杂形状的隔肋，并且减少隔壁所需的材料成本。 因此，该方法可以提高DPD的质量并降低后板的制造成本。
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公开(公告)号：US20060270078A1
公开(公告)日：2006-11-30
申请号：US11439189
申请日：2006-05-24
申请人： Yong Kim , Seog Choi , Hyoung Kim , Yong Kim
发明人： Yong Kim , Seog Choi , Hyoung Kim , Yong Kim
IPC分类号： H01L21/00
CPC分类号： H01L33/52 , H01L2224/48091 , H01L2224/48227 , Y10S438/974 , H01L2924/00014
摘要： The invention relates to an LED package and proposes a method of fabricating an LED package including steps of providing a package substrate having a mounting area of an LED and a metal pattern to be connected with the LED, and plasma-treating the package substrate to reform at least a predetermined surface area of the package substrate where a resin-molded part will be formed. The method also includes mounting the LED on the mounting area on the substrate package and electrically connecting the LED with the metal pattern, and forming the resin-molded part in the mounting area of the LED to seal the LED package.
摘要翻译： 本发明涉及一种LED封装，并提出了一种制造LED封装的方法，包括以下步骤：提供具有LED的安装区域和与LED连接的金属图案的封装基板，以及等离子体处理封装基板以改造 至少形成将形成树脂成型部件的封装基板的预定表面积。 该方法还包括将LED安装在基板封装上的安装区域上，并将LED与金属图形电连接，并在LED的安装区域中形成树脂模制部件以密封LED封装。
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9.发明申请Dual connection device for memory mediums and mobile communication terminals with the same 有权用于存储介质的双连接设备和具有相同功能的移动通信终端公开(公告)号：US20050233763A1
公开(公告)日：2005-10-20
申请号：US11050802
申请日：2005-02-07
CPC分类号： H04B1/3816 , G06K7/0021 , G06K7/0034 , H04M1/026
摘要： A dual connection device for memory mediums has a body portion electrically connected with a mobile communication terminal, a first receiving portion formed to the body portion for receiving therein a first memory medium, a second receiving portion formed to the body portion as to be arranged piled up to the first receiving portion for receiving therein a second memory medium, a first connection terminal installed in the first receiving portion so as to be electrically connected with a terminal of the first memory medium, and a second connection terminal installed in the second receiving portion so as to be electrically connected with a terminal of the second memory medium. Since a plurality of memory mediums are connected with a terminal mobile communication terminal by the connection device, it is possible to make the mobile communication terminal have a slim and compact size, accomplish a simplified assembly process, and obtain increased productivity and cost reduction due to simplification of assembly process.
摘要翻译： 用于存储介质的双连接装置具有与移动通信终端电连接的主体部分，形成在主体部分上用于在其中容纳第一存储介质的第一接收部分，形成在主体部分上的第二接收部分，以布置成堆 直到第一接收部分用于在其中接收第二存储介质;第一连接端子，安装在第一接收部分中以便与第一存储介质的端子电连接，第二连接端子安装在第二接收部分中 以便与第二存储介质的端子电连接。 由于多个存储介质通过连接装置与终端移动通信终端连接，所以可以使移动通信终端具有纤细且紧凑的尺寸，实现简化的组装过程，并且由于 装配过程简化。
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公开(公告)号：US08779037B2
公开(公告)日：2014-07-15
申请号：US12919423
申请日：2008-12-28
申请人： Seon Mo Son , Kyung Mo Park , Sung Tae Ahn , Yong Kim
发明人： Seon Mo Son , Kyung Mo Park , Sung Tae Ahn , Yong Kim
CPC分类号： C08L69/00 , C08K5/42 , C08K5/521 , C08K5/523 , C08L25/12 , C08L27/18 , C08L33/12 , C08L2666/04
摘要： A polycarbonate resin composition is provided. The composition comprises (A) 50 to 90% by weight of a polycarbonate resin, (B) 5 to 30% by weight of a polymethyl methacrylate resin, (C) 5 to 20% by weight of a phosphate compound, (D) 0.01 to 2% by weight of a metal sulfonate as an organic salt, and (E) 0.05 to 2% by weight of a fluorinated olefin. The composition is highly flame retardant and scratch resistant.
摘要翻译： 提供聚碳酸酯树脂组合物。 该组合物包含（A）50〜90重量％的聚碳酸酯树脂，（B）5〜30重量％的聚甲基丙烯酸甲酯树脂，（C）5〜20重量％的磷酸酯化合物，（D）0.01 至2重量％的作为有机盐的金属磺酸盐，和（E）0.05至2重量％的氟化烯烃。 该组合物具有高度阻燃和耐划伤性。
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