公开(公告)号：US20110263183A1

公开(公告)日：2011-10-27

申请号：US13083833

申请日：2011-04-11

申请人： Yoshiaki KUROSAWA ,  Tomohiro HASHII ,  Yuichi KAKIZONO

发明人： Yoshiaki KUROSAWA ,  Tomohiro HASHII ,  Yuichi KAKIZONO

IPC分类号： B24B57/00 ,  B24B29/02

CPC分类号： B24B37/08 ,  B24B57/02

摘要： The present invention provides a polishing solution distribution apparatus capable of reducing distribution deviation of polishing solution even when leveling for installation is insufficient or inclination of an installation location varies and a polishing apparatus having the same. The polishing solution distribution apparatus includes a cone-shaped branch body in which a solution pan to store supplied polishing solution is formed and in which plural flow passages radially connected to a side face of the solution pan respectively and having a delivery port to supply polishing solution to a position lower than the connected position are formed, a support portion to support the branch body, and a universal joint mechanism to support the branch body via the support portion at a position being higher than the gravity center of the branch body.

摘要翻译： 本发明提供一种能够减少抛光液的分布偏差的抛光液分配装置，即使在安装调平不足或安装位置的倾斜变化的情况下，也能够减少研磨液的分布偏差。 抛光液分配装置包括锥形分支体，其中形成有用于存储供应的抛光溶液的溶液盘，并且其中分别径向地连接到溶液盘的侧面并具有输送口以提供抛光溶液的多个流动通道 形成到比连接位置低的位置，支撑分支体的支撑部和万向接头机构，用于在比分支体的重心高的位置经由支撑部支撑分支体。

公开(公告)号：US20090298396A1

公开(公告)日：2009-12-03

申请号：US12470714

申请日：2009-05-22

申请人： Tomohiro HASHII ,  Yasunori YAMADA ,  Yuichi KAKIZONO

发明人： Tomohiro HASHII ,  Yasunori YAMADA ,  Yuichi KAKIZONO

IPC分类号： B24B1/00 ,  B24D3/00 ,  B24B7/17 ,  B24B47/00

CPC分类号： B24B37/042 ,  B24B7/17 ,  B24B7/228 ,  B24B37/08 ,  B24B41/067 ,  B24B47/12 ,  B24D7/14

摘要： A method of grinding semiconductor wafers including simultaneously grinding both surfaces of multiple semiconductor wafers by rotating the wafers between a pair of upper and lower rotating surface plates in a state where the wafers are held on a carrier so that centers of the wafers are positioned on a circumference of a single circle, wherein a ratio of an area of a circle passing through the centers of the wafers to an area of one of the wafers is greater than or equal to 1.33 but less than 2.0; surfaces of the fixed abrasive grains comprised in the surface plates are comprised of pellets disposed in a grid-like fashion, with the pellets provided in a center portion and pellets provided in a peripheral portion being larger in size than the pellets provided in an intermediate portion.

摘要翻译： 一种研磨半导体晶片的方法，包括在晶片被保持在载体上的状态下，通过在一对上下旋转表面板之间旋转晶片同时研磨多个半导体晶片的两个表面，使得晶片的中心位于 圆周，其中通过晶片中心的圆的面积与一个晶片的面积的比率大于或等于1.33但小于2.0; 包含在表面板中的固定磨料颗粒的表面由网格状排列的颗粒组成，颗粒设置在中心部分，并且设置在周边部分中的颗粒的尺寸大于设置在中间部分中的颗粒 。

公开(公告)号：US20090289378A1

公开(公告)日：2009-11-26

申请号：US12467438

申请日：2009-05-18

申请人： Tomohiro HASHII

发明人： Tomohiro HASHII

IPC分类号： H01L23/544

CPC分类号： H01L23/544 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/54493 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention is a semiconductor wafer including an orientation identification mark, which is used for identifying crystal orientation, on a peripheral surface thereof, in which the orientation identification mark is smoothly joined with a portion outside of the orientation identification mark on the peripheral surface, has a planar surface that is orthogonal to an inner diameter direction of the semiconductor wafer, and has a gloss different from that in the portion outside of the orientation identification mark on the peripheral surface.

摘要翻译： 本发明是一种半导体晶片，其包括用于识别晶体取向的取向识别标记，其周向表面上的方向识别标记与外周表面上的取向识别标记之外的部分平滑地接合， 具有与半导体晶片的内径方向正交的平坦表面，并且具有与外周面上的取向识别标记外侧的部分不同的光泽。

公开(公告)号：US20090289377A1

公开(公告)日：2009-11-26

申请号：US12466519

申请日：2009-05-15

申请人： Tomohiro HASHII

发明人： Tomohiro HASHII

IPC分类号： H01L23/544

CPC分类号： H01L23/544 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/54493 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention is a semiconductor wafer including an orientation identification mark, which is used for identifying crystal orientation, on a peripheral surface thereof, in which the orientation identification mark has a terraced structure that is concave toward an inner diameter direction of the semiconductor wafer with respect to a portion outside of the orientation identification mark on the peripheral surface, and has a planar surface that is orthogonal to a diameter direction of the semiconductor wafer; and has a gloss different from that of the portion outside of the orientation identification mark on the peripheral surface.

摘要翻译： 本发明是一种半导体晶片，其包括用于识别晶体取向的取向识别标记，其周向表面上具有朝向半导体晶片的内径方向凹入的梯形结构， 相对于外周面上的取向识别标记之外的部分，并且具有与半导体晶片的直径方向正交的平面; 并且具有与周边表面上的取向识别标记之外的部分的光泽度不同的光泽。

公开(公告)号：US20100021688A1

公开(公告)日：2010-01-28

申请号：US12506290

申请日：2009-07-21

申请人： Takeo KATOH ,  Tomohiro HASHII ,  Katsuhiko MURAYAMA ,  Sakae KOYATA ,  Kazushige TAKAISHI

发明人： Takeo KATOH ,  Tomohiro HASHII ,  Katsuhiko MURAYAMA ,  Sakae KOYATA ,  Kazushige TAKAISHI

IPC分类号： B32B3/00 ,  H01L21/306 ,  B24B7/20 ,  B24B1/00 ,  H01L21/322

CPC分类号： H01L21/02008 ,  H01L21/3221 ,  Y10T428/24355

摘要： A wafer manufacturing method includes after flattening both upper and lower surfaces of a wafer sliced from a single crystal ingot, processing the wafer having damage on both surfaces caused by the flattening, so as to obtain desired damage at least on the lower surface of the wafer, the desired damage having a damage depth ranging from 5 nm-10 μm; forming a polysilicon layer at least on the lower surface of the wafer while the damage on the lower surface of the wafer remains; single-wafer etching the upper surface of the wafer; and final polishing the upper surface of the wafer to have a mirrored surface, after the single-wafer etching.

摘要翻译： 晶片制造方法包括在从单晶锭切片的晶片的上表面和下表面平坦化之后，对由平坦化引起的在两个表面上的损伤进行处理，从而至少在晶片的下表面上获得所需的损伤 具有5nm-10μm的损伤深度的所需损伤; 至少在晶片的下表面上形成多晶硅层，同时晶片的下表面上的损坏保留; 单晶片蚀刻晶片的上表面; 并且在单晶片蚀刻之后，最终抛光晶片的上表面以具有镜像表面。

公开(公告)号：US20090311460A1

公开(公告)日：2009-12-17

申请号：US12478860

申请日：2009-06-05

申请人： Tomohiro HASHII ,  Kazushige TAKAISHI ,  Shinji SAKAMOTO ,  Tomoko OHMACHI

发明人： Tomohiro HASHII ,  Kazushige TAKAISHI ,  Shinji SAKAMOTO ,  Tomoko OHMACHI

IPC分类号： B32B3/02

CPC分类号： C30B29/06 ,  C30B29/42 ,  C30B33/00 ,  Y10T428/21

摘要： A semiconductor wafer with high flatness is provided. The semiconductor wafer has a diameter φ of 450 mm and a thickness of at least 900 μm and no greater than 1,100 μm.

摘要翻译： 提供具有高平坦度的半导体晶片。 半导体晶片的直径φ为450mm，厚度为900μm以上且1100μm以下。

公开(公告)号：US20090297755A1

公开(公告)日：2009-12-03

申请号：US12471855

申请日：2009-05-26

申请人： Sakae KOYATA ,  Tomohiro HASHII ,  Yasunori YAMADA ,  Satoshi YUKIWAKI ,  Shinji SAKAMOTO ,  Tomoko OHMACHI

发明人： Sakae KOYATA ,  Tomohiro HASHII ,  Yasunori YAMADA ,  Satoshi YUKIWAKI ,  Shinji SAKAMOTO ,  Tomoko OHMACHI

IPC分类号： B32B5/00

CPC分类号： H01L21/304 ,  C30B29/06 ,  C30B33/10 ,  H01L21/02008 ,  H01L29/06 ,  Y10T428/21

摘要： A semiconductor wafer has a diameter of 450 mm and a thickness of at least 725 μm and no greater than 900 μm.

摘要翻译： 半导体晶片的直径为450mm，厚度至少为725μm，不大于900μm。

公开(公告)号：US20070161247A1

公开(公告)日：2007-07-12

申请号：US11458489

申请日：2006-07-19

申请人： Sakae KOYATA ,  Tomohiro HASHII ,  Katsuhiko MURAYAMA ,  Kazushige TAKAISHI ,  Takeo KATOH

发明人： Sakae KOYATA ,  Tomohiro HASHII ,  Katsuhiko MURAYAMA ,  Kazushige TAKAISHI ,  Takeo KATOH

IPC分类号： C03C15/00 ,  H01L21/302

CPC分类号： H01L21/30608 ,  H01L21/02019 ,  H01L21/02087 ,  H01L21/67075 ,  H01L21/6708

摘要： Local shape collapse of a wafer end portion is suppressed to the minimum level, and a wafer front surface as well as a wafer end portion is uniformly etched while preventing an etchant from flowing to a wafer rear surface. There is provided an etching method of a single wafer which supplies an etchant onto a wafer front surface in a state where a single wafer having flattened front and rear surfaces is held, and etches the wafer front surface and a front surface side end portion by using a centrifugal force generated by horizontally rotating the wafer. According to this method, the etchant is intermittently supplied onto the front surface of the wafer in twice or more, supply of the etchant is stopped after the etchant for one process is supplied, and the etchant for the next process is supplied after the supplied etchant flows off from the end portion of the wafer.

摘要翻译： 将晶片端部的局部形状塌陷抑制到最小水平，并且在防止蚀刻剂流入晶片后表面的同时均匀地蚀刻晶片前表面以及晶片端部。 提供了在保持具有平坦的前后表面的单个晶片的状态下将蚀刻剂提供到晶片前表面的状态的单晶片的蚀刻方法，并且通过使用晶片前表面和前表面侧端部蚀刻 通过水平旋转晶片产生的离心力。 根据该方法，蚀刻剂以两次或更多次间歇地供给到晶片的前表面上，在提供一个工艺的蚀刻剂之后停止供应蚀刻剂，并且在所提供的蚀刻剂之后提供用于下一工艺的蚀刻剂 从晶片的端部流出。