公开(公告)号：US06914011B2

公开(公告)日：2005-07-05

申请号：US10640331

申请日：2003-08-14

申请人： Yoshio Hayashide ,  Kazuo Kobayashi ,  Yasufumi Morimoto

发明人： Yoshio Hayashide ,  Kazuo Kobayashi ,  Yasufumi Morimoto

IPC分类号： H01L21/31 ,  C23C16/48 ,  H01L21/316

CPC分类号： H01L21/02271 ,  C23C16/481 ,  H01L21/02129 ,  H01L21/31625

摘要： A film deposition system comprises a chamber having an internal space, a support part provided in the internal space of the chamber for supporting a substrate, a gas supply part supplying gas to the internal space and a heating part heating the substrate. After an oxide film is formed on the substrate, the gas supply part supplies oxygen or a gas mixture of oxygen and ozone to the internal space while the heating part heats the substrate. Thus provided is a film deposition system capable of flattening an oxide film.

摘要翻译： 薄膜沉积系统包括具有内部空间的室，设置在用于支撑基板的室的内部空间中的支撑部分，向内部空间供应气体的气体供应部分和加热基板的加热部分。 在基板上形成氧化膜之后，气体供给部分在加热部分加热基板的同时向内部空间供给氧气或氧气和臭氧的气体混合物。 由此提供能够使氧化膜平坦化的膜沉积系统。

公开(公告)号：US06442704B1

公开(公告)日：2002-08-27

申请号：US09440657

申请日：1999-11-16

申请人： Yasufumi Morimoto ,  Takeshi Fujii

发明人： Yasufumi Morimoto ,  Takeshi Fujii

IPC分类号： G06F104

CPC分类号： H03K5/19 ,  G01R23/02

摘要： A ring oscillator clock frequency measuring circuit includes a reference clock count timer and a ring oscillator clock count timer. The reference clock count timer starts its counting of a reference clock signal in response to a start instruction fed from a CPU, and outputs an overflow signal when its counting reaches a preset value. The ring oscillator clock count timer starts its counting of pulses of a ring oscillator clock signal in response to the start instruction fed from the CPU, and continues its counting until the reference clock count timer generates the overflow signal. The frequency of the ring oscillator clock signal is obtained from the count value of the ring oscillator clock count timer. This makes it possible to measure the frequency of the ring oscillator clock signal at high accuracy, and to reduce the current consumption by operating the CPU based on the ring oscillator clock signal after the measurement.

摘要翻译： 环形振荡器时钟频率测量电路包括参考时钟计数定时器和环形振荡器时钟计数定时器。 参考时钟计数定时器响应于从CPU馈送的开始指令开始对参考时钟信号的计数，并且当其计数达到预设值时输出溢出信号。 环形振荡器时钟计数定时器响应于从CPU馈送的开始指令，开始计数环形振荡器时钟信号的脉冲，并继续计数，直到参考时钟计数定时器产生溢出信号。 环形振荡器时钟信号的频率从环形振荡器时钟计数定时器的计数值获得。 这使得可以以高精度测量环形振荡器时钟信号的频率，并且通过在测量之后基于环形振荡器时钟信号来操作CPU来减少电流消耗。

公开(公告)号：US5185240A

公开(公告)日：1993-02-09

申请号：US565083

申请日：1990-08-10

申请人： Junji Miyata ,  Satoshi Kanetake ,  Yasufumi Morimoto ,  Kenji Hanayama

发明人： Junji Miyata ,  Satoshi Kanetake ,  Yasufumi Morimoto ,  Kenji Hanayama

IPC分类号： G03C1/34 ,  G03C1/485

CPC分类号： G03C1/34 ,  G03C1/48515 ,  Y10S430/141

摘要： Disclosed is an autopositive silver halide photographic material which comprises at least one silver halide emulsion layer, characterized in that said emulsion layer or at least one other hydrophilic colloid layers contains at least one compound selected from the group consisting of compounds represented by the following general formulas (1), (2) and (3): ##STR1## wherein R.sub.1 represents hydrogen atom or an alkyl group; and R.sub.2, R.sub.3 and R.sub.4 each represents hydrogen atom, a halogen atom, an alkyl group or an alkoxy group; ##STR2## wherein R.sub.5 represents hydrogen atom or an alkyl group; and R.sub.6 and R.sub.7 each represents hydrogen atom, an alkyl group, a halogen atom or an aryl group; ##STR3## wherein R.sub.8 represents a lower alkylene group; X represents a halogen atom, nitro group, hydroxy group, a cyano group, a lower alkyl group, a lower alkoxy group, ##STR4## or --SO.sub.3 M; R.sub.12 represents hydrogen atom, --OM, a lower alkyl group, a lower alkoxy group or ##STR5## R.sub.13 and R.sub.14 may be the same or different groups and each represents hydrogen atom, a lower alkyl group, --COR.sub.17 or --SO.sub.2 R.sub.17 ; R.sub.15 and R.sub.16 may be the same or different groups and each represents hydrogen atom or a lower alkyl group; R.sub.17 represents a lower alkyl group; M represents hydrogen atom, an alkali metal or an atomic group required for forming a monovalent cation; and n represents 0 or an integer of 1 to 5.

摘要翻译： 公开了一种自动正卤化银照相材料，其包含至少一种卤化银乳剂层，其特征在于，所述乳剂层或至少一种其它亲水胶体层含有至少一种选自由以下通式表示的化合物 （1），（2）和（3）：其中R 1表示氢原子或烷基; R2，R3和R4各自表示氢原子，卤素原子，烷基或烷氧基; （2）其中R5表示氢原子或烷基; R6和R7各自表示氢原子，烷基，卤原子或芳基; （3）其中R8表示低级亚烷基; X表示卤原子，硝基，羟基，氰基，低级烷基，低级烷氧基，或者-SO 3 M; R 12表示氢原子，-OM，低级烷基，低级烷氧基或R 13和R 14可以相同或不同，各自表示氢原子，低级烷基，-COR 17或-SO 2 R 17; R 15和R 16可以相同或不同，各自表示氢原子或低级烷基; R 17表示低级烷基; M表示氢原子，形成一价阳离子所需的碱金属或原子团; n表示0或1〜5的整数。

公开(公告)号：US20130140622A1

公开(公告)日：2013-06-06

申请号：US13755348

申请日：2013-01-31

申请人： Kenichi Akita ,  Daisuke Okada ,  Keisuke Kuwahara ,  Yasufumi Morimoto ,  Yasuhiro Shimamoto ,  Kan Yasui ,  Tsuyoshi Arigane ,  Tetsuya Ishimaru

发明人： Kenichi Akita ,  Daisuke Okada ,  Keisuke Kuwahara ,  Yasufumi Morimoto ,  Yasuhiro Shimamoto ,  Kan Yasui ,  Tsuyoshi Arigane ,  Tetsuya Ishimaru

IPC分类号： H01L29/792 ,  H01L29/66

CPC分类号： H01L29/66833 ,  H01L27/115 ,  H01L27/11563 ,  H01L27/11568 ,  H01L29/792

摘要： A charge storage layer interposed between a memory gate electrode and a semiconductor substrate is formed shorter than a gate length of the memory gate electrode or a length of insulating films so as to make the overlapping amount of the charge storage layer and a source region to be less than 40 nm. Therefore, in the write state, since the movement in the transverse direction of the electrons and the holes locally existing in the charge storage layer decreases, the variation of the threshold voltage when holding a high temperature can be reduced. In addition, the effective channel length is made to be 30 nm or less so as to reduce an apparent amount of holes so that coupling of the electrons with the holes in the charge storage layer decreases; therefore, the variation of the threshold voltage when holding at room temperature can be reduced.

公开(公告)号：US08390053B2

公开(公告)日：2013-03-05

申请号：US12188412

申请日：2008-08-08

申请人： Kenichi Akita ,  Daisuke Okada ,  Keisuke Kuwahara ,  Yasufumi Morimoto ,  Yasuhiro Shimamoto ,  Kan Yasui ,  Tsuyoshi Arigane ,  Tetsuya Ishimaru

发明人： Kenichi Akita ,  Daisuke Okada ,  Keisuke Kuwahara ,  Yasufumi Morimoto ,  Yasuhiro Shimamoto ,  Kan Yasui ,  Tsuyoshi Arigane ,  Tetsuya Ishimaru

IPC分类号： H01L29/792

CPC分类号： H01L29/66833 ,  H01L27/115 ,  H01L27/11563 ,  H01L27/11568 ,  H01L29/792

摘要： A charge storage layer interposed between a memory gate electrode and a semiconductor substrate is formed shorter than a gate length of the memory gate electrode or a length of insulating films so as to make the overlapping amount of the charge storage layer and a source region to be less than 40 nm. Therefore, in the write state, since the movement in the transverse direction of the electrons and the holes locally existing in the charge storage layer decreases, the variation of the threshold voltage when holding a high temperature can be reduced. In addition, the effective channel length is made to be 30 nm or less so as to reduce an apparent amount of holes so that coupling of the electrons with the holes in the charge storage layer decreases; therefore, the variation of the threshold voltage when holding at room temperature can be reduced.

摘要翻译： 插入在存储栅电极和半导体衬底之间的电荷存储层形成为比存储栅电极的栅极长度或绝缘膜的长度短，以使电荷存储层和源极区域的重叠量成为 小于40nm。 因此，在写入状态下，由于在电荷存储层中局部存在的电子和空穴的横向的移动减少，因此可以降低保持高温时的阈值电压的变化。 此外，有效沟道长度为30nm以下，以减少空穴的表观量，使得电子与电荷存储层中的空穴的耦合减小; 因此，可以降低在室温下保持时的阈值电压的变化。

公开(公告)号：US20100207192A1

公开(公告)日：2010-08-19

申请号：US12698517

申请日：2010-02-02

申请人： Toshiya UENISHI ,  Yasufumi Morimoto

发明人： Toshiya UENISHI ,  Yasufumi Morimoto

IPC分类号： H01L29/792 ,  H01L21/28

CPC分类号： H01L29/792 ,  H01L29/40117 ,  H01L29/4234 ,  H01L29/513 ,  H01L29/518

摘要： A non-volatile semiconductor memory device capable of more efficiently trapping charges in a charge storage layer without increasing the thickness of the charge storage layer, as well as a manufacturing method thereof. In the non-volatile semiconductor memory device a tunnel insulating film, a charge storage layer, a block insulating film, and a gate electrode are disposed successively between a first source/drain region and a second source/drain region above a semiconductor substrate. The charge storage layer has a first layer and second layers, the first layer has a first nitrogen atom concentration, each of the second layers has a second nitrogen atom concentration, higher than the first nitrogen atom concentration and faces one of the tunnel insulating film and the block insulator.

摘要翻译： 能够更有效地捕获电荷存储层中的电荷而不增加电荷存储层的厚度的非易失性半导体存储器件及其制造方法。 在非易失性半导体存储器件中，隧道绝缘膜，电荷存储层，块绝缘膜和栅电极依次设置在半导体衬底之上的第一源极/漏极区域和第二源极/漏极区域之间。 电荷存储层具有第一层和第二层，第一层具有第一氮原子浓度，第二层的第二氮原子浓度高于第一氮原子浓度，并且面向隧道绝缘膜和 块绝缘体。