-
公开(公告)号：US5760632A
公开(公告)日：1998-06-02
申请号：US641237
申请日：1996-04-30
Applicant: Masayuki Kawakami , Yoshiyasu Tsuruoka
Inventor： Masayuki Kawakami , Yoshiyasu Tsuruoka
CPC classification number: H03D7/1441 , H03D7/1433 , H03D7/1458 , H03D2200/0047 , H03D2200/0084 , H03D2200/009 , H03D7/125
Abstract: The present invention relates to a double-balanced mixer circuit. The double-balanced mixer circuit consists of a first differential circuit formed of a first transistor and a second transistor connected differentially to each other for receiving a first input signal; and a second differential circuit formed of a third transistor and a fourth transistor connected differentially to each other for receiving a second input signal; either the junction of the drain or collector of the first transistor and the drain or collector of the third transistor or the junction of the drain or collector of the second transistor and the drain or collector of the fourth transistor producing an output signal having frequency information on the sum of the first input signal and the second input signal or the difference between them. The double-balanced mixer circuit is used suitably as a frequency converter which is used at the high-frequency section in a mobile communications equipment such as portable telephones. The object is to handle sufficiently with a reduced voltage of the power source and to facilitate the input operation.
Abstract translation: 双平衡混频器电路技术领域本发明涉及一种双平衡混频器电路。 双平衡混频器电路包括由第一晶体管和第二晶体管形成的第一差分电路，第一晶体管和第二晶体管彼此差分地连接以接收第一输入信号; 以及由第三晶体管和第四晶体管形成的第二差分电路，所述第三晶体管和第四晶体管彼此差分地连接以接收第二输入信号; 第一晶体管的漏极或集电极与第三晶体管的漏极或集电极或第二晶体管的漏极或集电极的结点与第四晶体管的漏极或集电极之间的结，产生具有频率信息的输出信号 第一输入信号和第二输入信号之和或它们之间的差。 双平衡混频器电路被适当地用作在诸如便携式电话的移动通信设备中在高频部分使用的频率转换器。 目的是充分地处理电源的降低的电压并且便于输入操作。
-
公开(公告)号：US5666090A
公开(公告)日：1997-09-09
申请号：US747935
申请日：1996-11-12
Applicant: Yoshiyasu Tsuruoka
Inventor： Yoshiyasu Tsuruoka
CPC classification number: H01P5/18 , H05K1/0237 , H05K1/112 , H05K1/181
Abstract: A high-frequency coupler includes a main transmission line having a microstrip line arranged on a base, a coupling part arranged on the base close to the main transmission line, and a conductive part provided within the base and connected to the coupling part through a throughhole. Therefore, the conductive part is influenced little by external sources.
Abstract translation: 一种高频耦合器包括：主传输线，其具有布置在基座上的微带线，耦合部分布置在靠近主传输线的基座上;以及导电部分，设置在基座内并通过通孔连接到耦合部分 。 因此，导电部分受外部源影响很小。
-
Patent Agency Ranking3.发明授权Integrated circuit device having a bias circuit for an enhancement transistor circuit 失效具有用于增强型晶体管电路的偏置电路的集成电路装置
公开(公告)号：US5889426A
公开(公告)日：1999-03-30
申请号：US908720
申请日：1997-08-08
Applicant: Masayuki Kawakami , Yoshiyasu Tsuruoka , Hideo Abe
Inventor： Masayuki Kawakami , Yoshiyasu Tsuruoka , Hideo Abe
CPC classification number: H03F3/1935
Abstract: Disclosed is an integrated circuit device. According to the present invention, an integrated circuit device comprises: a high frequency electronic circuit having a first enhancement transistor, to the gate of which, at least, a bias voltage is applied; and a bias circuit, including a second enhancement transistor formed on a substrate on which the first enhancement transistor is formed, and first, second and third resistors connected in series between a positive power source and a power source ground, in which a connection point of the first and the second resistors is connected to a drain of the second enhancement transistor, a connection point of the second and the third resistors is connected to a gate of the second enhancement transistor, and voltages at the connection point of the second resistor and the third resistor or at a terminal which is closer to the power source ground is applied as a bias voltage to the high frequency electronic circuit.
Abstract translation: 公开了一种集成电路装置。 根据本发明，集成电路装置包括：具有第一增强晶体管的高频电子电路，至少施加偏置电压的栅极; 以及偏置电路，包括形成在其上形成有第一增强型晶体管的基板上的第二增强型晶体管和串联连接在正电源和电源地之间的第一，第二和第三电阻器，其中，连接点 第一和第二电阻器连接到第二增强晶体管的漏极，第二和第三电阻器的连接点连接到第二增强晶体管的栅极，并且第二电阻器和第二电阻器的连接点处的电压 第三电阻器或靠近电源地的端子作为偏置电压施加到高频电子电路。
-
4.发明授权Semiconductor amplifying circuit having improved bias circuit for supplying a bias voltage to an amplifying FET 失效具有用于向放大FET提供偏置电压的改进的偏置电路的半导体放大电路
公开(公告)号：US5808515A
公开(公告)日：1998-09-15
申请号：US730392
申请日：1996-10-15
Applicant: Yoshiyasu Tsuruoka , Takahisa Kawai
Inventor： Yoshiyasu Tsuruoka , Takahisa Kawai
CPC classification number: H03F3/1935 , H03F1/306
Abstract: A semiconductor amplifying circuit of the present invention comprises: an amplifying field effect transistor device having a gate supplied with an input signal and a drain for outputting an amplified output signal; and a bias circuit for supplying a bias voltage to said gate of said amplifying transistor device. The bias circuit includes: a first bias voltage generator having a first dummy field effect transistor device formed on a same substrate as said amplifying transistor device is formed, and a voltage feedback bias circuit for supplying a bias voltage to a gate of said first dummy transistor device; and a second bias voltage generator for supplying a lower potential to said voltage feedback bias circuit when a drain current of said field effect transistor device increases, and supplying a higher potential to said voltage feedback bias circuit when said drain current decreases. A gate voltage of said first dummy transistor device is supplied as a bias voltage to said gate of said amplifying transistor device. The power supply can be applied directly to the drain of the amplifying transistor so as to maximizing the transistor performance.
Abstract translation: 本发明的半导体放大电路包括：具有提供有输入信号的栅极和用于输出放大的输出信号的漏极的放大场效应晶体管器件; 以及用于向所述放大晶体管器件的所述栅极提供偏置电压的偏置电路。 偏置电路包括：第一偏置电压发生器，具有形成在与所述放大晶体管器件相同的衬底上的第一虚拟场效应晶体管器件;以及电压反馈偏置电路，用于向所述第一虚拟晶体管的栅极提供偏置电压 设备; 以及第二偏置电压发生器，用于当所述场效应晶体管器件的漏极电流增加时向所述电压反馈偏置电路提供较低的电位，并且当所述漏极电流减小时，向所述电压反馈偏置电路提供较高的电位。 所述第一虚拟晶体管器件的栅极电压作为偏置电压被提供给所述放大晶体管器件的所述栅极。 电源可以直接施加到放大晶体管的漏极，以使晶体管性能最大化。
-
公开(公告)号：US5477187A
公开(公告)日：1995-12-19
申请号：US150087
申请日：1994-04-22
Applicant: Fumihiko Kobayashi , Isamu Umino , Yoshiyasu Tsuruoka , Junichi Hasegawa , Toshiaki Suzuki , Tomohiro Nakamura , Teruhiko Kitazawa , Mitsunori Hanaka
Inventor： Fumihiko Kobayashi , Isamu Umino , Yoshiyasu Tsuruoka , Junichi Hasegawa , Toshiaki Suzuki , Tomohiro Nakamura , Teruhiko Kitazawa , Mitsunori Hanaka
CPC classification number: H03F1/3235 , H03F1/3229 , H03F2201/3212
Abstract: In a feed forward amplifier, an RF amplifier is supplied with an input RF signal at an input terminal for amplifying the same; a distortion extraction loop supplied with the input RF signal and further with the output RF signal from the RF amplifier is for extracting non-linear distortion components formed in the output RF signal as a result of amplification in the RF amplifier; a variable phase shifter is provided in the distortion extraction loop for varying a phase of the input RF signal; a variable attenuator is provided in the distortion extraction loop for attenuating an amplitude of the input RF signal that has been supplied to the distortion extraction loop; and a distortion extraction circuit is provided in the distortion extraction loop for producing a distortion output signal that includes non-linear components; further, a control circuit is supplied with the input signal and with the distortion output signal for extracting a main signal component contained in the distortion output signal. The control circuit controls the variable phase shifter and the variable attenuator such that a ratio of the main signal component level with respect to the input RF signal level is decreased.
Abstract translation: PCT No.PCT / JP93 / 00313 Sec。 371日期1994年04月22日 102（e）1994年4月22日PCT 1993年3月17日PCT公布。 第WO93 / 19521号公报 日期为1993年9月30日。在前馈放大器中，RF放大器在输入端提供输入RF信号以进行放大; 提供有输入RF信号的失真提取回路以及来自RF放大器的输出RF信号，用于提取在RF放大器中放大的结果，在输出RF信号中形成的非线性失真分量; 在所述失真提取环路中提供可变移相器，用于改变所述输入RF信号的相位; 在所述失真提取环路中提供可变衰减器，用于衰减已经提供给所述失真提取回路的输入RF信号的幅度; 并且在所述失真提取回路中提供失真提取电路，用于产生包括非线性分量的失真输出信号; 此外，控制电路被提供有输入信号和用于提取包含在失真输出信号中的主信号分量的失真输出信号。 控制电路控制可变移相器和可变衰减器，使得主信号分量电平相对于输入RF信号电平的比率降低。
-
公开(公告)号：US5296825A
公开(公告)日：1994-03-22
申请号：US940515
申请日：1992-09-04
Applicant: Yoshiyasu Tsuruoka
Inventor： Yoshiyasu Tsuruoka
CPC classification number: H03F3/601 , H01P1/2007 , H03D9/02
Abstract: In a bias circuit including a transmission line and an open stub for preventing a microwave signal from passing through, the lengths of the open stub and a transmission line between the open stub and main transmission line are near .lambda./4 but not equal to .lambda./4. A leakage signal caused by the above deviations is fed to a detector portion. In the above construction, circuit size of the bias circuit and the detector portion is minimized.
Abstract translation: 在包括用于防止微波信号通过的传输线和开口短路的偏置电路中，开路短路和开路短路与主传输线之间的传输线的长度接近（λ）/ 4但不等于 （λ）/ 4。 由上述偏差引起的泄漏信号被馈送到检测器部分。 在上述结构中，偏置电路和检测器部分的电路尺寸最小化。
-
公开(公告)号：US5117202A
公开(公告)日：1992-05-26
申请号：US645409
申请日：1991-01-24
Applicant: Yoshiyasu Tsuruoka
Inventor： Yoshiyasu Tsuruoka
CPC classification number: H03G3/3042 , H01P5/04
Abstract: Automatic Level Control (ALC) circuit having a directional coupler, for branching an output of an amplifier, and a detector, for detecting the branched output, is disclosed. When saturation of the amplifier is measured, coupling by the directional coupler is decreased and the input signal to the detector can be kept below a predetermined value.
Abstract translation: 公开了具有用于分支放大器的输出的定向耦合器的自动电平控制（ALC）电路和用于检测分支输出的检测器。 当测量放大器的饱和度时，定向耦合器的耦合减小，并且检测器的输入信号可以保持在预定值以下。
-
-
-
-
-
-
Search Results
7
records
(took 0.014 seconds)
