公开(公告)号：US20120092090A1

公开(公告)日：2012-04-19

申请号：US13109647

申请日：2011-05-17

申请人： Young Ghyu AHN ,  Dong Seok PARK ,  Sang Soo PARK ,  Sung Jin PARK ,  Young Sun PARK ,  Bong Sup LIM

发明人： Young Ghyu AHN ,  Dong Seok PARK ,  Sang Soo PARK ,  Sung Jin PARK ,  Young Sun PARK ,  Bong Sup LIM

IPC分类号： H01P1/203

CPC分类号： H01P1/20345 ,  H01P5/02

摘要： Disclosed herein are a coupling structure for a multi-layered chip filter capable of overcoming a limitation of an existing coupling by improving a coupling structure and a multi-layered chip filter with the structure.The coupling structure according to an exemplary embodiment of the present invention includes: at least two overlap portion patterns each overlapped with a pattern formed on a resonator layer stacked therewith to form at least two overlap areas spaced from each other; and a connecting portion pattern formed by connecting at least three linear lines having a predetermined length to each other to connect the at least two overlap portion patterns to each other.

摘要翻译： 这里公开了一种用于通过改进耦合结构来克服现有耦合的限制的多层芯片滤波器的耦合结构和具有该结构的多层芯片滤波器。 根据本发明的示例性实施例的耦合结构包括：至少两个重叠部分图案，每个重叠部分图案与形成在其上堆叠的谐振器层上的图案重叠以形成彼此间隔开的至少两个重叠区域; 以及通过将具有预定长度的至少三条线性线彼此连接而形成的连接部分图案，以将至少两个重叠部分图案彼此连接。

公开(公告)号：US20120268875A1

公开(公告)日：2012-10-25

申请号：US13540055

申请日：2012-07-02

申请人： Young Ghyu AHN ,  Byoung Hwa LEE ,  Min Cheol PARK ,  Sang Soo PARK ,  Dong Seok PARK

发明人： Young Ghyu AHN ,  Byoung Hwa LEE ,  Min Cheol PARK ,  Sang Soo PARK ,  Dong Seok PARK

IPC分类号： H05K7/00 ,  B67C3/22

CPC分类号： H01G2/065 ,  H01G4/232 ,  H01G4/30 ,  H05K3/3442 ,  H05K13/022 ,  H05K2201/10015 ,  H05K2203/166 ,  Y02P70/613 ,  Y10T29/49124

摘要： A packing unit for a plurality of multi-layered ceramic capacitors including: a plurality of multi-layered ceramic capacitors having a thickness TMLCC equal or similar to a width WMLCC; and a packing sheet including a plurality of storing spaces, the capacitors being stored in the storing spaces and internal electrodes of each capacitor being substantially parallel with a bottom of the storing space. A related method includes: transferring a plurality of multi-layered ceramic capacitors having a thickness TMLCC equal or similar to a width WMLCC through a transferring unit; supplying magnetic field to a side of the capacitor so that the internal electrodes of the capacitor are substantially parallel with a bottom of the transferring unit; and storing the multi-layered ceramic capacitor in a storing space of a packing sheet so that the internal electrodes of the capacitor are substantially parallel with a bottom of the storing space.

摘要翻译： 一种用于多层陶瓷电容器的包装单元，包括：多个多层陶瓷电容器，其厚度TMLCC等于或类似于宽度WMLCC; 以及包括多个存储空间的包装纸，所述电容器存储在所述存储空间中，并且每个电容器的内部电极基本上与所述存储空间的底部平行。 相关方法包括：通过传送单元将具有与宽度WMLCC相等或类似的厚度TMLCC的多个多层陶瓷电容器传送; 向电容器的一侧供给磁场，使得电容器的内部电极基本上平行于转印单元的底部; 以及将所述多层陶瓷电容器存储在包装薄片的收纳空间中，使得所述电容器的内部电极基本上与所述收容空间的底部平行。

公开(公告)号：US20100149769A1

公开(公告)日：2010-06-17

申请号：US12421953

申请日：2009-04-10

申请人： Byoung Hwa LEE ,  Sung Kwon WI ,  Hong Yeon CHO ,  Dong Seok PARK ,  Sang Soo PARK ,  Min Cheol PARK

发明人： Byoung Hwa LEE ,  Sung Kwon WI ,  Hong Yeon CHO ,  Dong Seok PARK ,  Sang Soo PARK ,  Min Cheol PARK

IPC分类号： H05K1/18

CPC分类号： H05K1/0231 ,  H01G2/065 ,  H01G4/35 ,  H05K2201/09318 ,  H05K2201/09481 ,  H05K2201/10636 ,  H05K2201/10969 ,  Y02P70/611

摘要： A circuit board device includes a circuit board comprising a mounting area, and first and second power lines and a ground pad formed on the mounting area, and a vertical multilayer chip capacitor (MLCC) comprising a capacitor body, a plurality of first and second polarity inner electrodes, first and second outer electrodes, and a third outer electrode, wherein the first and second power lines are separately disposed on the mounting area, connected to the first and second outer electrodes, and electrically connected to each other only by the vertical MLCC, and the ground pad is disposed between the first and second power lines and connected to the third outer electrode.

摘要翻译： 一种电路板装置，包括：电路板，包括安装区域;以及第一和第二电力线以及形成在所述安装区域上的接地焊盘;以及垂直多层片状电容器（MLCC），其包括电容器本体，多个第一和第二极性 内电极，第一外电极和第二外电极以及第三外电极，其中第一和第二电源线分别设置在安装区域上，连接到第一外电极和第二外电极，并且仅通过垂直MLCC 并且接地焊盘设置在第一和第二电源线之间并且连接到第三外部电极。

公开(公告)号：US20090059469A1

公开(公告)日：2009-03-05

申请号：US12198342

申请日：2008-08-26

申请人： Byoung Hwa LEE ,  Sung Kwon WI ,  Hae Suk CHUNG ,  Dong Seok PARK ,  Sang So PARK ,  Min Cheol PARK

发明人： Byoung Hwa LEE ,  Sung Kwon WI ,  Hae Suk CHUNG ,  Dong Seok PARK ,  Sang So PARK ,  Min Cheol PARK

IPC分类号： H01G4/06 ,  H01G4/228 ,  H05K7/00

CPC分类号： H01G4/232 ,  H01G4/012 ,  H01G4/30 ,  H01G4/385 ,  H05K1/0231 ,  H05K1/113 ,  H05K2201/09309 ,  H05K2201/09772 ,  H05K2201/0979 ,  H05K2201/10015 ,  H05K2201/10636 ,  Y02P70/611

摘要： Provided is a multilayer chip capacitor including a capacitor body having first and second capacitor units arranged in a lamination direction; and a plurality of external electrodes formed outside the capacitor body. The first capacitor unit includes at least one pair of first and second internal electrodes disposed alternately in an inner part of the capacitor body, the second capacitor unit includes a plurality of third and fourth internal electrodes disposed alternately in an inner part of the capacitor body, and the first to fourth internal electrodes are coupled to the first to fourth external electrodes. The first capacitor unit has a lower equivalent series inductance (ESL) than the second capacitor unit, and the first capacitor unit has a higher equivalent series resistance (ESR) than the second capacitor unit.

摘要翻译： 本发明提供一种多层片状电容器，其包括具有层叠方向配置的第一和第二电容器单元的电容器体; 以及形成在电容器主体外部的多个外部电极。 第一电容器单元包括交替设置在电容器主体的内部的至少一对第一和第二内部电极，第二电容器单元包括交替设置在电容器主体内部的多个第三和第四内部电极， 并且第一至第四内部电极耦合到第一至第四外部电极。 第一电容器单元具有比第二电容器单元更低的等效串联电感（ESL），并且第一电容器单元具有比第二电容器单元更高的等效串联电阻（ESR）。