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1.
公开(公告)号:US08723179B2
公开(公告)日:2014-05-13
申请号:US12957743
申请日:2010-12-01
申请人: Pil-Sang Yun , Ki-Won Kim , Hye-Young Ryu , Woo-Geun Lee , Seung-Ha Choi , Jae-Hyoung Youn , Kyoung-Jae Chung , Young-Wook Lee , Je-Hun Lee , Kap-Soo Yoon , Do-Hyun Kim , Dong-Ju Yang , Young-Joo Choi
发明人: Pil-Sang Yun , Ki-Won Kim , Hye-Young Ryu , Woo-Geun Lee , Seung-Ha Choi , Jae-Hyoung Youn , Kyoung-Jae Chung , Young-Wook Lee , Je-Hun Lee , Kap-Soo Yoon , Do-Hyun Kim , Dong-Ju Yang , Young-Joo Choi
IPC分类号: H01L29/04 , H01L31/036 , H01L31/0376 , H01L31/20
CPC分类号: H01L29/41733 , H01L21/44 , H01L21/441 , H01L21/465 , H01L21/475 , H01L21/47573 , H01L21/47635 , H01L27/1214 , H01L27/1225 , H01L27/127 , H01L27/1288 , H01L29/66969 , H01L29/78606 , H01L29/7869 , H01L29/78696
摘要: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.
摘要翻译: 薄膜晶体管面板包括绝缘基板,设置在绝缘基板上的栅极绝缘层,设置在栅极绝缘层上的氧化物半导体层,设置在氧化物半导体层上的蚀刻停止器,以及设置在源极电极和漏极上的 在蚀刻停止器上。
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公开(公告)号:US08461585B2
公开(公告)日:2013-06-11
申请号:US13111027
申请日:2011-05-19
申请人: Young-Joo Choi , Woo-Geun Lee , Do-Hyun Kim
发明人: Young-Joo Choi , Woo-Geun Lee , Do-Hyun Kim
CPC分类号: H01L27/1225
摘要: A display substrate includes; a gate pattern including a gate electrode disposed on a substrate, a gate insulation layer disposed on the substrate and the gate pattern, an insulation pattern including; a first thickness part disposed on a first area of the gate insulation layer overlapping the gate electrode and a second thickness part disposed on a second area of the gate insulation layer adjacent to the first area, an oxide semiconductor pattern disposed on the first thickness part of the first area, an etch stopper disposed on the oxide semiconductor pattern, a source pattern including a source electrode and a drain electrode which contact the oxide semiconductor pattern, and a pixel electrode which contacts the drain electrode.
摘要翻译: 显示基板包括: 栅极图案,包括设置在基板上的栅极电极,设置在基板上的栅极绝缘层和栅极图案,绝缘图案,包括: 设置在与栅电极重叠的栅极绝缘层的第一区域上的第一厚度部分和设置在与第一区域相邻的栅极绝缘层的第二区域上的第二厚度部分,设置在栅极绝缘层的第一厚度部分上的氧化物半导体图案 第一区域,设置在氧化物半导体图案上的蚀刻停止件,包括与氧化物半导体图案接触的源电极和漏电极的源图案以及与漏电极接触的像素电极。
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公开(公告)号:US08216865B2
公开(公告)日:2012-07-10
申请号:US12772836
申请日:2010-05-03
申请人: Young-Joo Choi , Woo-Geun Lee , Hye-Young Ryu , Ki-Won Kim
发明人: Young-Joo Choi , Woo-Geun Lee , Hye-Young Ryu , Ki-Won Kim
IPC分类号: H01L21/00
CPC分类号: H01L27/124 , C23F1/02 , C23F1/18 , C23F1/26 , H01L21/32134 , H01L21/465 , H01L27/1225
摘要: A display device includes a gate pattern, a semiconductor pattern, a source pattern and a pixel electrode are provided. The gate pattern is formed on a base substrate and includes a gate line and a gate electrode. The semiconductor pattern is formed on the base substrate having the gate pattern and includes an oxide semiconductor. The source pattern is formed from a data metal layer and formed on the base substrate having the semiconductor pattern, and includes a data line, a source electrode and a drain electrode. The data metal layer includes a first copper alloy layer, and a lower surface of the data metal layer substantially coincides with an upper surface of the semiconductor pattern. The pixel electrode is formed on the base substrate having the source pattern and electrically connected to the drain electrode. Thus, manufacturing processes may be simplified, and reliability may be improved.
摘要翻译: 显示装置包括栅极图案,半导体图案,源图案和像素电极。 栅极图案形成在基底基板上,并且包括栅极线和栅电极。 半导体图案形成在具有栅极图案的基底基板上,并且包括氧化物半导体。 源图案由数据金属层形成并形成在具有半导体图案的基底基板上,并且包括数据线,源电极和漏电极。 数据金属层包括第一铜合金层,数据金属层的下表面基本上与半导体图案的上表面重合。 像素电极形成在具有源极图案的基底基板上并与漏电极电连接。 因此,可以简化制造工艺,并且可以提高可靠性。
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公开(公告)号:US08598577B2
公开(公告)日:2013-12-03
申请号:US13177783
申请日:2011-07-07
申请人: Jae-Woo Park , Dong-Hoon Lee , Sung-Haeng Cho , Woo-Geun Lee , Hye-Young Ryu , Young-Joo Choi
发明人: Jae-Woo Park , Dong-Hoon Lee , Sung-Haeng Cho , Woo-Geun Lee , Hye-Young Ryu , Young-Joo Choi
IPC分类号: H01L29/786
CPC分类号: H01L27/1288 , H01L27/1214 , H01L27/1225 , H01L27/124 , H01L29/458
摘要: A display substrate includes a gate line extending in a first direction on a base substrate, a data line on the base substrate and extending in a second direction crossing the first direction, a gate insulating layer on the gate line, a thin-film transistor and a pixel electrode. The thin-film transistor includes a gate electrode electrically connected the gate line, an oxide semiconductor pattern, and source and drain electrodes on the oxide semiconductor pattern and spaced apart from each other. The oxide semiconductor pattern includes a first semiconductor pattern including indium oxide and a second semiconductor pattern including indium-free oxide. The pixel electrode is electrically connected the drain electrode.
摘要翻译: 显示基板包括在基底基板上沿第一方向延伸的栅极线,在基底基板上的数据线,并且沿与第一方向交叉的第二方向延伸,栅极线上的栅极绝缘层,薄膜晶体管和 像素电极。 薄膜晶体管包括栅电极,电极连接栅极线,氧化物半导体图案以及氧化物半导体图案上的源电极和漏电极并彼此间隔开。 氧化物半导体图案包括包括氧化铟的第一半导体图案和包含无铟氧化物的第二半导体图案。 像素电极与漏电极电连接。
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公开(公告)号:US20110079776A1
公开(公告)日:2011-04-07
申请号:US12772836
申请日:2010-05-03
申请人: Young-Joo Choi , Woo-Geun Lee , Hye-Young Ryu , Ki-Won Kim
发明人: Young-Joo Choi , Woo-Geun Lee , Hye-Young Ryu , Ki-Won Kim
IPC分类号: H01L33/26
CPC分类号: H01L27/124 , C23F1/02 , C23F1/18 , C23F1/26 , H01L21/32134 , H01L21/465 , H01L27/1225
摘要: A display device includes a gate pattern, a semiconductor pattern, a source pattern and a pixel electrode are provided. The gate pattern is formed on a base substrate and includes a gate line and a gate electrode. The semiconductor pattern is formed on the base substrate having the gate pattern and includes an oxide semiconductor. The source pattern is formed from a data metal layer and formed on the base substrate having the semiconductor pattern, and includes a data line, a source electrode and a drain electrode. The data metal layer includes a first copper alloy layer, and a lower surface of the data metal layer substantially coincides with an upper surface of the semiconductor pattern. The pixel electrode is formed on the base substrate having the source pattern and electrically connected to the drain electrode. Thus, manufacturing processes may be simplified, and reliability may be improved.
摘要翻译: 显示装置包括栅极图案,半导体图案,源图案和像素电极。 栅极图案形成在基底基板上,并且包括栅极线和栅电极。 半导体图案形成在具有栅极图案的基底基板上,并且包括氧化物半导体。 源图案由数据金属层形成并形成在具有半导体图案的基底基板上,并且包括数据线,源电极和漏电极。 数据金属层包括第一铜合金层,数据金属层的下表面基本上与半导体图案的上表面重合。 像素电极形成在具有源极图案的基底基板上并与漏电极电连接。 因此,可以简化制造工艺,并且可以提高可靠性。
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6.
公开(公告)号:US08994023B2
公开(公告)日:2015-03-31
申请号:US13115088
申请日:2011-05-24
申请人: Hye-Young Ryu , Woo-Geun Lee , Young-Joo Choi , Kyoung-Jae Chung , Jin-Won Lee , Seung-Ha Choi , Hee-Jun Byeon , Pil-Sang Yun
发明人: Hye-Young Ryu , Woo-Geun Lee , Young-Joo Choi , Kyoung-Jae Chung , Jin-Won Lee , Seung-Ha Choi , Hee-Jun Byeon , Pil-Sang Yun
CPC分类号: H01L27/1214 , H01L27/1225 , H01L27/1255
摘要: A thin film transistor array substrate capable of reducing degradation of a device due to degradation of an oxide semiconductor pattern and a method of fabricating the same are provided. The thin film transistor array substrate may include an insulating substrate on which a gate electrode is formed, a gate insulating film formed on the insulating substrate, an oxide semiconductor pattern disposed on the gate insulating film, an anti-etching pattern formed on the oxide semiconductor pattern, and a source electrode and a drain electrode formed on the anti-etching pattern. The oxide semiconductor pattern may include an edge portion positioned between the source electrode and the drain electrode, and the edge portion may include at least one conductive region and at least one non-conductive region.
摘要翻译: 提供了能够降低由于氧化物半导体图案的劣化引起的器件劣化的薄膜晶体管阵列基板及其制造方法。 薄膜晶体管阵列基板可以包括其上形成有栅极的绝缘基板,形成在绝缘基板上的栅极绝缘膜,设置在栅极绝缘膜上的氧化物半导体图案,形成在氧化物半导体上的抗蚀刻图案 图案,以及形成在防蚀刻图案上的源电极和漏电极。 氧化物半导体图案可以包括位于源电极和漏电极之间的边缘部分,并且边缘部分可以包括至少一个导电区域和至少一个非导电区域。
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7.
公开(公告)号:US08796675B2
公开(公告)日:2014-08-05
申请号:US13613566
申请日:2012-09-13
申请人: Je-Hun Lee , Ki-Won Kim , Do-Hyun Kim , Woo-Geun Lee , Kap-Soo Yoon
发明人: Je-Hun Lee , Ki-Won Kim , Do-Hyun Kim , Woo-Geun Lee , Kap-Soo Yoon
IPC分类号: H01L35/24
CPC分类号: H01L27/1225 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02554 , H01L21/02565 , H01L23/53238 , H01L27/124 , H01L27/1248 , H01L27/1262 , H01L29/45 , H01L29/4908 , H01L29/513 , H01L29/518 , H01L29/66969 , H01L29/78603 , H01L29/7869 , H01L2924/0002 , H01L2924/00
摘要: A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.
摘要翻译: TFT阵列基板包括设置在绝缘基板上并包括沟道部分的半导体氧化物层,与半导体氧化物层重叠的栅极电极,插入在半导体氧化物层和栅电极之间的栅极绝缘层,以及设置在 半导体氧化物层和栅电极。 栅极绝缘层和钝化层中的至少一个包括氧氮化物层,并且氧氮化物层在氧氮化物层的位置更靠近半导体氧化物层的位置处具有比氮的浓度高的氧氮化物层。
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公开(公告)号:US08735890B2
公开(公告)日:2014-05-27
申请号:US13328658
申请日:2011-12-16
申请人: Ki-Won Kim , Je-Hun Lee , Sung-Haeng Cho , Woo-Geun Lee , Kap-Soo Yoon , Do-Hyun Kim , Seung-Ha Choi
发明人: Ki-Won Kim , Je-Hun Lee , Sung-Haeng Cho , Woo-Geun Lee , Kap-Soo Yoon , Do-Hyun Kim , Seung-Ha Choi
IPC分类号: H01L29/786
CPC分类号: H01L27/1225 , H01L27/1288
摘要: In a display substrate and a method of manufacturing the display substrate, the display substrate includes a data line, a channel pattern, an insulating pattern and a pixel electrode. The data line extends in a direction on a base substrate. The channel pattern is disposed in a separate region between an input electrode connected to the data line and an output electrode spaced apart from the input electrode. The channel pattern makes contact with the input electrode and the output electrode on the input and output electrodes. The insulating pattern is spaced apart from the channel pattern on the base substrate and includes a contact hole exposing the output electrode. The pixel electrode is formed on the insulating pattern to make contact with the output electrode through the contact hole. Thus, a damage of the oxide semiconductor layer may be minimized and a manufacturing process may be simplified.
摘要翻译: 在显示基板和显示基板的制造方法中,显示基板包括数据线,通道图案,绝缘图案和像素电极。 数据线沿着基底基板上的方向延伸。 通道图案设置在与数据线连接的输入电极和与输入电极间隔开的输出电极之间的分离区域中。 通道图案与输入电极和输出电极上的输出电极接触。 绝缘图案与基底基板上的沟道图案间隔开,并且包括暴露输出电极的接触孔。 像素电极形成在绝缘图案上,以通过接触孔与输出电极接触。 因此,可以使氧化物半导体层的损伤最小化,并且可以简化制造工艺。
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9.
公开(公告)号:US08288766B2
公开(公告)日:2012-10-16
申请号:US12555824
申请日:2009-09-09
申请人: Je-Hun Lee , Ki-Won Kim , Do-Hyun Kim , Woo-Geun Lee , Kap-Soo Yoon
发明人: Je-Hun Lee , Ki-Won Kim , Do-Hyun Kim , Woo-Geun Lee , Kap-Soo Yoon
IPC分类号: H01L29/10
CPC分类号: H01L27/1225 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02554 , H01L21/02565 , H01L23/53238 , H01L27/124 , H01L27/1248 , H01L27/1262 , H01L29/45 , H01L29/4908 , H01L29/513 , H01L29/518 , H01L29/66969 , H01L29/78603 , H01L29/7869 , H01L2924/0002 , H01L2924/00
摘要: A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.
摘要翻译: TFT阵列基板包括设置在绝缘基板上并包括沟道部分的半导体氧化物层,与半导体氧化物层重叠的栅极电极,插入在半导体氧化物层和栅电极之间的栅极绝缘层,以及设置在 半导体氧化物层和栅电极。 栅极绝缘层和钝化层中的至少一个包括氧氮化物层,并且氧氮化物层在氧氮化物层的位置更靠近半导体氧化物层的位置处具有比氮的浓度高的氧氮化物层。
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公开(公告)号:US08624238B2
公开(公告)日:2014-01-07
申请号:US13004665
申请日:2011-01-11
申请人: Jong-In Kim , Young-Wook Lee , Jean-Ho Song , Jae-Hyoung Yoon , Sung-Ryul Kim , Byeong-Beom Kim , Je-Hyeong Park , Woo-Geun Lee
发明人: Jong-In Kim , Young-Wook Lee , Jean-Ho Song , Jae-Hyoung Yoon , Sung-Ryul Kim , Byeong-Beom Kim , Je-Hyeong Park , Woo-Geun Lee
IPC分类号: H01L21/34 , H01L29/786
CPC分类号: H01L27/1225 , H01L27/124 , H01L27/1288
摘要: A thin-film transistor (TFT) substrate having reduced defects is fabricated using a reduced number of masks. The TFT substrate includes gate wiring formed on a substrate. The gate wiring includes a gate electrode. A semiconductor pattern is formed on the gate wiring. An etch-stop pattern is formed on the semiconductor pattern. Data wiring includes a source electrode which is formed on the semiconductor pattern and the etch-stop pattern. Each of the gate wiring and the data wiring includes a copper-containing layer and a buffer layer formed on or under the copper-containing layer.
摘要翻译: 使用减少数量的掩模制造具有减少的缺陷的薄膜晶体管(TFT)基板。 TFT基板包括形成在基板上的栅极布线。 栅极布线包括栅电极。 在栅极布线上形成半导体图形。 在半导体图案上形成蚀刻停止图案。 数据布线包括形成在半导体图案上的源电极和蚀刻停止图案。 栅极布线和数据布线中的每一个包括在含铜层上形成的含铜层和缓冲层。
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