公开(公告)号：US07157548B2

公开(公告)日：2007-01-02

申请号：US10486883

申请日：2002-08-21

申请人： Young-Moo Lee ,  Ho-Burn Park ,  Chang-Hyun Lee

发明人： Young-Moo Lee ,  Ho-Burn Park ,  Chang-Hyun Lee

IPC分类号： C08G73/10

CPC分类号： C08G73/10

摘要： The present invention relates to a new sulfonated polyimides, more specifically to new methods for preparing the polyimides, and cation exchange membranes containing the polyimides. The sulfonated polyimides of the presented invention have excellent proton conductivity and low preparation cost. In particular, the sulfonated polyimides can be used as polymer electrolyte membrane in hydrogen or direct methanol fuel cell for electric vehicles and portable power sources operated with electric energy

摘要翻译： 本发明涉及新的磺化聚酰亚胺，更具体地涉及制备聚酰亚胺的新方法和含有聚酰亚胺的阳离子交换膜。 本发明的磺化聚酰亚胺具有优异的质子传导性和低的制备成本。 特别地，磺化聚酰亚胺可以用作氢气中的聚合物电解质膜或用于电动车辆的直接甲醇燃料电池和用电能操作的便携式电源

公开(公告)号：US20110014544A1

公开(公告)日：2011-01-20

申请号：US12863594

申请日：2008-02-13

申请人： Young-Moo Lee ,  Chang-Hyun Lee ,  Sang-Yun Lee

发明人： Young-Moo Lee ,  Chang-Hyun Lee ,  Sang-Yun Lee

IPC分类号： H01M8/10

CPC分类号： H01M8/1088 ,  H01M8/1025 ,  H01M8/1027 ,  H01M8/103 ,  H01M8/1032 ,  H01M8/1034 ,  H01M8/1039 ,  H01M8/1048 ,  H01M8/1051 ,  H01M2008/1095 ,  Y02P70/56

摘要： A proton exchange polymer membrane whose surface is treated by direct fluorination using a fluorine gas, a membrane-electrode assembly, and a fuel cell comprising the same are provided. The proton exchange polymer membrane of the present invention exhibits improved proton conductivity, high dimensional stability, and decreased methanol permeability through introducing hydrophobic fluorine having high electronegativity to the surface of the polymer membrane. Therefore, the proton exchange polymer membrane with excellent electrochemical properties of the present invention can be preferably utilized as polymer electrolyte membrane for fuel cell, generating electric energy from chemical energy of fuels.

摘要翻译： 提供了通过使用氟气直接氟化处理其表面的质子交换聚合物膜，膜电极组件和包含该质子交换聚合物膜的燃料电池。 本发明的质子交换聚合物膜通过将具有高电负性的疏水性氟引入聚合物膜的表面，显示出改进的质子传导性，高尺寸稳定性和降低的甲醇渗透性。 因此，本发明的具有优异的电化学特性的质子交换聚合物膜可以优选用作燃料电池的聚合物电解质膜，从燃料的化学能产生电能。

公开(公告)号：US08828619B2

公开(公告)日：2014-09-09

申请号：US12863594

申请日：2008-02-13

申请人： Young-Moo Lee ,  Chang-Hyun Lee ,  Sang-Yun Lee

发明人： Young-Moo Lee ,  Chang-Hyun Lee ,  Sang-Yun Lee

IPC分类号： H01M8/10

CPC分类号： H01M8/1088 ,  H01M8/1025 ,  H01M8/1027 ,  H01M8/103 ,  H01M8/1032 ,  H01M8/1034 ,  H01M8/1039 ,  H01M8/1048 ,  H01M8/1051 ,  H01M2008/1095 ,  Y02P70/56

摘要： A proton exchange polymer membrane whose surface is treated by direct fluorination using a fluorine gas, a membrane-electrode assembly, and a fuel cell comprising the same are provided. The proton exchange polymer membrane of the present invention exhibits improved proton conductivity, high dimensional stability, and decreased methanol permeability through introducing hydrophobic fluorine having high electronegativity to the surface of the polymer membrane. Therefore, the proton exchange polymer membrane with excellent electrochemical properties of the present invention can be preferably utilized as polymer electrolyte membrane for fuel cell, generating electric energy from chemical energy of fuels.

摘要翻译： 提供了通过使用氟气直接氟化处理其表面的质子交换聚合物膜，膜电极组件和包含该质子交换聚合物膜的燃料电池。 本发明的质子交换聚合物膜通过将具有高电负性的疏水性氟引入聚合物膜的表面，显示出改进的质子传导性，高尺寸稳定性和降低的甲醇渗透性。 因此，本发明的具有优异的电化学特性的质子交换聚合物膜可以优选用作燃料电池的聚合物电解质膜，从燃料的化学能产生电能。

公开(公告)号：US09324727B2

公开(公告)日：2016-04-26

申请号：US14176332

申请日：2014-02-10

申请人： Chang-Hyun Lee ,  Hyun-Jung Kim ,  Dong-Hoon Jang ,  Albert Fayrushin

发明人： Chang-Hyun Lee ,  Hyun-Jung Kim ,  Dong-Hoon Jang ,  Albert Fayrushin

IPC分类号： H01L27/115 ,  H01L21/762 ,  H01L23/48 ,  H01L29/788

CPC分类号： H01L27/11582 ,  H01L21/76224 ,  H01L27/11551 ,  H01L27/11565 ,  H01L29/7889

摘要： A memory device may include a plurality of semiconductor patterns on a substrate including a plurality of first impurity regions doped at a first impurity concentration, a plurality of second impurity regions at portions of the substrate contacting the plurality of semiconductor patterns and doped at a second impurity concentration, a plurality of channel patterns on the plurality of semiconductor patterns, a plurality of gate structures, a plurality of third impurity regions at portions of the substrate adjacent to end portions of the plurality of gate structures, and a plurality of fourth impurity regions at portions of the substrate between the second and third impurity regions and between adjacent second impurity regions. The plurality of fourth impurity regions may be doped at a third impurity concentration which may be lower than the first and second impurity concentrations.

摘要翻译： 存储器件可以包括在衬底上的多个半导体图案，其包括以第一杂质浓度掺杂的多个第一杂质区域，在与多个半导体图案接触并且以第二杂质掺杂的衬底的部分处的多个第二杂质区域 浓度，多个半导体图案上的多个沟道图案，多个栅极结构，在与多个栅极结构的端部相邻的基板的部分处的多个第三杂质区域，以及多个第四杂质区域 在第二和第三杂质区之间和相邻的第二杂质区之间的衬底的部分。 可以在可以低于第一和第二杂质浓度的第三杂质浓度下掺杂多个第四杂质区域。

公开(公告)号：US08629489B2

公开(公告)日：2014-01-14

申请号：US13357350

申请日：2012-01-24

申请人： Chang-Hyun Lee ,  Jung-Dal Choi

发明人： Chang-Hyun Lee ,  Jung-Dal Choi

IPC分类号： H01L29/76

CPC分类号： H01L27/1052 ,  G11C16/0483 ,  H01L27/11521 ,  H01L27/11524

摘要： A nonvolatile memory device includes a string selection transistor, a plurality of memory cell transistors, and a ground selection transistor electrically connected in series to the string selection transistor and to the pluralities of memory cell transistors. First impurity layers are formed at boundaries of the channels and the source/drain regions of the memory cell transistors. The first impurity layers are doped with opposite conductivity type impurities relative to the source/drain regions of the memory cell transistors. Second impurity layers are formed at boundaries between a channel and a drain region of the string selection transistor and between a channel and a source region of the ground selection transistor. The second impurity layers are doped with the same conductivity type impurities as the first impurity layers and have a higher impurity concentration than the first impurity layers.

摘要翻译： 非易失性存储器件包括串选择晶体管，多个存储单元晶体管和与串选择晶体管和多个存储单元晶体管串联电连接的接地选择晶体管。 在存储单元晶体管的沟道和源极/漏极区的边界处形成第一杂质层。 相对于存储单元晶体管的源/漏区，第一杂质层掺杂有相反导电类型的杂质。 第二杂质层形成在串选择晶体管的沟道和漏极区之间的边界处，并且在地选择晶体管的沟道和源极区之间形成。 第二杂质层掺杂有与第一杂质层相同的导电类型杂质，并且具有比第一杂质层更高的杂质浓度。

公开(公告)号：US08324052B2

公开(公告)日：2012-12-04

申请号：US13010583

申请日：2011-01-20

申请人： Dong-Yean Oh ,  Jai-Hyuk Song ,  Chang-Sub Lee ,  Chang-Hyun Lee ,  Hyun-Jae Kim

发明人： Dong-Yean Oh ,  Jai-Hyuk Song ,  Chang-Sub Lee ,  Chang-Hyun Lee ,  Hyun-Jae Kim

IPC分类号： H01L21/331

CPC分类号： H01L27/11521 ,  H01L21/26586 ,  H01L27/115 ,  H01L27/11524

摘要： A nonvolatile memory device includes a string selection gate and a ground selection gate on a semiconductor substrate, and a plurality of memory cell gates on the substrate between the string selection gate and the ground selection gate. First impurity regions extend into the substrate to a first depth between ones of the plurality of memory cell gates. Second impurity regions extend into the substrate to a second depth that is greater than the first depth between the string selection gate and a first one of the plurality of memory cell gates immediately adjacent thereto, and between the ground selection gate and a last one of the plurality of memory cell gates immediately adjacent thereto. Related fabrication methods are also discussed.

摘要翻译： 非易失性存储器件包括半导体衬底上的串选择栅极和接地选择栅极，以及在串选择栅极和地选择栅极之间的衬底上的多个存储单元栅极。 第一杂质区域延伸到衬底中到多个存储单元门之间的第一深度。 第二杂质区域延伸到衬底中的第二深度，该第二深度大于串选择栅极与紧邻其之间的多个存储单元栅极中的第一深度之间以及在接地选择栅极和最后一个栅极选择栅极之间的第一深度 与其紧邻的多个存储单元门。 还讨论了相关的制造方法。

公开(公告)号：US20110111570A1

公开(公告)日：2011-05-12

申请号：US13010583

申请日：2011-01-20

申请人： Dong-Yean Oh ,  Jai-Hyuk Song ,  Chang-Sub Lee ,  Chang-Hyun Lee ,  Hyun-Jae Kim

发明人： Dong-Yean Oh ,  Jai-Hyuk Song ,  Chang-Sub Lee ,  Chang-Hyun Lee ,  Hyun-Jae Kim

IPC分类号： H01L21/8234

CPC分类号： H01L27/11521 ,  H01L21/26586 ,  H01L27/115 ,  H01L27/11524

摘要： A nonvolatile memory device includes a string selection gate and a ground selection gate on a semiconductor substrate, and a plurality of memory cell gates on the substrate between the string selection gate and the ground selection gate. First impurity regions extend into the substrate to a first depth between ones of the plurality of memory cell gates. Second impurity regions extend into the substrate to a second depth that is greater than the first depth between the string selection gate and a first one of the plurality of memory cell gates immediately adjacent thereto, and between the ground selection gate and a last one of the plurality of memory cell gates immediately adjacent thereto. Related fabrication methods are also discussed.

摘要翻译： 非易失性存储器件包括半导体衬底上的串选择栅极和接地选择栅极，以及在串选择栅极和地选择栅极之间的衬底上的多个存储单元栅极。 第一杂质区域延伸到衬底中到多个存储单元门之间的第一深度。 第二杂质区域延伸到衬底中的第二深度，该第二深度大于串选择栅极与紧邻其之间的多个存储单元栅极中的第一深度之间以及在接地选择栅极和最后一个栅极选择栅极之间的第一深度 与其紧邻的多个存储单元门。 还讨论了相关的制造方法。

公开(公告)号：US20110079838A1

公开(公告)日：2011-04-07

申请号：US12961678

申请日：2010-12-07

申请人： Chang-Hyun Lee ,  Jung-Dal Choi ,  Chang-Seok Kang ,  Jin-Taek Park ,  Byeong-In Choe

发明人： Chang-Hyun Lee ,  Jung-Dal Choi ,  Chang-Seok Kang ,  Jin-Taek Park ,  Byeong-In Choe

IPC分类号： H01L29/788 ,  H01L29/792

CPC分类号： H01L27/1157 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11578 ,  H01L29/42352 ,  H01L29/7851 ,  H01L29/792

摘要： A method of fabricating a semiconductor device includes forming a fin-shaped active region including opposing sidewalls and a surface therebetween protruding from a substrate, forming a gate structure on the surface of the active region, and performing an ion implantation process to form source/drain regions in the active region at opposite sides of the gate structure. The source/drain regions respectively include a first impurity region in the surface of the active region and second impurity regions in the opposing sidewalls of the active region. The first impurity region has a doping concentration that is greater than that of the second impurity regions. Related devices are also discussed.

摘要翻译： 一种制造半导体器件的方法包括：形成鳍状有源区，包括相对的侧壁和从衬底突出的表面，在有源区的表面上形成栅极结构，并执行离子注入工艺以形成源极/漏极 在栅极结构的相对侧的有源区中的区域。 源极/漏极区域分别包括有源区的表面中的第一杂质区域和有源区的相对侧壁中的第二杂质区。 第一杂质区域的掺杂浓度大于第二杂质区域的掺杂浓度。 还讨论了相关设备。

公开(公告)号：US20110045647A1

公开(公告)日：2011-02-24

申请号：US12916718

申请日：2010-11-01

申请人： Jin-Hwa Heo ,  Chul-Sung Kim ,  Bon-Young Koo ,  Ki-Hyun Hwang ,  Chang-Hyun Lee

发明人： Jin-Hwa Heo ,  Chul-Sung Kim ,  Bon-Young Koo ,  Ki-Hyun Hwang ,  Chang-Hyun Lee

IPC分类号： H01L21/336

CPC分类号： H01L29/792 ,  H01L21/28202 ,  H01L21/28282 ,  H01L29/4234 ,  H01L29/513 ,  H01L29/518

摘要： A non-volatile memory device includes a dielectric layer between a charge storage layer and a substrate. Free bonds of the dielectric layer can be reduced to reduce/prevent charges from leaking through the free bonds and/or from being trapped by the free bonds. As a result, data retention properties and/or durability of a non-volatile memory device may be enhanced.

摘要翻译： 非易失性存储器件包括电荷存储层和衬底之间的电介质层。 可以减少电介质层的自由键，以减少/防止电荷通过游离键泄漏和/或被游离键捕获。 结果，可以增强非挥发性存储器件的数据保持性能和/或耐久性。

公开(公告)号：US07894266B2

公开(公告)日：2011-02-22

申请号：US12236916

申请日：2008-09-24

申请人： Chang-Hyun Lee

发明人： Chang-Hyun Lee

IPC分类号： G11C16/04

CPC分类号： G11C16/3418 ,  G11C16/3427

摘要： A non-volatile memory device includes an array of flash memory cells therein and a voltage generator. The voltage generator is configured to generate a program voltage (Vpgm), a pass voltage (Vpass), a blocking voltage (Vblock) and a decoupling voltage (Vdcp) during a flash memory programming operation. The blocking voltage is generated at a level that inhibits inadvertent programming of an unselected memory cell(s). This voltage level of the blocking voltage is set so that Vdcp

摘要翻译： 非易失性存储器件包括其中的闪存单元阵列和电压发生器。 电压发生器被配置为在闪速存储器编程操作期间产生编程电压（Vpgm），通过电压（Vpass），阻断电压（Vblock）和去耦电压（Vdcp）。 阻塞电压产生在抑制非选择存储单元的无意编程的水平。 该阻塞电压的电压电平被设定为使得Vdcp