摘要:
Provided is a nitride electronic device having a structure that allows the reduction of leakage by preventing the carrier concentration from increasing in a channel layer. An inclined surface and a primary surface of a semiconductor stack extend along first and second reference planes R1, R2, respectively. The primary surface of the stack is inclined at an angle ranging from 5 to 40 degrees with respect to a reference axis indicating a c-axis direction of hexagonal group III nitride. An axis normal to the plane R1 and the axis form an angle smaller than the angle an axis normal to the plane R2 and the axis form. The oxygen concentration of the channel layer is lower than 1×1017 cm−3. It becomes possible to avoid increase in carrier concentration of the channel layer caused by the oxygen addition, thereby reducing leakage current via the channel layer in the transistor.
摘要:
The semiconductor device is formed in the form of a GaN-based stacked layer including an n-type drift layer 4, a p-type layer 6, and an n-type top layer 8. The semiconductor device includes a regrown layer 27 formed so as to cover a portion of the GaN-based stacked layer that is exposed to an opening 28, the regrown layer 27 including a channel. The channel is two-dimensional electron gas formed at an interface between the electron drift layer and the electron supply layer. When the electron drift layer 22 is assumed to have a thickness of d, the p-type layer 6 has a thickness in the range of d to 10d, and a graded p-type impurity layer 7 whose concentration decreases from a p-type impurity concentration in the p-type layer is formed so as to extend from a (p-type layer/n-type top layer) interface to the inside of the n-type top layer.
摘要:
A vertical semiconductor device in which pinch-off characteristics and breakdown voltage characteristics can be stably improved by fixing the electric potential of a p-type GaN barrier layer with certainty is provided. The semiconductor device includes a GaN-based stacked layer having an opening, a regrown layer including a channel located so as to cover a wall surface of the opening, an n+-type source layer that is in ohmic contact with the source electrode, a p-type GaN barrier layer, and a p+-type GaN-based supplementary layer located between the p-type GaN barrier layer and the n+-type source layer. The p+-type GaN-based supplementary layer and the n+-type source layer form a tunnel junction to fix the electric potential of the p-type GaN barrier layer at a source potential.
摘要翻译:提供了通过确定地固定p型GaN势垒层的电位可以稳定地提高夹断特性和击穿电压特性的垂直半导体器件。 半导体器件包括具有开口的GaN基层叠层,包含覆盖开口壁面的沟道的再生长层,与源电极欧姆接触的n +型源极,p 位于p型GaN势垒层和n +型源极层之间的p +型GaN基辅助层。 p +型GaN基辅助层和n +型源极层形成隧道结,以将p型GaN阻挡层的电位固定在源极电位。
摘要:
There are provided a semiconductor device in which a drain leak current can be reduced in the transistor operation while high vertical breakdown voltage is achieved and a method for producing the semiconductor device. In the semiconductor device, an opening 28 that extends from an n+-type contact layer 8 and reaches an n-type drift layer 4 through a p-type barrier layer 6 is formed. The semiconductor device includes a regrown layer 27 located so as to cover portions of the p-type barrier layer 6 and the like that are exposed to the opening, the regrown layer 27 including an undoped GaN channel layer 22 and a carrier supply layer 26; an insulating layer 9 located so as to cover the regrown layer 27; and a gate electrode G located on the insulating layer 9. In the p-type barrier layer, the Mg concentration A (cm−3)and the hydrogen concentration B (cm−3) satisfy 0.1
摘要:
A vertical semiconductor device in which pinch-off characteristics and breakdown voltage characteristics can be stably improved by fixing the electric potential of a p-type GaN barrier layer with certainty is provided. The semiconductor device includes a GaN-based stacked layer having an opening, a regrown layer including a channel located so as to cover a wall surface of the opening, an n+-type source layer that is in ohmic contact with the source electrode, a p-type GaN barrier layer, and a p+-type GaN-based supplementary layer located between the p-type GaN barrier layer and the n+-type source layer. The p+-type GaN-based supplementary layer and the n+-type source layer form a tunnel junction to fix the electric potential of the p-type GaN barrier layer at a source potential.
摘要翻译:提供了通过确定地固定p型GaN势垒层的电位可以稳定地提高夹断特性和击穿电压特性的垂直半导体器件。 半导体器件包括具有开口的GaN基层叠层,包含覆盖开口壁面的沟道的再生长层,与源电极欧姆接触的n +型源极,p 位于p型GaN势垒层和n +型源极层之间的p +型GaN基辅助层。 p +型GaN基辅助层和n +型源极层形成隧道结,以将p型GaN阻挡层的电位固定在源极电位。
摘要:
There are provided a semiconductor device in which a drain leak current can be reduced in the transistor operation while high vertical breakdown voltage is achieved and a method for producing the semiconductor device. In the semiconductor device, an opening 28 that extends from an n+-type contact layer 8 and reaches an n-type drift layer 4 through a p-type barrier layer 6 is formed. The semiconductor device includes a regrown layer 27 located so as to cover portions of the p-type barrier layer 6 and the like that are exposed to the opening, the regrown layer 27 including an undoped GaN channel layer 22 and a carrier supply layer 26; an insulating layer 9 located so as to cover the regrown layer 27; and a gate electrode G located on the insulating layer 9. In the p-type barrier layer, the Mg concentration A (cm−3)and the hydrogen concentration B (cm−3) satisfy 0.1
摘要:
A method for manufacturing a heterojunction field effect transistor 1 comprises the steps of: epitaxially growing a drift layer 20a on a support substrate 10; epitaxially growing a current blocking layer 20b which is a p-type semiconductor layer on the drift layer 20a at a temperature equal to or higher than 1000° C. by using hydrogen gas as a carrier gas; and epitaxially growing a contact layer 20c on the current blocking layer 20b by using at least one gas selected from the group consisting of nitrogen gas, argon gas, helium gas, and neon gas as a carrier gas.
摘要:
There is provided a vertical GaN-based semiconductor device in which the on-resistance can be decreased while the breakdown voltage characteristics are improved using a p-type GaN barrier layer. The semiconductor device includes a regrown layer 27 including a channel located on a wall surface of an opening 28, a p-type barrier layer 6 whose end face is covered, a source layer 7 that is in contact with the p-type barrier layer, a gate electrode G located on the regrown layer, and a source electrode S located around the opening. In the semiconductor device, the source layer has a superlattice structure that is constituted by a stacked layer including a first layer (a layer) having a lattice constant smaller than that of the p-type barrier layer and a second layer (b layer) having a lattice constant larger than that of the first layer.
摘要:
It is an object to improve the breakdown voltage characteristics of a vertical semiconductor device having an opening and including a channel formed of two-dimensional electron gas in the opening. The vertical semiconductor device includes a GaN-based stacked layer 15 having an opening 28 and the GaN-based stacked layer 15 includes n-type GaN-based drift layer 4/p-type GaN-based barrier layer 6/n-type GaN-based contact layer 7. The vertical semiconductor device includes a regrown layer 27 located so as to cover the opening, the regrown layer 27 including an electron drift layer 22 and an electron supply layer 26, a source electrode S, and a gate electrode G located on the regrown layer. The gate electrode G covers a portion having a length corresponding to the thickness of the p-type GaN-based barrier layer and is terminated at a position on the wall surface, the position being away from the bottom portion of the opening.
摘要:
There is provided a vertical GaN-based semiconductor device in which the on-resistance can be decreased while the breakdown voltage characteristics are improved using a p-type GaN barrier layer. The semiconductor device includes a regrown layer 27 including a channel located on a wall surface of an opening 28, a p-type barrier layer 6 whose end face is covered, a source layer 7 that is in contact with the p-type barrier layer, a gate electrode G located on the regrown layer, and a source electrode S located around the opening. In the semiconductor device, the source layer has a superlattice structure that is constituted by a stacked layer including a first layer (a layer) having a lattice constant smaller than that of the p-type barrier layer and a second layer (b layer) having a lattice constant larger than that of the first layer.