公开(公告)号：US20070020816A1

公开(公告)日：2007-01-25

申请号：US11326749

申请日：2006-01-05

申请人： Yu-Tang Pan ,  Geng-Shin Shen ,  Chun-Hung Lin

发明人： Yu-Tang Pan ,  Geng-Shin Shen ,  Chun-Hung Lin

IPC分类号： H01L21/00

CPC分类号： H01L23/3128 ,  H01L21/4857 ,  H01L24/45 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/06136 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/92147 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/18165 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A manufacturing process for chip package without core is disclosed. First of all, a conductive layer with a first surface and a second surface is provided. A first film is formed onto the first surface, and the conductive layer is patterned to form a patterned circuit layer. A solder resistance layer is formed on the patterned circuit layer and then patterned to expose parts of the patterned circuit layer. After a second film is formed on the solder resistance layer and the first film is removed, a chip is disposed on the first surface and electrically connected to the patterned circuit layer. A molding compound is formed to cover the patterned circuit layer and fix the chip onto the patterned circuit layer. After that, the second film is removed.

摘要翻译： 公开了一种无芯片封装的制造工艺。 首先，提供具有第一表面和第二表面的导电层。 第一膜形成在第一表面上，并且导电层被图案化以形成图案化的电路层。 在图案化电路层上形成阻焊层，然后将其图案化以暴露图案化电路层的部分。 在阻焊层上形成第二膜并且去除第一膜之后，在第一表面上设置芯片并与图案化电路层电连接。 形成模塑料以覆盖图案化电路层并将芯片固定在图案化电路层上。 之后，第二个膜被去除。

公开(公告)号：US07560306B2

公开(公告)日：2009-07-14

申请号：US11326749

申请日：2006-01-05

申请人： Yu-Tang Pan ,  Geng-Shin Shen ,  Chun-Hung Lin

发明人： Yu-Tang Pan ,  Geng-Shin Shen ,  Chun-Hung Lin

IPC分类号： H01L21/50 ,  H01L21/48

CPC分类号： H01L23/3128 ,  H01L21/4857 ,  H01L24/45 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/06136 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/92147 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/18165 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A manufacturing process for chip package without core is disclosed. First of all, a conductive layer with a first surface and a second surface is provided. A first film is formed onto the first surface, and the conductive layer is patterned to form a patterned circuit layer. A solder resistance layer is formed on the patterned circuit layer and then patterned to expose parts of the patterned circuit layer. After a second film is formed on the solder resistance layer and the first film is removed, a chip is disposed on the first surface and electrically connected to the patterned circuit layer. A molding compound is formed to cover the patterned circuit layer and fix the chip onto the patterned circuit layer. After that, the second film is removed.

摘要翻译： 公开了一种无芯片封装的制造工艺。 首先，提供具有第一表面和第二表面的导电层。 第一膜形成在第一表面上，并且导电层被图案化以形成图案化的电路层。 在图案化电路层上形成阻焊层，然后将其图案化以暴露图案化电路层的部分。 在阻焊层上形成第二膜并且去除第一膜之后，在第一表面上设置芯片并与图案化电路层电连接。 形成模塑料以覆盖图案化电路层并将芯片固定在图案化电路层上。 之后，第二个膜被去除。

公开(公告)号：US20090026632A1

公开(公告)日：2009-01-29

申请号：US12244553

申请日：2008-10-02

申请人： Geng-Shin Shen ,  Chun-Hung Lin

发明人： Geng-Shin Shen ,  Chun-Hung Lin

IPC分类号： H01L23/52 ,  H01L21/00

CPC分类号： H01L23/49575 ,  H01L21/563 ,  H01L21/6836 ,  H01L23/3107 ,  H01L23/4951 ,  H01L23/49513 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2224/0401 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/29007 ,  H01L2224/29101 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/83191 ,  H01L2224/83194 ,  H01L2224/83855 ,  H01L2224/83856 ,  H01L2224/85 ,  H01L2224/92147 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wafer treating method for making adhesive chips is provided. A liquid adhesive with two-stage property is coated on a surface of a wafer. Then, the wafer is pre-cured to make the liquid adhesive transform an adhesive film having B-stage property which has a glass transition temperature between −40 and 175 degree C., for example. After positioning the wafer, the wafer is singulated to form a plurality of chips with adhesive for chip-to-chip stacking, chip-to-substrate or chip-to-lead frame attaching.

摘要翻译： 提供了制造粘合剂芯片的晶片处理方法。 具有两级特性的液体粘合剂涂覆在晶片的表面上。 然后，将晶片预固化，以使液体粘合剂例如具有玻璃化转变温度在-40至175℃之间的具有B阶特性的粘合剂膜。 在晶片定位之后，晶片被单片化以形成具有用于芯片到芯片堆叠，芯片到衬底或芯片到引线框架连接的粘合剂的多个芯片。

公开(公告)号：US20070063344A1

公开(公告)日：2007-03-22

申请号：US11234774

申请日：2005-09-22

申请人： Chun-Hung Lin ,  Geng-Shin Shen

发明人： Chun-Hung Lin ,  Geng-Shin Shen

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L25/0657 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/90 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13144 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/731 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A chip package structure including a first substrate, a second substrate, bumps and adhesive blocks is provided. The first substrate has first bonding pads. The second substrate is disposed above the first substrate and has second bonding pads. The bumps are respectively arranged on the first bonding pads or the second bonding pads, and the second substrate is electrically connected to the first substrate through the bumps. The adhesive material with B-stage property are respectively arranged between the first bonding pads and the second bonding pads and enclose each bump. The bumps can be stud bumps or plating bumps.

公开(公告)号：US07446407B2

公开(公告)日：2008-11-04

申请号：US11217978

申请日：2005-08-31

申请人： Chun-Hung Lin ,  Geng-Shin Shen

发明人： Chun-Hung Lin ,  Geng-Shin Shen

IPC分类号： H01L23/12 ,  H01L23/34 ,  H01L23/10 ,  H01L23/31 ,  H01L21/50 ,  H01L21/48 ,  H01L21/44

CPC分类号： H01L23/3114 ,  H01L23/13 ,  H01L23/36 ,  H01L24/48 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A chip package structure includes a substrate, a chip, a first B-stage adhesive, bonding wires, a heat sink and a molding compound. The substrate comprises a first surface, a second surface and a through hole. The chip is arranged on the first surface of the substrate and electrically connected thereto while the through hole of the substrate exposes a portion of the chip. The first B-stage adhesive is arranged between the chip and the first surface of the substrate, and the chip is attached to the substrate through the first B-stage adhesive. The bonding wires are connected between the chip exposed by the through hole and second surface of the substrate. The heat sink is arranged on the first surface of the substrate, covering the chip. The molding compound is arranged on the second surface of the substrate, covering a portion of the substrate and bonding wires.

摘要翻译： 芯片封装结构包括基板，芯片，第一B阶粘合剂，接合线，散热片和模塑料。 基板包括第一表面，第二表面和通孔。 芯片布置在基板的第一表面上并与之电连接，同时基板的通孔暴露芯片的一部分。 第一B级粘合剂布置在芯片和基板的第一表面之间，并且芯片通过第一B级粘合剂附接到基板。 接合线连接在由通孔暴露的芯片和基板的第二表面之间。 散热器布置在基板的第一表面上，覆盖芯片。 模塑料配置在基板的第二表面上，覆盖基板的一部分和接合线。

公开(公告)号：US20070215992A1

公开(公告)日：2007-09-20

申请号：US11481719

申请日：2006-07-05

申请人： Geng-Shin Shen ,  Chun-Hung Lin

发明人： Geng-Shin Shen ,  Chun-Hung Lin

IPC分类号： H01L23/495

CPC分类号： H01L23/49575 ,  H01L21/563 ,  H01L21/6836 ,  H01L23/3107 ,  H01L23/4951 ,  H01L23/49513 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2224/0401 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/29007 ,  H01L2224/29101 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/83191 ,  H01L2224/83194 ,  H01L2224/83855 ,  H01L2224/83856 ,  H01L2224/85 ,  H01L2224/92147 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wafer treating method for making adhesive chips is provided. A liquid adhesive with two-stage property is coated on a surface of a wafer. Then, the wafer is pre-cured to make the liquid adhesive transform an adhesive film having B-stage property which has a glass transition temperature between −40 and 175 degree C. for example. After positioning the wafer, the wafer is singulated to form a plurality of chips with adhesive for chip-to-chip stacking, chip-to-substrate or chip-to-lead frame attaching.

摘要翻译： 提供了制造粘合剂芯片的晶片处理方法。 具有两级特性的液体粘合剂涂覆在晶片的表面上。 然后，将晶片预固化，以使液体粘合剂例如具有玻璃化转变温度在-40至175℃之间的具有B阶特性的粘合剂膜。 在晶片定位之后，晶片被单片化以形成具有用于芯片到芯片堆叠，芯片到衬底或芯片到引线框架连接的粘合剂的多个芯片。

公开(公告)号：US20070063325A1

公开(公告)日：2007-03-22

申请号：US11361646

申请日：2006-02-24

申请人： Chun-Hung Lin ,  Geng-Shin Shen

发明人： Chun-Hung Lin ,  Geng-Shin Shen

IPC分类号： H01L21/00

CPC分类号： H01L25/0657 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/90 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13144 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/731 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A chip package structure including a first substrate, a second substrate, bumps and adhesive blocks is provided. The first substrate has first bonding pads. The second substrate is disposed above the first substrate and has second bonding pads. The bumps are respectively arranged on the first bonding pads or the second bonding pads, and the second substrate is electrically connected to the first substrate through the bumps. The adhesive material with B-stage property are respectively arranged between the first bonding pads and the second bonding pads and enclose each bump. The bumps can be stud bumps or plating bumps.

摘要翻译： 提供了包括第一基板，第二基板，凸块和粘合块的芯片封装结构。 第一衬底具有第一接合焊盘。 第二基板设置在第一基板上方并具有第二接合焊盘。 凸块分别布置在第一接合焊盘或第二接合焊盘上，并且第二衬底通过凸块电连接到第一衬底。 具有B阶特性的粘合剂材料分别布置在第一接合焊盘和第二接合焊盘之间并且包围每个凸块。 凸块可以是凸块或电镀凸块。

公开(公告)号：US20070045835A1

公开(公告)日：2007-03-01

申请号：US11217978

申请日：2005-08-31

申请人： Chun-Hung Lin ,  Geng-Shin Shen

发明人： Chun-Hung Lin ,  Geng-Shin Shen

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/3114 ,  H01L23/13 ,  H01L23/36 ,  H01L24/48 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A chip package structure includes a substrate, a chip, a first B-stage adhesive, bonding wires, a heat sink and a molding compound. The substrate comprises a first surface, a second surface and a through hole. The chip is arranged on the first surface of the substrate and electrically connected thereto while the through hole of the substrate exposes a portion of the chip. The first B-stage adhesive is arranged between the chip and the first surface of the substrate, and the chip is attached to the substrate through the first B-stage adhesive. The bonding wires are connected between the chip exposed by the through hole and second surface of the substrate. The heat sink is arranged on the first surface of the substrate, covering the chip. The molding compound is arranged on the second surface of the substrate, covering a portion of the substrate and bonding wires.

摘要翻译： 芯片封装结构包括基板，芯片，第一B阶粘合剂，接合线，散热片和模塑料。 基板包括第一表面，第二表面和通孔。 芯片布置在基板的第一表面上并与之电连接，同时基板的通孔暴露芯片的一部分。 第一B级粘合剂布置在芯片和基板的第一表面之间，并且芯片通过第一B级粘合剂附接到基板。 接合线连接在由通孔暴露的芯片和基板的第二表面之间。 散热器布置在基板的第一表面上，覆盖芯片。 模塑料配置在基板的第二表面上，覆盖基板的一部分和接合线。

公开(公告)号：US20080017961A1

公开(公告)日：2008-01-24

申请号：US11530165

申请日：2006-09-08

申请人： Chun-Hung Lin ,  Shih-Wen Chou ,  Yu-Tang Pan

发明人： Chun-Hung Lin ,  Shih-Wen Chou ,  Yu-Tang Pan

IPC分类号： H01L21/00

CPC分类号： H01L23/49816 ,  H01L21/561 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/92147 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A manufacturing method of a chip package structure is provided. A circuit substrate having a first surface, a second surface, and a through hole connecting the first surface and the second surface is provided. A chip having an active surface and bonding pads disposed on the active surface is provided. The chip is fixed on the circuit substrate, wherein the second surface is opposite to the active surface and the bonding pads are exposed to the through hole. Bonding wires connecting the bonding pads and the first surface are formed through the through hole. A film having an opening is formed on the first surface. The bonding wires, the bonding pads, the through hole, and part of the first surface are exposed by the opening. An encapsulant is formed to encapsulate part of the active surface, the bonding wires, and part of the first surface. The film is removed.

摘要翻译： 提供了一种芯片封装结构的制造方法。 提供具有第一表面，第二表面和连接第一表面和第二表面的通孔的电路基板。 提供具有有源表面的芯片和设置在有源表面上的接合焊盘。 芯片固定在电路基板上，其中第二表面与有源表面相对，并且焊盘暴露于通孔。 通过通孔形成连接接合焊盘和第一表面的接合线。 具有开口的膜形成在第一表面上。 接合线，接合焊盘，通孔和第一表面的一部分由开口露出。 形成密封剂以封装部分活性表面，接合线和第一表面的一部分。 电影被删除。

公开(公告)号：US20070228581A1

公开(公告)日：2007-10-04

申请号：US11761299

申请日：2007-06-11

申请人： Shih-Wen Chou ,  Chun-Hung Lin ,  Wu-Chang Tu ,  Yu-Tang Pan

发明人： Shih-Wen Chou ,  Chun-Hung Lin ,  Wu-Chang Tu ,  Yu-Tang Pan

IPC分类号： H01L23/52

CPC分类号： H01L23/13 ,  H01L23/3114 ,  H01L23/49816 ,  H01L24/10 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/85186 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A universal chip package structure including a carrier, a chip, a plurality of bonding wires, and a molding compound is provided. The carrier has a plurality of through holes, a carrying surface, and a back surface corresponding to the carrying surface. The back surface has a plurality of contacts around the through holes. The chip with an active surface and a plurality of bonding pads on the active surface is disposed on the carrying surface. The active surface is attached to the carrying surface and the through holes expose the bonding pads. The bonding wires go through the through holes to electrically connect with the bonding pads and the contacts. In addition, the shape and size of the molding compound can be adjusted for covering the chip, the contacts, and the bonding wires.

摘要翻译： 提供了包括载体，芯片，多个接合线和模塑料的通用芯片封装结构。 载体具有多个通孔，承载表面和对应于承载表面的后表面。 后表面具有围绕通孔的多个触点。 具有活性表面的芯片和有源表面上的多个接合焊盘设置在承载表面上。 活性表面附着在承载表面上，通孔露出接合垫。 接合线穿过通孔，以与接合焊盘和触点电连接。 此外，可以调整模塑料的形状和尺寸以覆盖芯片，触点和接合线。