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    CAPACITOR HAVING SEPARATE TERMINALS ON THREE OR MORE SIDES AND METHODS OF FABRICATION
    1.
    发明申请
    CAPACITOR HAVING SEPARATE TERMINALS ON THREE OR MORE SIDES AND METHODS OF FABRICATION 审中-公开
    在三面或三面以上具有单独端子的电容器和制造方法

    公开(公告)号：US20060256502A1

    公开(公告)日：2006-11-16

    申请号：US11460290

    申请日：2006-07-27

    申请人： Yuan-Liang Li ,  David Figueroa ,  Chee-Yee Chung

    发明人： Yuan-Liang Li ,  David Figueroa ,  Chee-Yee Chung

    IPC分类号： H01G4/228

    CPC分类号： H01G4/232

    摘要： A multilayer capacitor comprises separate terminals on at least three sides, and on as many as six sides. The capacitor can be fabricated in a large number of different configurations, types, and sizes, depending upon the target application. The separate terminals that are disposed on different sides of the capacitor can be readily coupled to a variety of different adjacent conductors, such as die terminals (including bumpless terminals or bars), IC package terminals (including pads or bars), and the terminals of adjacent discrete components. Methods of fabrication, as well as application of the capacitor to an electronic assembly, are also described.

    摘要翻译： 多层电容器包括在至少三个侧面上以及多达六个侧面的分开的端子。 根据目标应用，电容器可以以大量不同的配置，类型和尺寸制造。 设置在电容器的不同侧上的单独的端子可以容易地耦合到各种不同的相邻导体，例如模具端子（包括无扰动端子或条），IC封装端子（包括焊盘或条），以及端子 相邻的分立元件。 还描述了制造方法以及将电容器应用于电子组件。

    Capacitors having separate terminals on three or more sides
    3.
    发明授权
    Capacitors having separate terminals on three or more sides 失效
    电容器在三面或三面以上具有独立的端子

    公开(公告)号：US07176565B2

    公开(公告)日：2007-02-13

    申请号：US10006188

    申请日：2001-12-03

    申请人： Yuan-Liang Li ,  David G. Figueroa ,  Chee-Yee Chung

    发明人： Yuan-Liang Li ,  David G. Figueroa ,  Chee-Yee Chung

    IPC分类号： H01L23/34

    CPC分类号： H01G4/232

    摘要： A multilayer capacitor comprises separate terminals on at least three sides, and on as many as six sides. The capacitor can be fabricated in a large number of different configurations, types, and sizes, depending upon the target application. The separate terminals that are disposed on different sides of the capacitor can be readily coupled to a variety of different adjacent conductors, such as die terminals (including bumpless terminals or bars), IC package terminals (including pads or bars), and the terminals of adjacent discrete components. Methods of fabrication, as well as application of the capacitor to an electronic assembly, are also described.

    摘要翻译： 多层电容器包括在至少三个侧面上以及多达六个侧面的分开的端子。 根据目标应用，电容器可以以大量不同的配置，类型和尺寸制造。 设置在电容器的不同侧上的单独的端子可以容易地耦合到各种不同的相邻导体，例如模具端子（包括无扰动端子或条），IC封装端子（包括焊盘或条），以及端子 相邻的分立元件。 还描述了制造方法以及将电容器应用于电子组件。

    Embedded enclosure for effective electromagnetic radiation reduction
    4.
    发明授权
    Embedded enclosure for effective electromagnetic radiation reduction 有权
    嵌入式外壳，有效减少电磁辐射

    公开(公告)号：US06559484B1

    公开(公告)日：2003-05-06

    申请号：US09672619

    申请日：2000-09-29

    申请人： Yuan-Liang Li ,  Chee-Yee Chung ,  David G. Figueroa

    发明人： Yuan-Liang Li ,  Chee-Yee Chung ,  David G. Figueroa

    IPC分类号： H01L2710

    CPC分类号： H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/17181 ,  H01L2924/01019 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19104 ,  H01L2924/19106 ,  H01L2924/3025

    摘要： In one embodiment of the invention, an embedded enclosure includes a power plane and first and second ground planes. The power plane has a power surface and a power periphery, and couples power to signals of an integrated circuit operating at a fundamental frequency. The first and second ground planes have first and second ground surfaces and first and second ground peripheries, respectively. The first and second ground planes couple ground to the signals. The first and second ground planes are separated from the power plane by first and second distances, respectively. The first and second ground surfaces are larger than the power surface. The first and second ground peripheries extend at least third and fourth distances from the power periphery, respectively. The third and fourth distances are N and M times larger than the first and second distances, respectively.

    摘要翻译： 在本发明的一个实施例中，嵌入式外壳包括电源平面以及第一和第二接地平面。 电力平面具有功率表面和功率外围，并且将功率耦合到以基频工作的集成电路的信号。 第一和第二接地平面分别具有第一和第二接地表面以及第一和第二接地外围。 第一和第二接地平面将信号耦合到地面。 第一和第二接地平面分别与动力平面分开第一和第二距离。 第一和第二接地表面大于功率表面。 第一和第二接地周边分别从功率周边延伸至少第三和第四距离。 第三和第四距离分别比第一和第二距离大N和M倍。

    Integral capacitor using embedded enclosure for effective electromagnetic radiation reduction
    5.
    发明授权
    Integral capacitor using embedded enclosure for effective electromagnetic radiation reduction 有权
    集成电容器采用嵌入式外壳，有效减少电磁辐射

    公开(公告)号：US06509640B1

    公开(公告)日：2003-01-21

    申请号：US09675789

    申请日：2000-09-29

    申请人： Yuan-Liang Li ,  Chee-Yee Chung ,  David G. Figueroa

    发明人： Yuan-Liang Li ,  Chee-Yee Chung ,  David G. Figueroa

    IPC分类号： H01L2348

    CPC分类号： H01L23/49822 ,  H01L23/49838 ,  H01L23/5383 ,  H01L23/552 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19104 ,  H01L2924/19106 ,  H01L2924/3025 ,  Y10S257/916 ,  H01L2224/0401

    摘要： In one embodiment of the invention, an integral capacitor includes a power plane, a ground plane, and a dielectric layer. The power plane has a power surface and a power periphery. The power plane couples power to signals of an integrated circuit operating at a fundamental frequency. The first ground plane have a first ground surface and a first ground periphery. The first ground plane couples ground to the signals. The first ground plane is separated from the power plane by a first distance. The first ground surface is larger than the power surface and the first ground periphery extends at least a second distance from the power periphery. The second distance is at least larger than N times the first distance. The dielectric layer is formed between the power plane and the first ground plane.

    摘要翻译： 在本发明的一个实施例中，整体电容器包括电源平面，接地平面和电介质层。 动力平面具有动力面和动力周边。 电力平面将功率耦合到以基频工作的集成电路的信号。 第一接地平面具有第一接地表面和第一接地边缘。 第一个接地平面将信号耦合到地面。 第一接地平面与动力平面分开第一距离。 第一接地表面大于功率表面，并且第一接地周边从功率周边延伸至少第二距离。 第二距离至少大于第一距离的N倍。 电介质层形成在电源平面和第一接地平面之间。

    Embedded capacitor assembly in a package
    6.
    发明授权
    Embedded capacitor assembly in a package 有权
    嵌入式电容器组装在一个封装中

    公开(公告)号：US06346743B1

    公开(公告)日：2002-02-12

    申请号：US09606531

    申请日：2000-06-30

    申请人： David G. Figueroa ,  Yuan-Liang Li ,  Chee-Yee Chung

    发明人： David G. Figueroa ,  Yuan-Liang Li ,  Chee-Yee Chung

    IPC分类号： H01L2312

    CPC分类号： H05K1/0231 ,  H01L23/642 ,  H01L2224/16225 ,  H01L2924/01078 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/185 ,  Y10S257/916

    摘要： A capacitor assembly having one or more capacitors embedded in the core layer of a package having integrated circuits (ICs) mounted thereon. Each embedded capacitor has plural pairs of first and second electrodes and the package core layer has plural sets of first and second vias dispersed over the pairs of electrodes and being connected thereto. A metal layer is provided on the core layer and includes a first portion having at least one metal strip and a second portion, electrically isolated from each strip. Each metal strip is positioned such that it is extended to overlie both the first electrode of a distinct pair of electrodes and the second electrode of an adjacent, succeeding pair of electrodes and effects a mutual electrical connection between them through first and second vias associated therewith, respectively. A wiring layer which may be a dielectric interlevel connection layer, provided on the metal layer, has plural sets of third vias that are disposed over the center of the capacitor such that adjacently disposed sets of third vias alternate between contacting the individual ones of the metal strips and contacting the second portion of the metal layer to provide interlayer electrical connections therethrough, respectively, to wirings or terminals in the package. The individual metal strips associated with the first portion of the metal layer are to be applied with one of the power and ground reference signals of the package assembly and the second portion thereof is to be applied with the other one of the power and ground voltages. These capacitors may be employed as bypass capacitors in a package assembly for integrated circuits.

    摘要翻译： 一种电容器组件，其具有一个或多个电容器，该电容器嵌入在其上安装有集成电路（IC）的封装的芯层中。 每个嵌入式电容器具有多对第一和第二电极，并且封装芯层具有分散在该对电极上并与之连接的多组第一和第二通孔。 金属层设置在芯层上，并且包括具有至少一个金属带的第一部分和与每个条带电隔离的第二部分。 每个金属条被定位成使得其延伸以覆盖不同对电极的第一电极和相邻的后一对电极的第二电极，并且通过与其相关联的第一和第二通孔来实现它们之间的相互电连接， 分别。 可以是设置在金属层上的电介质层间连接层的布线层具有多个设置在电容器的中心上方的第三通孔，使得相邻设置的第三通孔组在接触金属的各个之间交替 剥离并接触金属层的第二部分以分别提供到包装中的布线或端子的夹层电连接。 与金属层的第一部分相关联的单个金属带将被施加到封装组件的电源和接地参考信号中的一个，并且其第二部分将被施加电源和接地电压中的另一个。 这些电容器可以用作用于集成电路的封装组件中的旁路电容器。